FUNCTIONAL BLOCK DIAGRAM
REV. C
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
High Precision
5 V Reference
AD586
FEATURES
Laser Trimmed to High Accuracy:
5.000 V 2.0 mV (M Grade)
Trimmed Temperature Coefficient:
2 ppm/ C max, 0 C to +70 C (M Grade)
5 ppm/ C max, 40 C to +85 C (B & L Grades)
10 ppm/ C max, 55 C to +125 C (T Grade)
Low Noise, 100 nV/
Hz
Noise Reduction Capability
Output Trim Capability
MIL-STD-883 Compliant Versions Available
Industrial Temperature Range SOICs Available
Output Capable of Sourcing or Sinking 10 mA
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
PRODUCT DESCRIPTION
The AD586 represents a major advance in the state-of-the-art in
monolithic voltage references. Using a proprietary ion-implanted
buried Zener diode and laser wafer trimming of high stability
thin-film resistors, the AD586 provides outstanding perfor-
mance at low cost.
The AD586 offers much higher performance than most other
5 V references. Because the AD586 uses an industry standard
pinout, many systems can be upgraded instantly with the
AD586. The buried Zener approach to reference design pro-
vides lower noise and drift than bandgap voltage references. The
AD586 offers a noise reduction pin which can be used to further
reduce the noise level generated by the buried Zener.
The AD586 is recommended for use as a reference for 8-, 10-,
12-, 14- or 16-bit D/A converters which require an external
precision reference. The device is also ideal for successive
approximation or integrating A/D converters with up to 14 bits
of accuracy and, in general, can offer better performance than
the standard on-chip references.
The AD586J, K, L and M are specified for operation from 0
C
to +70
C, the AD586A and B are specified for 40
C to +85
C
operation, and the AD586S and T are specified for 55
C to
+125
C operation. The AD586J, K, L and M are available in an
8-pin plastic DIP. The AD586J, K, L, A and B are available in
an 8-pin plastic surface mount small outline (SO) package. The
AD586J, K, L, S and T are available in an 8-pin cerdip package.
PRODUCT HIGHLIGHTS
1. Laser trimming of both initial accuracy and temperature
coefficients results in very low errors over temperature with-
out the use of external components. The AD586M has a
maximum deviation from 5.000 V of
2.45 mV between
0
C and +70
C, and the AD586T guarantees
7.5 mV
maximum total error between 55
C and +125
C.
2. For applications requiring higher precision, an optional fine-
trim connection is provided.
3. Any system using an industry standard pinout reference can
be upgraded instantly with the AD586.
4. Output noise of the AD586 is very low, typically 4
V p-p. A
noise reduction pin is provided for additional noise filtering
using an external capacitor.
5. The AD586 is available in versions compliant with MIL-
STD-883. Refer to the Analog Devices Military Products
Databook or current AD586/883B data sheet for detailed
specifications.
AD586SPECIFICATIONS
(@ T
A
= + 25
C, V
IN
= +15 V unless otherwise noted)
AD586J
AD586K/A
AD586L/B
AD586M
AD586S
AD586T
Model
Min
Typ Max Min
Typ Max
Min Typ Max
Min Typ Max
Min
Typ Max
Min
Typ Max
Units
Output Voltage
4.980
5.020 4.995
5.005
4.9975
5.0025 4.998
5.002 4.990
5.010 4.9975
5.0025 V
Output Voltage Drift
l
0
C to +70
C
25
15
5
2
ppm/
C
55
C to +125
C
20
10
Gain Adjustment
+6
+6
+6
+6
+6
+6
%
2
2
2
2
2
2
Line Regulation
1
10.8 V < +V
IN
< 36 V
T
MIN
to T
MAX
100
100
100
100
V/V
11.4 V < +V
IN
< 36 V
T
MIN
to T
MAX
150
150
Load Regulation
l
Sourcing 0 < I
OUT
< 10 mA
25
C
100
100
100
100
150
150
V/mA
T
MIN
to T
MAX
100
100
100
100
150
150
Sinking 10 < I
OUT
< 0 mA
25
C
400
400
400
400
400
400
Quiescent Current
2
3
2
3
2
3
2
3
2
3
2
3
mA
Power Consumption
30
30
30
30
30
30
mW
Output Noise
0.1 Hz to 10 Hz
4
4
4
4
4
4
V p-p
Spectral Density, 100 Hz
100
100
100
100
100
100
nV/
Hz
Long-Term Stability
15
15
15
15
15
15
ppm/1000 Hr
Short-Circuit Current-to-Ground
45
60
45
60
45
60
45
60
45
60
45
60
mA
Temperature Range
Specified Performance
2
0
+70
0
+70
0
+70
0
+70
55
+125 55
+125
C
40
+85
40
+85
Operating Performance
3
40
+85
40
+85
40
+85
40
+85
55
+125 55
+125
NOTES
1
Maximum output voltage drift is guaranteed for all packages and grades. Cerdip packaged parts are also 100
C production tested.
2
Lower row shows specified performance for A and B grades.
3
The operating temperature range is defined as the temperatures extremes at which the device will still function. Parts may deviate from their specified performance outside their
specified temperature range.
Specifications subject to change without notice.
Specifications in boldface are rested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels. All min and max specifica-
tions are guaranteed, although only those shown in boldface are tested on all production units unless otherwise specified.
ABSOLUTE MAXIMUM RATINGS
*
V
IN
to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 V
Power Dissipation
(25
C) . . . . . . . . . . . . . . . . . . . . . 500 mW
Storage Temperature . . . . . . . . . . . . . . . . . . 65
C to +150
C
Lead Temp (Soldering, 10 sec) . . . . . . . . . . . . . . . . . . +300
C
Package Thermal Resistance
JC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
C/W
JA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
C/W
Output Protection: Output safe for indefinite short to ground or
V
IN
.
*Stresses above those listed under "Absolute Maximum Ratings" may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the
operational section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
CONNECTION DIAGRAM
(Top View)
2
REV. C
AD586
REV. C
3
The following specifications are tested at the die level for AD586JCHIPS. These die are probed at 25 C
only. (T
A
= +25 C, V
IN
= +15 V unless otherwise noted)
DlE SPECIFlCATIONS
AD586JCHIPS
Parameter
Min
Typ
Max
Units
Output Voltage
4.980
5.020
V
Gain Adjustment
+6
%
2
%
Line Regulation
10.8 V < + V
IN
< 36 V
100
V/V
Load Regulation
Sourcing 0 < I
OUT
< 10 mA
100
V/mA
Sinking 10 < I
OUT
< 0 mA
400
V/mA
Quiescent Current
3
mA
Short-Circuit Current-to-Ground
60
mA
NOTES
1
Both V
OUT
pads should be connected to the output.
Die Thickness: The standard thickness of Analog Devices Bipolar dice is 24 mils
2 mils.
Die Dimensions: The dimensions given have a tolerance of
2 mils.
Backing: The standard backside surface is silicon (not plated). Analog Devices does not
recommend gold-backed dice for most applications.
Edges: A diamond saw is used to separate wafers into dice thus providing perpendicular
edges half-way through the die.
In contrast to scribed dice, this technique provides a more uniform die shape and size. The
perpendicular edges facilitate handling (such as tweezer pick-up) while the uniform shape
and size simplifies substrate design and die attach.
Top Surface: The standard top surface of the die is covered by a layer of glassivation. All
areas are covered except bonding pads and scribe lines.
Surface Metalization: The metalization to Analog Devices bipolar dice is aluminum.
Minimum thickness is 10,000.
Bonding Pads: All bonding pads have a minimum size of 4 mils by 4 mils. The passivation
windows have 3.5 mils by 3.5 mils minimum.
WARNING!
ESD SENSITIVE DEVICE
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD586 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
ORDERING GUIDE
Initial
Temperature
Temperature
Package
Model
1
Error
Coefficient
Range
Option
2
AD586JN
20 mV
25 ppm/
C
0
C to +70
C
N-8
AD586JQ
20 mV
25 ppm/
C
0
C to +70
C
Q-8
AD586JR
20 mV
25 ppm/
C
0
C to +70
C
SO-8
AD586KN
5 mV
15 ppm/
C
0
C to +70
C
N-8
AD586KQ
5 mV
15 ppm/
C
0
C to +70
C
Q-8
AD586KR
5 mV
15 ppm/
C
0
C to +70
C
SO-8
AD586LN
2.5 mV
5 ppm/
C
0
C to +70
C
N-8
AD586LR
2.5 mV
5 ppm/
C
0
C to +70
C
SO-8
AD586MN
2 mV
2 ppm/
C
0
C to +70
C
N-8
AD586AR
5 mV
15 ppm/
C
40
C to +85
C
SO-8
AD586BR
2.5 mV
5 ppm/
C
40
C to +85
C
SO-8
AD586LQ
2.5 mV
5 ppm/
C
0
C to +70
C
Q-8
AD586SQ
10 mV
20 ppm/
C
55
C to +125
C
Q-8
AD586TQ
2.5 mV
10 ppm/
C
55
C to +125
C
Q-8
AD586JCHIPS
20 mV
25 ppm/
C
0
C to +70
C
NOTES
1
For details on grade and package offerings screened in accordance with MIL-STD-883, r efer to the Analog Devices Military
Products Databook or current AD586/883B data sheet.
2
N = Plastic DIP; Q = Cerdip; SO = Small Outline IC (SOIC).
AD586
REV. C
4
THEORY OF OPERATION
The AD586 consists of a proprietary buried Zener diode refer-
ence, an amplifier to buffer the output and several high stability
thin-film resistors as shown in the block diagram in Figure 1.
This design results in a high precision monolithic 5 V output
reference with initial offset of 2.0 mV or less. The temperature
compensation circuitry provides the device with a temperature
coefficient of under 2 ppm/
C.
Using the bias compensation resistor between the Zener output
and the noninverting input to the amplifier, a capacitor can be
added at the NOISE REDUCTION pin (Pin 8) to form a low-
pass filter and reduce the noise contribution of the Zener to the
circuit.
Figure 1. AD586 Functional Block Diagram
APPLYING THE AD586
The AD586 is simple to use in virtually all precision reference
applications. When power is applied to Pin 2 and Pin 4 is
grounded, Pin 6 provides a 5 V output. No external components
are required; the degree of desired absolute accuracy is achieved
simply by selecting the required device grade. The AD586 re-
quires less than 3 mA quiescent current from an operating sup-
ply of +12 V or +15 V.
An external fine trim may be desired to set the output level to
exactly 5.000 V (calibrated to a main system reference). System
calibration may also require a reference voltage that is slightly
different from 5.000 V, for example, 5.12 V for binary applica-
tions. In either case, the optional trim circuit shown in Figure 2
can offset the output by as much as 300 mV, if desired, with
minimal effect on other device characteristics.
Figure 2. Optional Fine Trim Configuration
NOISE PERFORMANCE AND REDUCTION
The noise generated by the AD586 is typically less than 4
V
p-p over the 0.1 Hz to 10 Hz band. Noise in a 1 MHz band-
width is approximately 200
V p-p. The dominant source of this
noise is the buried Zener which contributes approximately
100 nV/
Hz
. In comparison, the op amp's contribution is negli-
gible. Figure 3 shows the 0.1 Hz to 10 Hz noise of a typical
AD586. The noise measurement is made with a bandpass filter
made of a 1-pole high-pass filter with a corner frequency at
0.1 Hz and a 2-pole low-pass filter with a corner frequency at
12.6 Hz to create a filter with a 9.922 Hz bandwidth.
If further noise reduction is desired, an external capacitor may
be added between the NOISE REDUCTION pin and ground as
shown in Figure 2. This capacitor, combined with the 4 k
R
S
and the Zener resistances form a low-pass filter on the output of
the Zener cell. A 1
F capacitor will have a 3 dB point at 12 Hz,
and it will reduce the high frequency (to 1 MHz) noise to about
160
V p-p. Figure 4 shows the 1 MHz noise of a typical AD586
both with and without a 1
F capacitor.
Figure 3. 0.1 Hz to 10 Hz Noise
Figure 4. Effect of 1
F Noise Reduction Capacitor on
Broadband Noise
TURN-ON TIME
Upon application of power (cold start), the time required for the
output voltage to reach its final value within a specified error
band is defined as the turn-on settling time. Two components
normally associated with this are: the time for the active circuits
to settle, and the time for the thermal gradients on the chip to
stabilize. Figure 5 shows the turn-on characteristics of the
AD586. It shows the settling to be about 60
sec to 0.01%.
Note the absence of any thermal tails when the horizontal scale
is expanded to l ms/cm in Figure 5b.
AD586
REV. C
5
Output turn-on time is modified when an external noise reduc-
tion capacitor is used. When present, this capacitor acts as an
additional load to the internal Zener diode's current source, re-
sulting in a somewhat longer turn-on time. In the case of a 1
F
capacitor, the initial turn-on time is approximately 400 ms to
0.01% (see Figure 5c).
Figure 5. Turn-On Characteristics
DYNAMIC PERFORMANCE
The output buffer amplifier is designed to provide the AD586
with static and dynamic load regulation superior to less com-
plete references.
Many A/D and D/A converters present transient current loads
to the reference, and poor reference response can degrade the
converter's performance.
Figure 6 displays the characteristics of the AD586 output ampli-
fier driving a 0 mA to 10 mA load.
PDF 
ZIP