REV. C
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
AD8002
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
Analog Devices, Inc., 1999
Dual 600 MHz, 50 mW
Current Feedback Amplifier
FEATURES
Excellent Video Specifications (R
L
= 150 , G = +2)
Gain Flatness 0.1 dB to 60 MHz
0.01% Differential Gain Error
0.02 Differential Phase Error
Low Power
5.5 mA/Amp Max Power Supply Current (55 mW)
High Speed and Fast Settling
600 MHz, 3 dB Bandwidth (G = +1)
500 MHz, 3 dB Bandwidth (G = +2)
1200 V/ s Slew Rate
16 ns Settling Time to 0.1%
Low Distortion
65 dBc THD, f
C
= 5 MHz
33 dBm 3rd Order Intercept, F
1
= 10 MHz
66 dB SFDR, f = 5 MHz
60 dB Crosstalk, f = 5 MHz
High Output Drive
Over 70 mA Output Current
Drives Up to Eight Back-Terminated 75
Loads
(Four Loads/Side) While Maintaining Good
Differential Gain/Phase Performance (0.01%/0.17 )
Available in 8-Lead Plastic DIP, SOIC and SOIC Packages
APPLICATIONS
A-to-D Driver
Video Line Driver
Differential Line Driver
Professional Cameras
Video Switchers
Special Effects
RF Receivers
FUNCTIONAL BLOCK DIAGRAM
8-Lead Plastic DIP, SOIC and SOIC
OUT1
IN1
+IN1
V
V+
OUT2
IN2
+IN2
1
2
3
4
8
7
6
5
AD8002
PRODUCT DESCRIPTION
The AD8002 is a dual, low power, high speed amplifier de-
signed to operate on
5 V supplies. The AD8002 features
unique transimpedance linearization circuitry. This allows it to
drive video loads with excellent differential gain and phase per-
formance on only 50 mW of power per amplifier. The AD8002
is a current feedback amplifier and features gain flatness of 0.1 dB
to 60 MHz while offering differential gain and phase error of
0.01% and 0.02
. This makes the AD8002 ideal for professional
video electronics such as cameras and video switchers. Addition-
ally, the AD8002's low distortion and fast settling make it ideal
for buffer high speed A-to-D converters.
The AD8002 offers low power of 5.5 mA/amplifier max (V
S
=
5 V) and can run on a single +12 V power supply, while ca-
pable of delivering over 70 mA of load current. It is offered in
an 8-lead plastic DIP, SOIC and
SOIC package. These features
make this amplifier ideal for portable and battery powered appli-
cations where size and power is critical.
The outstanding bandwidth of 600 MHz along with 1200 V/
s
of slew rate make the AD8002 useful in many general purpose
high speed applications where dual power supplies of up to
6 V
and single supplies from 6 V to 12 V are needed. The AD8002 is
available in the industrial temperature range of 40
C to +85
C.
1M
10M
1G
100M
0
0.5
0.1
0.2
0.3
0.4
0.1
1
4
9
5
6
7
8
3
2
1
0
NORMALIZED FLATNESS dB
FREQUENCY Hz
NORMALIZED FREQUENCY RESPONSE dB
G = +2
R
L
= 100
V
IN
= 50mV
SIDE 1
SIDE 2
SIDE 1
SIDE 2
Figure 1. Frequency Response and Flatness, G = +2
Figure 2. 1 V Step Response, G = +1
REV. C
2
AD8002SPECIFICATIONS
(@ T
A
= + 25 C, V
S
= 5 V, R
L
= 100
, R
C
1
= 75
, unless otherwise noted)
Model
AD8002A
Conditions
Min
Typ
Max
Units
DYNAMIC PERFORMANCE
3 dB Small Signal Bandwidth,
N Package
G = +2, R
F
= 750
500
MHz
G = +1, R
F
= 1.21 k
600
MHz
R Package
G = +2, R
F
= 681
500
MHz
G = +1, R
F
= 953
600
MHz
RM Package
G = +2, R
F
= 681
500
MHz
G = +1, R
F
= 1 k
600
MHz
Bandwidth for 0.1 dB Flatness
N Package
G = +2, R
F
= 750
60
MHz
R Package
G = +2, R
F
= 681
90
MHz
RM Package
G = +2, R
F
= 681
60
MHz
Slew Rate
G = +2, V
O
= 2 V Step
700
V/
s
G = 1, V
O
= 2 V Step
1200
V/
s
Settling Time to 0.1%
G = +2, V
O
= 2 V Step
16
ns
Rise & Fall Time
G = +2, V
O
= 2 V Step, R
F
= 750
2.4
ns
NOISE/HARMONIC PERFORMANCE
Total Harmonic Distortion
f
C
= 5 MHz, V
O
= 2 V p-p
65
dBc
G = +2, R
L
= 100
Crosstalk, Output to Output
f = 5 MHz, G = +2
60
dB
Input Voltage Noise
f = 10 kHz, R
C
= 0
2.0
nV/
Hz
Input Current Noise
f = 10 kHz, +In
2.0
pA/
Hz
In
18
pA/
Hz
Differential Gain Error
NTSC, G = +2, R
L
= 150
0.01
%
Differential Phase Error
NTSC, G = +2, R
L
= 150
0.02
Degree
Third Order Intercept
f = 10 MHz
33
dBm
1 dB Gain Compression
f = 10 MHz
14
dBm
SFDR
f = 5 MHz
66
dB
DC PERFORMANCE
Input Offset Voltage
2.0
6
mV
T
MIN
T
MAX
2.0
9
mV
Offset Drift
10
V/
C
Input Bias Current
5.0
25
A
T
MIN
T
MAX
35
A
+Input Bias Current
3.0
6.0
A
T
MIN
T
MAX
10
A
Open Loop Transresistance
V
O
=
2.5 V
250
900
k
T
MIN
T
MAX
175
k
INPUT CHARACTERISTICS
Input Resistance
+Input
10
M
Input
50
Input Capacitance
+Input
1.5
pF
Input Common-Mode Voltage Range
3.2
V
Common-Mode Rejection Ratio
Offset Voltage
V
CM
=
2.5 V
49
54
dB
Input Current
V
CM
=
2.5 V, T
MIN
T
MAX
0.3
1.0
A/V
+Input Current
V
CM
=
2.5 V, T
MIN
T
MAX
0.2
0.9
A/V
OUTPUT CHARACTERISTICS
Output Voltage Swing
R
L
= 150
2.7
3.1
V
Output Current
2
70
mA
Short Circuit Current
2
85
110
mA
POWER SUPPLY
Operating Range
3.0
6.0
V
Quiescent Current/Both Amplifiers
T
MIN
T
MAX
10.0
11.5
mA
Power Supply Rejection Ratio
+V
S
= +4 V to +6 V, V
S
= 5 V
60
75
dB
V
S
= 4 V to 6 V, +V
S
= +5 V
49
56
dB
Input Current
T
MIN
T
MAX
0.5
2.5
A/V
+Input Current
T
MIN
T
MAX
0.1
0.5
A/V
NOTES
1
R
C
is recommended to reduce peaking and minimize input reflections at frequencies above 300 MHz. However, R
C
is not required.
2
Output current is limited by the maximum power dissipation in the package. See the power derating curves.
Specifications subject to change without notice.
REV. C
3
AD8002
ABSOLUTE MAXIMUM RATINGS
1
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.6 V
Internal Power Dissipation
2
Plastic DIP Package (N) . . . . . . . . . . . . . . . . . . . . . . . 1.3 W
Small Outline Package (R) . . . . . . . . . . . . . . . . . . . . . . 0.9 W
SOIC Package (RM) . . . . . . . . . . . . . . . . . . . . . . . . . 0.6 W
Input Voltage (Common Mode) . . . . . . . . . . . . . . . . . . . .
V
S
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . .
1.2 V
Output Short Circuit Duration
. . . . . . . . . . . . . . . . . . . . . . Observe Power Derating Curves
Storage Temperature Range N, R, RM . . . . . 65
C to +125
C
Operating Temperature Range (A Grade) . . . 40
C to +85
C
Lead Temperature Range (Soldering 10 sec) . . . . . . . . +300
C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2
Specification is for device in free air:
8-Lead Plastic DIP Package:
JA
= 90
C/W
8-Lead SOIC Package:
JA
= 155
C/W
8-Lead
SOIC Package:
JA
= 200
C/W
MAXIMUM POWER DISSIPATION
The maximum power that can be safely dissipated by the
AD8002 is limited by the associated rise in junction tempera-
ture. The maximum safe junction temperature for plastic
encapsulated devices is determined by the glass transition tem-
perature of the plastic, approximately +150
C. Exceeding this
limit temporarily may cause a shift in parametric performance
due to a change in the stresses exerted on the die by the package.
Exceeding a junction temperature of +175
C for an extended
period can result in device failure.
While the AD8002 is internally short circuit protected, this
may not be sufficient to guarantee that the maximum junction
temperature (+150
C) is not exceeded under all conditions. To
ensure proper operation, it is necessary to observe the maximum
power derating curves.
2.0
0
50
80
1.5
0.5
40
1.0
0
10
10
20
30
20
30
40
50
60
70
90
MAXIMUM POWER DISSIPATION Watts
AMBIENT TEMPERATURE C
8-LEAD PLASTIC-DIP PACKAGE
8-LEAD SOIC PACKAGE
T
J
= +150 C
8-LEAD SOIC
PACKAGE
Figure 3. Plot of Maximum Power Dissipation vs.
Temperature
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD8002 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
ORDERING GUIDE
Model
Temperature Range
Package Description
Package Option
Brand Code
AD8002AN
40
C to +85
C
8-Lead PDIP
N-8
Standard
AD8002AR
40
C to +85
C
8-Lead SOIC
SO-8
Standard
AD8002AR-REEL
40
C to +85
C
8-Lead SOIC 13" REEL
SO-8
Standard
AD8002AR-REEL7
40
C to +85
C
8-Lead SOIC 7" REEL
SO-8
Standard
AD8002ARM
40
C to +85
C
8-Lead
SOIC
RM-8
HFA
AD8002ARM-REEL
40
C to +85
C
8-Lead
SOIC 13" REEL
RM-8
HFA
AD8002ARM-REEL7
40
C to +85
C
8-Lead
SOIC 7" REEL
RM-8
HFA
WARNING!
ESD SENSITIVE DEVICE
REV. C
AD8002
4
PULSE
GENERATOR
953
+5V
R
L
= 100
5V
50
V
IN
0.1 F
10 F
AD8002
0.1 F
10 F
T
R
/T
F
= 250ps
75
Figure 4. Test Circuit , Gain = +1
Figure 5. 100 mV Step Response, G = +1
Figure 6. 1 V Step Response, G = +1
PULSE
GENERATOR
750
+5V
R
L
= 100
5V
50
V
IN
0.1 F
10 F
AD8002
0.1 F
10 F
T
R
/T
F
= 250ps
75
750
Figure 7. Test Circuit, Gain = +2
Figure 8. 100 mV Step Response, G = +2
Figure 9. 1 V Step Response, G = +2
REV. C
AD8002
5
1M
10M
1G
100M
0
0.5
0.1
0.2
0.3
0.4
0.1
1
4
9
5
6
7
8
3
2
1
0
NORMALIZED FLATNESS dB
FREQUENCY Hz
NORMALIZED FREQUENCY RESPONSE dB
G = +2
R
L
= 100
V
IN
= 50mV
SIDE 1
SIDE 2
SIDE 1
SIDE 2
75
50
50
R
F
681
681
Figure 10. Frequency Response and Flatness, G = +2
FREQUENCY Hz
50
60
DISTORTION dBc
110
10k
100M
100k
1M
10M
70
80
100
90
2ND HARMONIC
3RD HARMONIC
G = +2
R
L
= 100
Figure 11. Distortion vs. Frequency, G = +2, R
L
= 100
FREQUENCY Hz
60
DISTORTION dBc
110
10k
100M
100k
1M
10M
70
80
100
90
2ND HARMONIC
3RD HARMONIC
G = +2
R
L
= 1k
V
OUT
= 2V p-p
120
Figure 12. Distortion vs. Frequency, G = +2, R
L
= 1 k
70
1M
100M
10M
100k
60
100
90
80
OUTPUT SIDE 1
OUTPUT SIDE 2
CROSSTALK dB
50
40
30
20
110
120
FREQUENCY Hz
V
IN
= 4dBV
R
L
= 100
V
S
= 5.0V
G = +2
R
F
= 750
Figure 13. Crosstalk (Output-to-Output) vs. Frequency
NOTES: SIDE 1: V
IN
= 0V; 8mV/div RTO
SIDE 2: 1V STEP RTO; 400mV/div
Figure 14. Pulse Crosstalk, Worst Case, 1 V Step
0.02
0.06
0.02
1
0.04
0.02
0.08
0.01
0.00
0.01
IRE
DIFF GAIN %
DIFF PHASE Degrees
0.00
G = +2
R
F
= 750
NTSC
2
3
4
5
6
7
8
9
10
11
2 BACK TERMINATED
LOADS (75 )
1 BACK TERMINATED
LOAD (150 )
2 BACK TERMINATED
LOADS (75 )
1 BACK TERMINATED
LOAD (150 )
Figure 15. Differential Gain and Differential Phase
(per Amplifier)
PDF 
ZIP