REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
2.7 V, 800 A, 80 MHz
Rail-to-Rail I/O Amplifiers
CONNECTION DIAGRAMS
AD8031/AD8032
FEATURES
Low Power
Supply Current 800 A/Amplifier
Fully Specified at +2.7 V, +5 V and 5 V Supplies
High Speed and Fast Settling on +5 V
80 MHz 3 dB Bandwidth (G = +1)
30 V/ s Slew Rate
125 ns Settling Time to 0.1%
Rail-to-Rail Input and Output
No Phase Reversal with Input 0.5 V Beyond Supplies
Input CMVR Extends Beyond Rails by 200 mV
Output Swing to Within 20 mV of Either Rail
Low Distortion
62 dB @ 1 MHz, V
O
= 2 V p-p
86 dB @ 100 kHz, V
O
= 4.6 V p-p
Output Current: 15 mA
High Grade Option
V
OS
(max) = 1.5 mV
APPLICATIONS
High-Speed Battery-Operated Systems
High Component Density Systems
Portable Test Instruments
A/D Buffer
Active Filters
High-Speed Set-and-Demand Amplifier
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
Analog Devices, Inc., 1999
8-Lead Plastic DIP (N),
SOIC (R) and SOIC (RM)
Packages
1
2
3
4
8
7
6
5
AD8032
OUT1
IN1
+IN1
V
S
+IN2
IN2
+V
S
OUT2
8-Lead Plastic DIP (N)
and SOIC (R) Packages
1
2
3
4
8
7
6
5
AD8031
NC
IN
+IN
V
S
NC = NO CONNECT
NC
OUT
+V
S
NC
5-Lead Plastic Surface Mount Package
SOT-23-5 (RT-5)
+IN
+V
S
V
S
AD8031
1
2
3
5
4
IN
V
OUT
(Not to Scale)
GENERAL DESCRIPTION
The AD8031 (single) and AD8032 (dual) single supply voltage
feedback amplifiers feature high-speed performance with 80 MHz
of small signal bandwidth, 30 V/
s slew rate and 125 ns settling
time. This performance is possible while consuming less than
4.0 mW of power from a single +5 V supply. These features
increase the operation time of high speed battery-powered
systems without compromising dynamic performance.
The products have true single supply capability with rail-to-rail
input and output characteristics and are specified for +2.7 V,
+5 V and
5 V supplies. The input voltage range can extend to
500 mV beyond each rail. The output voltage swings to within
20 mV of each rail providing the maximum output dynamic range.
The AD8031/AD8032 also offer excellent signal quality for only
800
A of supply current per amplifier; THD is 62 dBc with a
2 V p-p, 1 MHz output signal and 86 dBc for a 100 kHz, 4.6 V p-p
signal on +5 V supply. The low distortion and fast settling time
make them ideal as buffers to single supply, A-to-D converters.
Operating on supplies from +2.7 V to +12 V and dual supplies up to
6 V, the AD8031/AD8032 are ideal for a wide range of applications,
from battery-operated systems with large bandwidth requirements
to high-speed systems where component density requires lower
power dissipation. The AD8031/AD8032 are available in 8-lead
plastic DIP and SOIC packages and will operate over the indus-
trial temperature range of 40
C to +85
C. The AD8031A is also
available in the space-saving 5-lead SOT-23-5 package and the
AD8032A is available in AN 8-lead
SOIC package.
2 s/Div
1V/Div
1V/Div
2 s/Div
V
IN
+5V
1k
1.7pF
+2.5V
V
OUT
Circuit Diagram
Figure 1. Rail-to-Rail Performance at 100 kHz
Input V
IN
Output V
OUT
REV. B
2
AD8031/AD8032SPECIFICATIONS
AD8031A/AD8032A
AD8031B/AD8032B
Parameter
Conditions
Min
Typ
Max
Min
Typ
Max
Units
DYNAMIC PERFORMANCE
3 dB Small Signal Bandwidth
G = +1, V
O
< 0.4 V p-p
54
80
54
80
MHz
Slew Rate
G = 1, V
O
= 2 V Step
25
30
25
30
V/
s
Settling Time to 0.1%
G = 1, V
O
= 2 V Step, C
L
= 10 pF
125
125
ns
DISTORTION/NOISE PERFORMANCE
Total Harmonic Distortion
f
C
= 1 MHz, V
O
= 2 V p-p, G = +2
62
62
dBc
f
C
= 100 kHz, V
O
= 2 V p-p, G = +2
86
86
dBc
Input Voltage Noise
f = 1 kHz
15
15
nV/
Hz
Input Current Noise
f = 100 kHz
2.4
2.4
pA/
Hz
f = 1 kHz
5
5
pA/
Hz
Crosstalk (AD8032 Only)
f = 5 MHz
60
60
dB
DC PERFORMANCE
Input Offset Voltage
V
CM
=
V
CC
2
;
V
OUT
= 1.35 V
1
6
0.5
1.5
mV
T
MIN
to T
MAX
6
10
1.6
2.5
mV
Offset Drift
V
CM
=
V
CC
2
;
V
OUT
= 1.35 V
10
10
V/
C
Input Bias Current
V
CM
=
V
CC
2
;
V
OUT
= 1.35 V
0.45
2
0.45
2
A
T
MIN
to T
MAX
2.2
2.2
A
Input Offset Current
50
500
50
500
nA
Open Loop Gain
V
CM
=
V
CC
2
;
V
OUT
= 0.35 V to 2.35 V
76
80
76
80
dB
T
MIN
to T
MAX
74
74
dB
INPUT CHARACTERISTICS
Common-Mode Input Resistance
40
40
M
Differential Input Resistance
280
280
k
Input Capacitance
1.6
1.6
pF
Input Voltage Range
0.5 to
0.5 to
+3.2
+3.2
V
Input Common-Mode Voltage Range
0.2 to
0.2 to
+2.9
+2.9
V
Common-Mode Rejection Ratio
V
CM
= 0 V to 2.7 V
46
64
46
64
dB
V
CM
= 0 V to 1.55 V
58
74
58
74
dB
Differential Input Voltage
3.4
3.4
V
OUTPUT CHARACTERISTICS
Output Voltage Swing Low
R
L
= 10 k
+0.05
+0.02
+0.05
+0.02
V
Output Voltage Swing High
+2.6
+2.68
+2.6
+2.68
V
Output Voltage Swing Low
R
L
= 1 k
+0.15
+0.08
+0.15
+0.08
V
Output Voltage Swing High
+2.55
+2.6
+2.55
+2.6
V
Output Current
15
15
mA
Short Circuit Current
Sourcing
21
21
mA
Sinking
34
34
mA
Capacitive Load Drive
G = +2 (See Figure 41)
15
15
pF
POWER SUPPLY
Operating Range
+2.7
+12
+2.7
+12
V
Quiescent Current per Amplifier
750
1250
750
1250
A
Power Supply Rejection Ratio
V
S
= 0 V to 1 V or
V
S
+ = +2.7 V to +3.7 V
75
86
75
86
dB
Specifications subject to change without notice.
(@ T
A
= +25 C, V
S
= +2.7 V, R
L
= 1 k
to +1.35 V, R
F
= 2.5 k
unless otherwise noted)
+2.7 V Supply
AD8031/AD8032
3
REV. B
SPECIFICATIONS
AD8031A/AD8032A
AD8031B/AD8032B
Parameter
Conditions
Min
Typ
Max
Min
Typ
Max
Units
DYNAMIC PERFORMANCE
3 dB Small Signal Bandwidth
G = +1, V
O
< 0.4 V p-p
54
80
54
80
MHz
Slew Rate
G = 1, V
O
= 2 V Step
27
32
27
32
V/
s
Settling Time to 0.1%
G = 1, V
O
= 2 V Step, C
L
= 10 pF
125
125
ns
DISTORTION/NOISE PERFORMANCE
Total Harmonic Distortion
f
C
= 1 MHz, V
O
= 2 V p-p, G = +2
62
62
dBc
f
C
= 100 kHz, V
O
= 2 V p-p, G = +2
86
86
dBc
Input Voltage Noise
f = 1 kHz
15
15
nV/
Hz
Input Current Noise
f = 100 kHz
2.4
2.4
pA/
Hz
f = 1 kHz
5
5
pA/
Hz
Differential Gain
R
L
= 1 k
0.17
0.17
%
Differential Phase
R
L
= 1 k
0.11
0.11
Degrees
Crosstalk (AD8032 Only)
f = 5 MHz
60
60
dB
DC PERFORMANCE
Input Offset Voltage
V
CM
=
V
CC
2
;
V
OUT
= 2.5 V
1
6
0.5
1.5
mV
T
MIN
to T
MAX
6
10
1.6
2.5
mV
Offset Drift
V
CM
=
V
CC
2
;
V
OUT
= 2.5 V
5
5
V/
C
Input Bias Current
V
CM
=
V
CC
2
;
V
OUT
= 2.5 V
0.45
1.2
0.45
1.2
A
T
MIN
to T
MAX
2.0
2.0
A
Input Offset Current
50
350
50
250
nA
Open Loop Gain
V
CM
=
V
CC
2
;
V
OUT
= 1.5 V to 3.5 V
76
82
76
82
dB
T
MIN
to T
MAX
74
74
dB
INPUT CHARACTERISTICS
Common-Mode Input Resistance
40
40
M
Differential Input Resistance
280
280
k
Input Capacitance
1.6
1.6
pF
Input Voltage Range
0.5 to
0.5 to
+5.5
+5.5
V
Input Common-Mode Voltage Range
0.2 to
0.2 to
+5.2
+5.2
V
Common-Mode Rejection Ratio
V
CM
= 0 V to 5 V
56
70
56
70
dB
V
CM
= 0 V to 3.8 V
66
80
66
80
dB
Differential Input Voltage
3.4
3.4
V
OUTPUT CHARACTERISTICS
Output Voltage Swing Low
R
L
= 10 k
+0.05
+0.02
+0.05
+0.02
V
Output Voltage Swing High
+4.95
+4.98
+4.95
+4.98
V
Output Voltage Swing Low
R
L
= 1 k
+0.2
+0.1
+0.2
+0.1
V
Output Voltage Swing High
+4.8
+4.9
+4.8
+4.9
V
Output Current
15
15
mA
Short Circuit Current
Sourcing
28
28
mA
Sinking
46
46
mA
Capacitive Load Drive
G = +2 (See Figure 41)
15
15
pF
POWER SUPPLY
Operating Range
+2.7
+12
+2.7
+12
V
Quiescent Current per Amplifier
800
1400
800
1400
A
Power Supply Rejection Ratio
V
S
= 0 V to 1 V or
V
S
+ = +5 V to +6 V
75
86
75
86
dB
Specifications subject to change without notice.
+5 V Supply
(@ T
A
= +25 C, V
S
= +5 V, R
L
= 1 k
to +2.5 V, R
F
= 2.5 k
unless otherwise noted)
4
REV. B
AD8031A/AD8032A
AD8031B/AD8032B
Parameter
Conditions
Min
Typ
Max
Min
Typ
Max
Units
DYNAMIC PERFORMANCE
3 dB Small Signal Bandwidth
G = +1, V
O
< 0.4 V p-p
54
80
54
80
MHz
Slew Rate
G = 1, V
O
= 2 V Step
30
35
30
35
V/
s
Settling Time to 0.1%
G = 1, V
O
= 2 V Step, C
L
= 10 pF
125
125
ns
DISTORTION/NOISE PERFORMANCE
Total Harmonic Distortion
f
C
= 1 MHz, V
O
= 2 V p-p, G = +2
62
62
dBc
f
C
= 100 kHz, V
O
= 2 V p-p, G = +2
86
86
dBc
Input Voltage Noise
f = 1 kHz
15
15
nV/
Hz
Input Current Noise
f = 100 kHz
2.4
2.4
pA/
Hz
f = 1 kHz
5
5
pA/
Hz
Differential Gain
R
L
= 1 k
0.15
0.15
%
Differential Phase
R
L
= 1 k
0.15
0.15
Degrees
Crosstalk (AD8032 Only)
f = 5 MHz
60
60
dB
DC PERFORMANCE
Input Offset Voltage
V
CM
= 0 V; V
OUT
= 0 V
1
6
0.5
1.5
mV
T
MIN
to T
MAX
6
10
1.6
2.5
mV
Offset Drift
V
CM
= 0 V; V
OUT
= 0 V
5
5
V/
C
Input Bias Current
V
CM
= 0 V; V
OUT
= 0 V
0.45
1.2
0.45
1.2
A
T
MIN
to T
MAX
2.0
2.0
A
Input Offset Current
50
350
50
250
nA
Open Loop Gain
V
CM
= 0 V; V
OUT
=
2 V
76
80
76
80
dB
T
MIN
to T
MAX
74
74
dB
INPUT CHARACTERISTICS
Common-Mode Input Resistance
40
40
M
Differential Input Resistance
280
280
k
Input Capacitance
1.6
1.6
pF
Input Voltage Range
5.5 to
5.5 to
+5.5
+5.5
V
Input Common-Mode Voltage Range
5.2 to
5.2 to
+5.2
+5.2
V
Common-Mode Rejection Ratio
V
CM
= 5 V to +5 V
60
80
60
80
dB
V
CM
= 5 V to +3.5 V
66
90
66
90
dB
Differential/Input Voltage
3.4
3.4
V
OUTPUT CHARACTERISTICS
Output Voltage Swing Low
R
L
= 10 k
4.94
4.98
4.94
4.98
V
Output Voltage Swing High
+4.94
+4.98
+4.94
+4.98
V
Output Voltage Swing Low
R
L
= 1 k
4.7
4.85
4.7
4.85
V
Output Voltage Swing High
+4.7
+4.75
+4.7
+4.75
V
Output Current
15
15
mA
Short Circuit Current
Sourcing
35
35
mA
Sinking
50
50
mA
Capacitive Load Drive
G = +2 (See Figure 41)
15
15
pF
POWER SUPPLY
Operating Range
1.35
6
1.35
6
V
Quiescent Current per Amplifier
900
1600
900
1600
A
Power Supply Rejection Ratio
V
S
= 5 V to 6 V or
V
S
+ = +5 V to +6 V
76
86
76
86
dB
Specifications subject to change without notice.
AD8031/AD8032SPECIFICATIONS
(@ T
A
= +25 C, V
S
= 5 V, R
L
= 1 k
to 0 V, R
F
= 2.5 k
unless otherwise noted)
5 V Supply
AD8031/AD8032
5
REV. B
ORDERING GUIDE
Temperature
Package
Package
Brand
Model
Range
Descriptions
Options
Code
AD8031AN
40
C to +85
C
8-Lead Plastic DIP
N-8
AD8031AR
40
C to +85
C
8-Lead SOIC
SO-8
AD8031AR-REEL
40
C to +85
C
13" Tape and Reel
SO-8
AD8031AR-REEL7
40
C to +85
C
7" Tape and Reel
SO-8
AD8031ART-REEL
40
C to +85
C
13" Tape and Reel
RT-5
H0A
AD8031ART-REEL7
40
C to +85
C
7" Tape and Reel
RT-5
H0A
AD8031BN
40
C to +85
C
8-Lead Plastic DIP
N-8
AD8031BR
40
C to +85
C
8-Lead SOIC
SO-8
AD8031BR-REEL
40
C to +85
C
13" Tape and Reel
SO-8
AD8031BR-REEL7
40
C to +85
C
7" Tape and Reel
SO-8
AD8032AN
40
C to +85
C
8-Lead Plastic DIP
N-8
AD8032AR
40
C to +85
C
8-Lead SOIC
SO-8
AD8032AR-REEL
40
C to +85
C
13" Tape and Reel
SO-8
AD8032AR-REEL7
40
C to +85
C
7" Tape and Reel
SO-8
AD8032ARM
40
C to +85
C
8-Lead
SOIC
RM-8
H9A
AD8032ARM-REEL
40
C to +85
C
13" Tape and Reel
RM-8
H9A
AD8032ARM-REEL7
40
C to +85
C
7" Tape and Reel
RM-8
H9A
AD8032BN
40
C to +85
C
8-Lead Plastic DIP
N-8
AD8032BR
40
C to +85
C
8-Lead SOIC
SO-8
AD8032BR-REEL
40
C to +85
C
13" Tape and Reel
SO-8
AD8032BR-REEL7
40
C to +85
C
7" Tape and Reel
SO-8
ABSOLUTE MAXIMUM RATINGS
1
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +12.6 V
Internal Power Dissipation
2
Plastic DIP Package (N) . . . . . . . . . . . . . . . . . . . 1.3 Watts
Small Outline Package (R) . . . . . . . . . . . . . . . . . . 0.8 Watts
SOIC (RM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.6 Watts
SOT-23-5 (RT) . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 Watts
Input Voltage (Common-Mode) . . . . . . . . . . . . .
V
S
0.5 V
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . .
3.4 V
Output Short Circuit Duration
. . . . . . . . . . . . . . . . . . . . . . Observe Power Derating Curves
Storage Temperature Range (N, R, RM, RT)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
C to +125
C
Lead Temperature Range (Soldering 10 sec) . . . . . . . . +300
C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2
Specification is for the device in free air:
8-Lead Plastic DIP Package:
JA
= 90
C/W.
8-Lead SOIC Package:
JA
= 155
C/W.
8-Lead
SOIC Package:
JA
= 200
C/W.
5-Lead SOT-23-5 Package:
JA
= 240
C/W.
MAXIMUM POWER DISSIPATION
The maximum power that can be safely dissipated by the
AD8031/AD8032 are limited by the associated rise in junction
temperature. The maximum safe junction temperature for plas-
tic encapsulated devices is determined by the glass transition
temperature of the plastic, approximately +150
C. Exceeding
this limit temporarily may cause a shift in parametric perfor-
mance due to a change in the stresses exerted on the die by
the package. Exceeding a junction temperature of +175
C for
an extended period can result in device failure.
While the AD8031/AD8032 are internally short circuit pro-
tected, this may not be sufficient to guarantee that the maxi-
mum junction temperature (+150
C) is not exceeded under
all conditions. To ensure proper operation, it is necessary to
observe the maximum power derating curves shown in Figure 2.
AMBIENT TEMPERATURE C
2.0
1.5
0
50
80
40
MAXIMUM POWER DISSIPATION Watts
30 20 10
0
10
20
30
40
50
60
70
1.0
0.5
90
T
J
= +150 C
8-LEAD SOIC PACKAGE
8-LEAD SOIC
SOT-23-5
8-LEAD PLASTIC
DIP PACKAGE
Figure 2. Maximum Power Dissipation vs. Temperature
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD8031/AD8032 feature proprietary ESD protection circuitry, permanent damage
may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
AD8031/AD8032Typical Performance Characteristics
6
REV. B
V
OS
mV
5
4
3
2
1
0
1
2
3
4
5
90
80
0
NUMBER OF PARTS IN BIN
40
30
20
10
60
50
70
N = 250
Figure 3. Typical V
OS
Distribution @ V
S
= 5 V
TEMPERATURE C
2.5
2.3
1.5
40
90
30
OFFSET VOLTAGE mV
20 10
0
10
20
30
40
50
60
70
80
2.1
1.9
1.7
V
S
= +5V
V
S
= 5V
Figure 4. Input Offset Voltage vs. Temperature
TEMPERATURE C
1
0.65
0.5
40
90
30
INPUT BIAS
A
20 10
0
10
20
30
40
50
60
70
80
0.95
0.7
0.6
0.55
0.85
0.75
0.9
0.8
V
S
= +5V
Figure 5. Input Bias Current vs. Temperature
COMMON-MODE VOLTAGE V
800
800
0
10
1
INPUT BIAS CURRENT nA
2
3
4
5
6
7
8
9
V
S
= +2.7V
600
400
200
0
200
400
600
V
S
= +5V
V
S
= +10V
Figure 6. Input Bias Current vs. Common-Mode Voltage
OFFSET VOLTAGE mV
COMMON-MODE VOLTAGE V
0
0.3
0.6
0
5
0.5
1
1.5
2
2.5
3
3.5
4
4.5
0.1
0.2
0.4
0.5
V
S
= +5V
Figure 7. V
OS
vs. Common-Mode Voltage
TEMPERATURE C
SUPPLY CURRENT/AMPLIFIER
A
1000
750
600
40
90
30 20 10
0
10
20
30
40
50
60
70
80
950
800
700
650
900
850
I
S
, V
S
= 5V
+I
S
, V
S
= +5V
+I
S
, V
S
= +2.7V
Figure 8. Supply Current vs. Temperature
AD8031/AD8032
7
REV. B
R
LOAD
Ohms
0
0.5
2.5
100
10k
1k
DIFFERENCE FROM V
CC
Volts
1
1.5
2
V
CC
V
EE
V
IN
R
LOAD
V
OUT
V
CC
2
V
CC
= +2.7V
V
CC
= +10V
V
CC
= +5V
Figure 9. +Output Saturation Voltage vs. R
LOAD
@ +85
C
R
LOAD
Ohms
0
0.5
2.5
100
10k
1k
DIFFERENCE FROM V
CC
Volts
1
1.5
2
V
CC
V
EE
V
IN
R
LOAD
V
OUT
V
CC
2
V
CC
= +2.7V
V
CC
= +10V
V
CC
= +5V
Figure 10. +Output Saturation Voltage vs. R
LOAD
@ +25
C
R
LOAD
Ohms
0
0.5
2.5
100
10k
1k
DIFFERENCE FROM V
CC
Volts
1
1.5
2
V
CC
V
EE
V
IN
R
LOAD
V
OUT
V
CC
2
V
CC
= +2.7V
V
CC
= +10V
V
CC
= +5V
Figure 11. +Output Saturation Voltage vs. R
LOAD
@ 40
C
1.2
1
0
DIFFERENCE FROM V
EE
Volts
100
10k
1k
0.6
0.4
0.2
0.8
R
LOAD
Ohms
V
CC
V
EE
V
IN
R
LOAD
V
OUT
V
CC
2
V
CC
= +2.7V
V
CC
= +10V
V
CC
= +5V
Figure 12. Output Saturation Voltage vs. R
LOAD
@ +85
C
1.2
1
0
100
10k
1k
0.6
0.4
0.2
0.8
R
LOAD
Ohms
DIFFERENCE FROM V
CC
Volts
V
CC
V
EE
V
IN
R
LOAD
V
OUT
V
CC
2
V
CC
= +2.7V
V
CC
= +10V
V
CC
= +5V
Figure 13. Output Saturation Voltage vs. R
LOAD
@ +25
C
1.2
1
0
DIFFERENCE FROM V
EE
Volts
100
10k
1k
0.6
0.4
0.2
0.8
R
LOAD
Ohms
V
CC
V
EE
V
IN
R
LOAD
V
OUT
V
CC
2
V
CC
= +2.7V
V
CC
= +10V
V
CC
= +5V
Figure 14. Output Saturation Voltage vs. R
LOAD
@ 40
C
AD8031/AD8032Typical Performance Characteristics
8
REV. B
R
LOAD
Ohms
110
105
60
0
10k
2k
4k
6k
8k
90
75
70
65
100
95
80
85
GAIN dB
V
S
= +5V
A
OL
+A
OL
Figure 15. Open-Loop Gain (A
OL
) vs. R
LOAD
TEMPERATURE C
86
84
76
40
90
30 20 10
0
10
20
30
40
50
60
70
80
82
80
78
GAIN dB
V
S
= +5V
R
L
= 1k
A
OL
+A
OL
Figure 16. Open-Loop Gain (A
OL
) vs. Temperature
V
OUT
V
A
OL
dB
110
80
50
0
5
0.5
1
1.5
2
2.5
3
3.5
4
4.5
100
90
70
60
V
S
= +5V
R
LOAD
= 10k
R
LOAD
= 1k
Figure 17. Open-Loop Gain (A
OL
) vs. V
OUT
10
0%
100
90
1V
500mV
V
S
= +5V
500mV
10
0
10
1.5
0.5
2.5
4.5
6.5
INPUT VOLTAGE Volts
INPUT BIAS CURRENT mA
Figure 18. Differential Input Overvoltage I-V
Characteristics
0.05
DIFF GAIN %
0.15
0.05
0.10
0.00
11th
1st
2nd
3rd
4th
5th
6th
7th
8th
9th
10th
11th
1st
2nd
3rd
4th
5th
6th
7th
8th
9th
10th
0.10
DIFF PHASE Degrees
0.10
0.00
0.05
0.05
Figure 19. Differential Gain and Phase @ V
S
=
5 V;
R
L
= 1 k
FREQUENCY Hz
100
30
0.3
10
10M
100
1k
10k
100k
1M
10
3
1
V
S
= +5V
INPUT VOLTAGE NOISE nV/
Hz
VOLTAGE NOISE
CURRENT NOISE
100
10
1
0.1
INPUT CURRENT NOISE pA/
Hz
Figure 20. Input Voltage Noise vs. Frequency
AD8031/AD8032
9
REV. B
FREQUENCY MHz
0.1
100
NORMALIZED GAIN dB
1
10
5
4
5
3
2
1
0
1
2
3
4
V
S
= +5V
G = +1
R
L
= 1k
Figure 21. Unity Gain , 3 dB Bandwidth
FREQUENCY MHz
0.1
100
NORMALIZED GAIN dB
1
10
5
3
2
1
0
1
2
3
4
V
S
= +5V
V
IN
= 16dBm
+85 C
40 C
+25 C
V
S
V
IN
V
OUT
50
2k
Figure 22. Closed-Loop Gain vs. Temperature
FREQUENCY Hz
100k
100M
CLOSED-LOOP GAIN dB
1M
10M
8
2
1
0
1
4
5
6
7
V
S
= 5V
2
3
G = +1
C
L
= 5pF
R
L
= 1k
V
S
= +2.7V
R
L
+ C
L
TO 1.35V
V
S
= +5V
R
L
+ C
L
TO 2.5V
Figure 23. Closed-Loop Gain vs. Supply Voltage
FREQUENCY MHz
0.3
100
PHASE Degree
1
10
20
30
20
10
0
10
40
90
135
180
225
PHASE
GAIN
OPEN-LOOP GAIN dB
Figure 24. Open-Loop Frequency Response
FUNDAMENTAL FREQUENCY Hz
1k
10M
TOTAL HARMONIC DISTORTION dBc
100k
1M
80
20
30
40
50
60
70
2.5V p-p
V
S
= +2.7V
10k
G = +1, R
L
= 2k TO
V
CC
2
4.8V p-p
V
S
= +5V
2V p-p
V
S
= +2.7V
1.3V p-p
V
S
= +2.7V
Figure 25. Total Harmonic Distortion vs. Frequency; G = +1
FUNDAMENTAL FREQUENCY Hz
1k
10M
TOTAL HARMONIC DISTORTION dBc
100k
1M
80
20
30
40
50
60
70
4.6V p-p
10k
4V p-p
G = +2
V
S
= +5V
R
L
= 1k TO
V
CC
2
90
1V p-p
4.8V p-p
Figure 26. Total Harmonic Distortion vs. Frequency; G = +2
10
REV. B
AD8031/AD8032Typical Performance Characteristics
FREQUENCY Hz
1k
10M
100k
1M
0
10
8
6
4
2
V
S
= 5V
10k
V
S
= +5V
V
S
= +2.7V
OUTPUT V p-p
Figure 27. Large Signal Response
FREQUENCY MHz
0.1
100
R
OUT
1
10
100
50
10
1
0.1
RB
T
= 50
200
RB
T
= 0
V
OUT
RB
T
Figure 28. R
OUT
vs. Frequency
V
S
= +5V
FREQUENCY Hz
100k
COMMON-MODE REJECTION RATIO dB
1k
10k
0
40
60
80
1M
20
100
10M
100
Figure 29. CMRR vs. Frequency
V
S
= +5V
FREQUENCY Hz
100k
POWER SUPPLY REJECTION RATIO dB
1k
10k
0
40
60
80
100
1M
20
100
10M
120
100M
Figure 30. PSRR vs. Frequency
10 s / Div
V
S
= +5V
R
L
= 10k TO 2.5V
5.5
4.5
3.5
1.5
0.5
0.5
1V / Div
2.5
V
IN
= 6V p-p
G = +1
Figure 31. Output Voltage
10 s / Div
V
S
= +5V
G = +1
INPUT = 650mV
BEYOND RAILS
5.5
4.5
3.5
1.5
0.5
1V / Div
2.5
INPUT
0.5
Figure 32. Output Voltage Phase Reversal Behavior
AD8031/AD8032
11
REV. B
10 s / Div
V
S
= +5V
R
L
= 1k
G = 1
500mV/
Div
0
R
L
TO
+2.5V
R
L
TO GND
Figure 33. Output Swing
50ns/Div
G = +2
R
F
= R
G
= 2.5k
R
L
= 2k
C
L
= 5pF
V
S
= +5V
3.1
2.9
2.7
2.3
2.1
1.9
200mV/
Div
2.5
Figure 34. 1 V Step Response
10 s / Div
V
S
= +2.7V
R
L
= 1k
G = 1
2.85
2.35
1.85
0.85
0.35
1.35
R
L
TO GND
R
L
TO
1.35V
500mV/Div
Figure 35. Output Swing
50ns / Div
G = +1
R
F
= 0
R
L
= 2k TO 2.5V
C
L
= 5pF TO 2.5V
V
S
= +5V
2.56
2.54
2.52
2.48
2.46
2.44
2.50
20mV/
Div
Figure 36. 100 mV Step Response
FREQUENCY MHz
0.1
100
CROSSTALK
d
B
1
10
50
60
70
100
200
50
1k
2.5k
2.5k
V
IN
TRANSMITTER
V
OUT
50
2.5k
2.5k
RECEIVER
80
90
V
S
= 2.5V
V
IN
= +10dBm
Figure 37. Crosstalk vs. Frequency
AD8031/AD8032
12
REV. B
THEORY OF OPERATION
The AD8031/AD8032 are single and dual versions of high
speed, low power voltage feedback amplifiers featuring an inno-
vative architecture that maximizes the dynamic range capability
on the inputs and outputs. Linear input common-mode range
exceeds either supply voltage by 200 mV, and the amplifiers
show no phase reversal up to 500 mV beyond supply. The out-
put swings to within 20 mV of either supply when driving a light
load; 300 mV when driving up to 5 mA.
Fabricated on Analog Devices' XFCB, a 4 GHz dielectrically
isolated fully complementary bipolar process, the amplifier
provides an impressive 80 MHz bandwidth when used as a
follower and 30 V/
s slew rate at only 800
A supply current.
Careful design allows the amplifier to operate with a supply
voltage as low as 2.7 volts.
Input Stage Operation
A simplified schematic of the input stage appears in Figure 38.
For common-mode voltages up to 1.1 volts within the positive
supply, (0 V to 3.9 V on a single 5 V supply) tail current I2
flows through the PNP differential pair, Q13 and Q17. Q5 is cut
off; no bias current is routed to the parallel NPN differential
pair Q2 and Q3. As the common-mode voltage is driven within
1.1 V of the positive supply, Q5 turns on and routes the tail
current away from the PNP pair and to the NPN pair. During
this transition region, the amplifier's input current will change
magnitude and direction. Reusing the same tail current ensures
that the input stage has the same transconductance (which deter-
mines the amplifier's gain and bandwidth) in both regions of
operation.
Switching to the NPN pair as the common-mode voltage is
driven beyond 1 V within the positive supply allows the ampli-
fier to provide useful operation for signals at either end of the
supply voltage range and eliminates the possibility of phase
reversal for input signals up to 500 mV beyond either power
supply. Offset voltage will also change to reflect the offset of the
input pair in control. The transition region is small, on the order
of 180 mV. These sudden changes in the dc parameters of
the input stage can produce glitches that will adversely affect
distortion.
Overdriving the Input Stage
Sustained input differential voltages greater than 3.4 volts
should be avoided as the input transistors may be damaged.
Input clamp diodes are recommended if the possibility of this
condition exists.
The voltages at the collectors of the input pairs are set to 200 mV
from the power supply rails. This allows the amplifier to remain
in linear operation for input voltages up to 500 mV beyond the
supply voltages. Driving the input common-mode voltage be-
yond that point will forward bias the collector junction of the
input transistor, resulting in phase reversal. Sustaining this
condition for any length of time should be avoided as it is easy
to exceed the maximum allowed input differential voltage when
the amplifier is in phase reversal.
Q3
R8
850
R9
850
Q2
Q13
R6
850
R7
850
Q17
Q6
Q8
Q10
4
I4
25 A
Q14
4
1
1
Q7
Q15
1
Q11
4
1
4
Q16
Q18
Q4
R4
2k
R3
2k
R1
2k
R2
2k
I3
25 A
I2
90 A
V
CC
V
IN
V
IP
Q5
Q9
R5
50k
I1
5 A
V
EE
OUTPUT STAGE,
COMMON-MODE
FEEDBACK
1.1V
Figure 38. Simplified Schematic of AD8031 Input Stage
AD8031/AD8032
13
REV. B
Output Overdrive Recovery
Output overdrive of an amplifier occurs when the amplifier
attempts to drive the output voltage to a level outside its normal
range. After the overdrive condition is removed, the amplifier
must recover to normal operation in a reasonable amount of
time. As shown in Figure 40, the AD8031/AD8032 recover
within 100 ns from negative overdrive and within 80 ns from
positive overdrive.
V
S
= 2.5V
V
IN
= 2.5V
R
L
= +1k TO GND
100ns
1V
R
F
= R
G
= 2k
V
OUT
R
F
50
R
G
V
IN
R
L
Figure 40. Overdrive Recovery
Driving Capacitive Loads
Capacitive loads interact with an op amp's output impedance to
create an extra delay in the feedback path. This reduces circuit
stability, and can cause unwanted ringing and oscillation. A
given value of capacitance causes much less ringing when the
amplifier is used with a higher noise gain.
The capacitive load drive of the AD8031/AD8032 can be in-
creased by adding a low valued resistor in series with the capaci-
tive load. Introducing a series resistor tends to isolate the
capacitive load from the feedback loop, thereby, diminishing its
influence. Figure 41 shows the effects of a series resistor on
capacitive drive for varying voltage gains. As the closed-loop
gain is increased, the larger phase margin allows for larger ca-
pacitive loads with less overshoot. Adding a series resistor at
lower closed-loop gains accomplishes the same effect. For large
capacitive loads, the frequency response of the amplifier will be
dominated by the roll-off of the series resistor and capacitive
load.
1000
10
100
0
1
4
CAPACITIVE LOAD pF
CLOSED-LOOP GAIN V/V
2
3
R
G
C
L
R
F
V
OUT
V
S
= +5V
200mV STEP
WITH 30% OVERSHOOT
R
S
= 20
R
S
= 0 , 5
1
5
R
S
= 20
R
S
R
S
= 0
R
S
= 5
Figure 41. Capacitive Load Drive vs. Closed-Loop Gain
Output Stage, Open-Loop Gain and Distortion vs. Clearance
from Power Supply
The AD8031 features a rail-to-rail output stage. The output
transistors operate as common emitter amplifiers, providing the
output drive current as well as a large portion of the amplifier's
open-loop gain.
Q37
R29
300
Q47
Q21
Q20
Q51
Q27
Q68
Q44
Q42
Q48
Q49
Q50
Q43
C5
1.5pF
I4
25 A
V
OUT
Q38
I1
25 A
DIFFERENTIAL
DRIVE
FROM
INPUT STAGE
I5
25 A
I2
25 A
C9
5pF
Figure 39. Output Stage Simplified Schematic
The output voltage limit depends on how much current the
output transistors are required to source or sink. For applica-
tions with very low drive requirements (a unity gain follower
driving another amplifier input, for instance), the AD8031 typi-
cally swings within 20 mV of either voltage supply. As the re-
quired current load increases, the saturation output voltage will
increase linearly as I
LOAD
R
C
, where I
LOAD
is the required load
current and R
C
is the output transistor collector resistance. For
the AD8031, the collector resistances for both output transistors
are typically 25
. As the current load exceeds the rated output
current of 15 mA, the amount of base drive current required to
drive the output transistor into saturation will reach its limit,
and the amplifier's output swing will rapidly decrease.
The open-loop gain of the AD8031 decreases approximately
linearly with load resistance and also depends on the output
voltage. Open-loop gain stays constant to within 250 mV of the
positive power supply, 150 mV of the negative power supply and
then decreases as the output transistors are driven further into
saturation.
The distortion performance of the AD8031/AD8032 amplifiers
differs from conventional amplifiers. Typically an amplifier's
distortion performance degrades as the output voltage ampli-
tude increases.
Used as a unity gain follower, the AD8031/AD8032 output will
exhibit more distortion in the peak output voltage region around
V
CC
0.7 V. This unusual distortion characteristic is caused by
the input stage architecture and is discussed in detail in the
section covering "Input Stage Operation."
AD8031/AD8032
14
REV. B
APPLICATIONS
A 2 MHz Single Supply Biquad Bandpass Filter
Figure 42 shows a circuit for a single supply biquad bandpass
filter with a center frequency of 2 MHz. A 2.5 V bias level is
easily created by connecting the noninverting inputs of all three
op amps to a resistor divider consisting of two 1 k
resistors
connected between +5 V and ground. This bias point is also
decoupled to ground with a 0.1
F capacitor. The frequency
response of the filter is shown in Figure 43.
In order to maintain an accurate center frequency, it is essential
that the op amp has sufficient loop gain at 2 MHz. This requires
the choice of an op amp with a significantly higher unity gain
crossover frequency. The unity gain crossover frequency of the
AD8031/AD8032 is 40 MHz. Multiplying the open-loop gain by
the feedback factors of the individual op amp circuits yields the
loop gain for each gain stage. From the feedback networks of the
individual op amp circuits, we can see that each op amp has a
loop gain of at least 21 dB. This level is high enough to ensure
that the center frequency of the filter is not affected by the op
amp's bandwidth. If, for example, an op amp with a gain band-
width product of 10 MHz was chosen in this application, the
resulting center frequency would shift by 20% to 1.6 MHz.
+5V
0.1 F
0.1 F
V
IN
R2
2k
1k
1k
AD8031
C1
50pF
R1
3k
R3
2k
+5V
0.1 F
R4
2k
1/2
AD8032
R5
2k
V
OUT
1/2
AD8032
C2
50pF
R6
1k
Figure 42. A 2 MHz Biquad Bandpass Filter Using AD8031/
AD8032
1M
FREQUENCY Hz
10k
100M
GAIN dB
100k
10M
50
0
10
30
40
20
Figure 43. Frequency Response of 2 MHz Bandpass Filter
High Performance Single Supply Line Driver
Even though the AD8031/AD8032 swing close to both rails,
the AD8031 has optimum distortion performance when the
signal has a common-mode level half way between the supplies
and when there is about 500 mV of headroom to each rail. If
low distortion is required in single supply applications for sig-
nals that swing close to ground, an emitter follower circuit can
be used at the op amp output.
+5V
0.1 F
7
3
2
2N3904
200
V
OUT
6
2.49k
49.9
4
10 F
AD8031
V
IN
2.49k
49.9
49.9
Figure 44. Low Distortion Line Driver for Single Supply
Ground Referenced Signals
AD8031/AD8032
15
REV. B
Figure 44 shows the AD8031 configured as a single supply gain-
of-2 line driver. With the output driving a back terminated 50
line, the overall gain from V
IN
to V
OUT
is unity. In addition to
minimizing reflections, the 50
back termination resistor pro-
tects the transistor from damage if the cable is short circuited.
The emitter follower, which is inside the feedback loop, ensures
that the output voltage from the AD8031 stays about 700 mV
above ground. Using this circuit, very low distortion is attain-
able even when the output signal swings to within 50 mV of
ground. The circuit was tested at 500 kHz and 2 MHz. Figures
45 and 46 show the output signal swing and frequency spectrum
at 500 kHz. At this frequency, the output signal (at V
OUT
),
which has a peak-to-peak swing of 1.95 V (50 mV to 2 V), has a
THD of 68 dB (SFDR = 77 dB).
2V
50mV
10
0%
100
90
1 s
0.5V
Figure 45. Output Signal Swing of Low Distortion Line
Driver at 500 kHz
STOP 5MHz
VERTICAL SCALE 10dB/Div
START 0Hz
+9dBm
Figure 46. THD of Low Distortion Line Driver at 500 kHz
Figures 47 and 48 show the output signal swing and frequency
spectrum at 2 MHz. As expected, there is some degradation in
signal quality at the higher frequency. When the output signal
has a peak-to-peak swing of 1.45 V (swinging from 50 mV to
1.5 V), the THD is 55 dB (SFDR = 60 dB).
This circuit could also be used to drive the analog input of a
single supply high speed ADC whose input voltage range is
referenced to ground (e.g., 0 V to 2 V or 0 V to 4 V). In this
case, a back termination resistor is not necessary (assuming a
short physical distance from transistor to ADC), so the emit-
ter of the external transistor would be connected directly to the
ADC input. The available output voltage swing of the circuit
would, therefore be doubled.
50mV
10
0%
100
90
200ns
0.2V
1.5V
Figure 47. Output Signal Swing of Low Distortion Line
Driver at 2 MHz
START 0Hz
STOP 20MHz
VERTICAL SCALE 10dB/Div
+7dBm
Figure 48. THD of Low Distortion Line Driver at 2 MHz
AD8031/AD8032
16
REV. B
C2152b09/99
PRINTED IN U.S.A.
8-Lead Plastic DIP
(N-8)
8
1
4
5
PIN 1
0.39 (9.91)
MAX
0.25
(6.35)
0.31
(7.87)
SEATING
PLANE
0.125 (3.18)
MIN
0.10
(2.54)
BSC
0.033
(0.84)
NOM
0.165
0.01
(4.19
0.25)
0.018
0.003
(0.46
0.08)
0.035
0.01
(0.89
0.25)
0.18
0.03
(4.57
0.76)
0.011
0.003
(0.28
0.08)
15
0
0.30 (7.62)
REF
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Lead Plastic SOIC
(SO-8)
0.1968 (5.00)
0.1890 (4.80)
8
5
4
1
0.2440 (6.20)
0.2284 (5.80)
PIN 1
0.1574 (4.00)
0.1497 (3.80)
0.0688 (1.75)
0.0532 (1.35)
SEATING
PLANE
0.0098 (0.25)
0.0040 (0.10)
0.0192 (0.49)
0.0138 (0.35)
0.0500
(1.27)
BSC
0.0098 (0.25)
0.0075 (0.19)
0.0500 (1.27)
0.0160 (0.41)
8
0
0.0196 (0.50)
0.0099 (0.25)
x 45
8-Lead SOIC
(RM-8)
8
5
4
1
0.122 (3.10)
0.114 (2.90)
0.199 (5.05)
0.187 (4.75)
PIN 1
0.0256 (0.65) BSC
0.122 (3.10)
0.114 (2.90)
SEATING
PLANE
0.006 (0.15)
0.002 (0.05)
0.018 (0.46)
0.008 (0.20)
0.043 (1.09)
0.037 (0.94)
0.120 (3.05)
0.112 (2.84)
0.011 (0.28)
0.003 (0.08)
0.028 (0.71)
0.016 (0.41)
33
27
0.120 (3.05)
0.112 (2.84)
5-Lead Plastic Surface Mount (SOT-23)
(RT-5)
0.1181 (3.00)
0.1102 (2.80)
PIN 1
0.0669 (1.70)
0.0590 (1.50)
0.1181 (3.00)
0.1024 (2.60)
1
3
4
5
0.0748 (1.90)
BSC
0.0374 (0.95) BSC
2
0.0079 (0.20)
0.0031 (0.08)
0.0217 (0.55)
0.0138 (0.35)
10
0
0.0197 (0.50)
0.0138 (0.35)
0.0059 (0.15)
0.0019 (0.05)
0.0512 (1.30)
0.0354 (0.90)
SEATING
PLANE
0.0571 (1.45)
0.0374 (0.95)
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