FUNCTIONAL BLOCK DIAGRAM
1
2
3
4
8
7
6
5
AD828
V+
OUT2
IN2
+IN2
OUT1
IN1
+IN1
V
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
Dual, Low Power
Video Op Amp
AD828
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
Analog Devices, Inc., 2000
FEATURES
Excellent Video Performance
Differential Gain & Phase Error of 0.01% & 0.05
High Speed
130 MHz 3 dB Bandwidth (G = +2)
450 V/ s Slew Rate
80 ns Settling Time to 0.01%
Low Power
15 mA Max Power Supply Current
High Output Drive Capability:
50 mA Minimum Output Current per Amplifier
Ideal for Driving Back Terminated Cables
Flexible Power Supply
Specified for +5 V, 5 V and 15 V Operation
3.2 V Min Output Swing into a 150 Load
(V
S
= 5 V)
Excellent DC Performance
2.0 mV Input Offset Voltage
Available in 8-Lead SOIC and 8-Lead Plastic Mini-DIP
PRODUCT DESCRIPTION
The AD828 is a low cost, dual video op amp optimized for use
in video applications which require gains of +2 or greater and
high output drive capability, such as cable driving. Due to its
low power and single supply functionality, along with excellent
differential gain and phase errors, the AD828 is ideal for power
sensitive applications such as video cameras and professional
video equipment.
With video specs like 0.1 dB flatness to 40 MHz and low differ-
ential gain and phase errors of 0.01% and 0.05
, along with
50 mA of output current per amplifier, the AD828 is an excel-
lent choice for any video application. The 130 MHz gain
bandwidth and 450 V/
s slew rate make the AD828 useful in
many high speed applications including: video monitors, CATV,
color copiers, image scanners and fax machines.
1/2
AD828
0.1 F
0.1 F
V
V
R
BT
75
75
R
T
75
1k
R
T
75
1k
V
IN
Figure 1. Video Line Driver
The AD828 is fully specified for operation with a single +5 V
power supply and with dual supplies from
5 V to 15 V. This
power supply flexibility, coupled with a very low supply current
of 15 mA and excellent ac characteristics under all power supply
conditions, make the AD828 the ideal choice for many demand-
ing yet power sensitive applications.
The AD828 is a voltage feedback op amp which excels as a gain
stage (gains >+2) or active filter in high speed and video systems
and achieves a settling time of 45 ns to 0.1%, with a low input
offset voltage of 2 mV max.
The AD828 is available in low cost, small 8-lead plastic mini-
DIP and SOIC packages.
0.04
15
0.07
0.05
0.06
5
10
0.03
0.01
0.02
SUPPLY VOLTAGE Volts
DIFFERENTIAL PHASE
Degrees
DIFFERENTIAL GAIN
Percent
DIFF GAIN
DIFF PHASE
Figure 2. Differential Phase vs. Supply Voltage
REV. B
2
AD828SPECIFICATIONS
(@ T
A
= +25 C, unless otherwise noted)
AD828
Parameter
Conditions
V
S
Min
Typ
Max
Unit
DYNAMIC PERFORMANCE
3 dB Bandwidth
Gain = +2
5 V
60
85
MHz
15 V
100
130
MHz
0, +5 V
30
45
MHz
Gain = 1
5 V
35
55
MHz
15 V
60
90
MHz
0, +5 V
20
35
MHz
Bandwidth for 0.1 dB Flatness
Gain = +2
5 V
30
43
MHz
C
C
= 1 pF
15 V
30
40
MHz
0, +5 V
10
18
MHz
Gain = 1
5 V
15
25
MHz
C
C
= 1 pF
15 V
30
50
MHz
0, +5 V
10
19
MHz
Full Power Bandwidth
1
V
OUT
= 5 V p-p
R
LOAD
= 500
5 V
22.3
MHz
V
OUT
= 20 V p-p
R
LOAD
= 1 k
15 V
7.2
MHz
Slew Rate
R
LOAD
1 k
5 V
300
350
V/
s
Gain = 1
15 V
400
450
V/
s
0, +5 V
200
250
V/
s
Settling Time to 0.1%
2.5 V to +2.5 V
5 V
45
ns
0 V10 V Step, A
V
= 1
15 V
45
ns
Settling Time
to 0.01%
2.5 V to +2.5 V
5 V
80
ns
0 V10 V Step, A
V
= 1
15 V
80
ns
NOISE/HARMONIC PERFORMANCE
Total Harmonic Distortion
F
C
= 1 MHz
15 V
78
dB
Input Voltage Noise
f = 10 kHz
5 V, 15 V
10
nV/
Hz
Input Current Noise
f = 10 kHz
5 V, 15 V
1.5
pA/
Hz
Differential Gain Error
NTSC
15 V
0.01
0.02
%
(R
L
= 150
)
Gain = +2
5 V
0.02
0.03
%
0, +5 V
0.08
%
Differential Phase Error
NTSC
15 V
0.05
0.09
Degrees
(R
L
= 150
)
Gain = +2
5 V
0.07
0.1
Degrees
0, +5 V
0.1
Degrees
DC PERFORMANCE
Input Offset Voltage
5 V, 15 V
0.5
2
mV
T
MIN
to T
MAX
3
mV
Offset Drift
10
V/C
Input Bias Current
5 V, 15 V
3.3
6.6
A
T
MIN
10
A
T
MAX
4.4
A
Input Offset Current
5 V, 15 V
25
300
nA
T
MIN
to T
MAX
500
nA
Offset Current Drift
0.3
nA/
C
Open Loop Gain
V
OUT
=
2.5 V
5 V
R
LOAD
= 500
3
5
V/mV
T
MIN
to T
MAX
2
V/mV
R
LOAD
= 150
2
4
V/mV
V
OUT
=
10 V
15 V
R
LOAD
= 1 k
5.5
9
V/mV
T
MIN
to T
MAX
2.5
V/mV
V
OUT
=
7.5 V
15 V
R
LOAD
= 150
(50 mA Output)
3
5
V/mV
INPUT CHARACTERISTICS
Input Resistance
300
k
Input Capacitance
1.5
pF
Input Common-Mode Voltage Range
5 V
+3.8
+4.3
V
2.7
3.4
V
15 V
+13
+14.3
V
12
13.4
V
0, +5 V
+3.8
+4.3
V
+1.2
+0.9
V
Common-Mode Rejection Ratio
V
CM
= +2.5 V, T
MIN
to T
MAX
5 V
82
100
dB
V
CM
=
12 V
15 V
86
120
dB
T
MIN
to T
MAX
15 V
84
100
dB
Parameter
Conditions
V
S
Min
Typ
Max
Unit
OUTPUT CHARACTERISTICS
Output Voltage Swing
R
LOAD
= 500
5 V
3.3
3.8
V
R
LOAD
= 150
5 V
3.2
3.6
V
R
LOAD
= 1 k
15 V
13.3
13.7
V
R
LOAD
= 500
15 V
12.8
13.4
V
+1.5,
R
LOAD
= 500
0, +5 V
+3.5
V
Output Current
15 V
50
mA
5 V
40
mA
0, +5 V
30
mA
Short-Circuit Current
15 V
90
mA
Output Resistance
Open Loop
8
MATCHING CHARACTERISTICS
Dynamic
Crosstalk
f = 5 MHz
15 V
80
dB
Gain Flatness Match
G = +1, f = 40 MHz
15 V
0.2
dB
Skew Rate Match
G = 1
15 V
10
V/
s
DC
Input Offset Voltage Match
T
MIN
to T
MAX
5 V, 15 V
0.5
2
mV
Input Bias Current Match
T
MIN
to T
MAX
5 V, 15 V
0.06
0.8
A
Open-Loop Gain Match
V
O
=
10 V, R
L
= 1 k
, T
MIN
to T
MAX
15 V
0.01
0.15
mV/V
Common-Mode Rejection Ratio Match V
CM
=
12 V, T
MIN
to T
MAX
15 V
80
100
dB
Power Supply Rejection Ratio Match
5 V to 15 V, T
MIN
to T
MAX
80
100
dB
POWER SUPPLY
Operating Range
Dual Supply
2.5
18
V
Single Supply
+5
+36
V
Quiescent Current
5 V
14.0
15
mA
T
MIN
to T
MAX
5 V
14.0
15
mA
T
MIN
to T
MAX
5 V
15
mA
Power Supply Rejection Ratio
V
S
=
5 V to 15 V, T
MIN
to T
MAX
80
90
dB
NOTES
1
Full power bandwidth = slew rate/2
V
PEAK
.
Specifications subject to change without notice.
AD828
REV. B
3
ABSOLUTE MAXIMUM RATINGS
1
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
18 V
Internal Power Dissipation
2
Plastic DIP (N) . . . . . . . . . . . . . . . . . . See Derating Curves
Small Outline (R) . . . . . . . . . . . . . . . . . See Derating Curves
Input Voltage (Common Mode) . . . . . . . . . . . . . . . . . . . .
V
S
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . .
6 V
Output Short Circuit Duration . . . . . . . . See Derating Curves
Storage Temperature Range (N, R) . . . . . . . 65
C to +125C
Operating Temperature Range . . . . . . . . . . . 40
C to +85C
Lead Temperature Range (Soldering 10 sec) . . . . . . . . +300
C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2
Specification is for device in free air:
8-Lead Plastic DIP Package:
JA
= 100
C/Watt
8-Lead SOIC Package:
JA
= 155
C/Watt
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD828 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
2.0
0
50
90
1.5
0.5
30
1.0
50
70
30
10
10
80
40
40
60
20
0
20
AMBIENT TEMPERATURE C
MAXIMUM POWER DISSIPATION
Watts
8-LEAD MINI-DIP PACKAGE
8-LEAD SOIC PACKAGE
T
J
= +150 C
Figure 3. Maximum Power Dissipation vs.
Temperature for Different Package Types
WARNING!
ESD SENSITIVE DEVICE
ORDERING GUIDE
Temperature
Package
Package
Model
Range
Description
Option
AD828AN
40
C to +85C 8-Lead Plastic DIP N-8
AD828AR
40
C to +85C 8-Lead Plastic SOIC SO-8
AD828AR-REEL7 40
C to +85C 7" Tape & Reel
SO-8
AD828AR-REEL 40
C to +85C 13" Tape & Reel
SO-8
AD828Typical Characteristics
REV. B
4
20
0
0
20
15
5
5
10
10
15
INPUT COMMON-MODE RANGE
Volts
SUPPLY VOLTAGE Volts
VCM
+VCM
Figure 4. Common-Mode Voltage Range vs. Supply
Voltage
20
0
0
20
15
5
5
10
10
15
SUPPLY VOLTAGE Volts
OUTPUT VOLTAGE SWING
Volts
R
L
= 150
R
L
= 500
Figure 5. Output Voltage Swing vs. Supply Voltage
30
0
10k
15
5
100
10
10
20
1k
25
OUTPUT VOLTAGE SWING
Volts p-p
LOAD RESISTANCE
Vs = 15V
Vs = 5V
Figure 6. Output Voltage Swing vs. Load Resistance
40
C
7.7
5.7
0
20
7.2
6.2
5
6.7
10
15
SUPPLY VOLTAGE Volts
QUIESCENT SUPPLY CURRENT PER AMP
mA
+25
C
+85
C
Figure 7. Quiescent Supply Current per Amp vs. Supply
Voltage for Various Temperatures
SLEW RATE
V/
s
20
5
0
15
10
SUPPLY VOLTAGE Volts
300
400
450
500
350
Figure 8. Slew Rate vs. Supply Voltage
FREQUENCY Hz
100
1
0.01
1k
100M
10k
CLOSED-LOOP OUTPUT IMPEDANCE
100k
1M
10M
10
0.1
Figure 9. Closed-Loop Output Impedance vs. Frequency
AD828
REV. B
5
7
1
140
4
2
40
3
60
6
5
120
80
60
40
100
20
0
20
TEMPERATURE C
INPUT BIAS CURRENT
A
Figure 10. Input Bias Current vs. Temperature
130
30
140
90
50
40
70
60
110
120
100
80
60
40
20
0
20
TEMPERATURE C
SHORT CIRCUIT CURRENT
mA
SOURCE CURRENT
SINK CURRENT
Figure 11. Short Circuit Current vs. Temperature
80
40
60
140
70
50
40
60
100
120
80
60
40
20
0
20
TEMPERATURE
C
PHASE MARGIN
Degrees
PHASE MARGIN
40
70
50
60
3dB BANDWIDTH
MHz
80
GAIN BANDWIDTH
Figure 12. 3 dB Bandwidth and Phase Margin vs.
Temperature, Gain = +2
100
20
1G
40
0
10k
20
1k
80
60
100M
10M
1M
100k
FREQUENCY Hz
+100
+40
0
+20
+80
+60
PHASE MARGIN
De
g
rees
OPEN-LOOP GAIN
dB
15V SUPPLIES
5V SUPPLIES
PHASE 5V OR
15V SUPPLIES
R
L
= 1k
Figure 13. Open-Loop Gain and Phase Margin vs.
Frequency
6
3
100
1k
10k
4
5
7
8
LOAD RESISTANCE
OPEN-LOOP GAIN
V/mV
15V
5V
9
Figure 14. Open-Loop Gain vs. Load Resistance
100
10
100M
30
20
1k
100
40
50
60
70
80
90
10M
1M
100k
10k
FREQUENCY Hz
PSR
dB
+SUPPLY
SUPPLY
Figure 15. Power Supply Rejection vs. Frequency
AD828Typical Characteristics
REV. B
6
140
60
1k
10M
120
80
10k
100
100k
1M
FREQUENCY Hz
CMR
dB
Figure 16. Common-Mode Rejection vs. Frequency
30
10
0
100k
1M
100M
10M
20
FREQUENCY Hz
OUTPUT VOLTAGE
Volts p-p
R
L
= 1k
R
L
= 150
Figure 17. Large Signal Frequency Response
10
10
160
4
8
20
6
0
2
2
0
4
6
8
140
120
100
80
60
40
SETTLING TIME ns
OUTPUT SWING FROM 0 TO
V
0.1%
1%
1%
0.01%
0.01%
0.1%
Figure 18. Output Swing and Error vs. Settling Time
40
100
10M
70
90
1k
80
100
50
60
1M
100k
10k
FREQUENCY Hz
HARMONIC DISTORTION
dB
V
IN
= 1V p-p
GAIN = +2
2
ND
HARMONIC
3
RD
HARMONIC
Figure 19. Harmonic Distortion vs. Frequency
50
0
10M
30
10
10
20
0
40
1M
100k
10k
1k
100
FREQUENCY Hz
INPUT VOLTAGE NOISE
nV/ Hz
Figure 20. Input Voltage Noise Spectral Density vs.
Frequency
650
250
60
140
550
350
40
450
100
120
80
60
40
20
0
20
TEMPERATURE C
SLEW RATE
V/
s
Figure 21. Slew Rate vs. Temperature
AD828
REV. B
7
FREQUENCY Hz
GAIN
dB
10
0
10
100k
1M
100M
10M
2
4
6
8
2
4
6
8
V
OUT
V
IN
1k
150
AD828
1k
1pF
V
S
15V
5V
+5V
0.1dB
FLATNESS
40MHz
43MHz
18MHz
V
S
= 5V
V
S
= +5V
V
S
= 15V
Figure 22. Closed-Loop Gain vs. Frequency
SUPPLY VOLTAGE Volts
0.03
0.01
0.02
DIFFERENTIAL PHASE
Degrees
DIFFERENTIAL GAIN
Percent
0.04
15
0.07
0.05
0.06
5
10
DIFF GAIN
DIFF PHASE
Figure 23. Differential Gain and Phase vs. Supply Voltage
30
70
110
100k
100M
10M
1M
10k
90
50
60
80
100
40
FREQUENCY Hz
CROSSTALK
dB
R
L
= 150
R
L
= 1k
Figure 24. Crosstalk vs. Frequency
FREQUENCY Hz
GAIN
dB
5
0
5
100k
1M
100M
10M
1
2
3
4
1
2
3
4
V
S
= 5V
V
S
= +5V
V
S
= 15V
V
OUT
V
IN
1k
150
AD828
1k
1pF
V
S
15V
5V
+5V
0.1dB
FLATNESS
50MHz
25MHz
19MHz
Figure 25. Closed-Loop Gain vs. Frequency, G = 1
FREQUENCY Hz
GAIN
dB
1.0
0
1.0
100k
1M
100M
10M
0.2
0.4
0.6
0.8
0.2
0.4
0.6
0.8
V
S
= 5V
V
S
= 5V
V
S
= 15V
Figure 26. Gain Flatness Matching vs. Supply, G = +2
USE GROUND PLANE
PINOUT SHOWN IS FOR MINIDIP PACKAGE
0.1 F
V
IN
R
L
1/2
AD828
3
2
1
8
1 F
V
OUT
5
6
7
4
R
L
0.1 F
1 F
5V
1/2
AD828
+5V
Figure 27. Crosstalk Test Circuit
AD828Typical Characteristics
REV. B
8
8
3
2
+V
S
1
TEKTRONIX
P6201 FET
PROBE
HP PULSE (LS)
OR FUNCTION
(SS)
GENERATOR
1/2
AD828
1k
50
1k
3.3 F
0.01 F
R
L
V
OUT
3.3 F
V
S
V
IN
TEKTRONIX
7A24
PREAMP
0.01 F
4
C
F
Figure 28. Inverting Amplifier Connection
10
90
0%
100
50ns
2V
2V
Figure 29. Inverter Large Signal Pulse Response
5 V
S
,
C
F
= 1 pF, R
L
= 1 k
10
90
0%
100
10ns
200mV
200mV
Figure 30. Inverter Small Signal Pulse Response
5 V
S
,
C
F
= 1 pF, R
L
= 150
10
90
0%
100
50ns
5V
5V
Figure 31. Inverter Large Signal Pulse Response
15 V
S
,
C
F
= 1 pF, R
L
= 1 k
10
90
0%
100
10ns
200mV
200mV
Figure 32. Inverter Small Signal Pulse Response
15 V
S
,
C
F
= 1 pF, R
L
= 1500
10
90
0%
100
10ns
200mV
200mV
Figure 33. Inverter Small Signal Pulse Response
5 V
S
,
C
F
= 0 pF, R
L
= 150
AD828
REV. B
9
8
3
+V
S
1
TEKTRONIX
P6201 FET
PROBE
HP PULSE (LS)
OR FUNCTION
(SS)
GENERATOR
1/2
AD828
100
50
1k
3.3 F
0.01 F
R
L
V
OUT
3.3 F
V
S
V
IN
TEKTRONIX
7A24
PREAMP
0.01 F
4
C
F
1k
2
Figure 34. Noninverting Amplifier Connection
10
90
0%
100
50ns
2V
1V
Figure 35. Noninverting Large Signal Pulse Response
5 V
S
, C
F
= 1 pF, R
L
= 1 k
10
90
0%
100
200mV
100mV
10ns
Figure 36. Noninverting Small Signal Pulse Response
5 V
S
, C
F
= 1 pF, R
L
= 150
10
90
0%
100
50ns
5V
5V
Figure 37. Noninverting Large Signal Pulse Response
15 V
S
, C
F
= 1 pF, R
L
= 1 k
10
90
0%
100
200mV
100mV
10ns
Figure 38. Noninverting Small Signal Pulse Response
15 V
S
, C
F
= 1 pF, R
L
= 150
10
90
0%
100
200mV
100mV
10ns
Figure 39. Noninverting Small Signal Pulse Response
5 V
S
, C
F
= 0 pF, R
L
= 150
AD828
REV. B
10
THEORY OF OPERATION
The AD828 is a low cost, dual video operational amplifier
designed to excel in high performance, high output current video
applications.
The AD828 (Figure 40) consists of a degenerated NPN differen-
tial pair driving matched PNPs in a folded-cascode gain stage.
The output buffer stage employs emitter followers in a class AB
amplifier that delivers the necessary current to the load while
maintaining low levels of distortion.
The AD828 will drive terminated cables and capacitive loads of
10 pF or less. As the closed-loop gain is increased, the AD828
will drive heavier cap loads without oscillating.
IN
+IN
OUTPUT
+V
S
V
S
Figure 40. AD828 Simplified Schematic
INPUT CONSIDERATIONS
An input protection resistor (R
IN
in Figure 34) is required in cir-
cuits where the input to the AD828 will be subjected to transient
or continuous overload voltages exceeding the
6 V maximum
differential limit. This resistor provides protection for the input
transistors by limiting their maximum base current.
For high performance circuits, it is recommended that a "bal-
ancing" resistor be used to reduce the offset errors caused by
bias current flowing through the input and feedback resistors.
The balancing resistor equals the parallel combination of R
IN
and R
F
and thus provides a matched impedance at each input
terminal. The offset voltage error will then be reduced by more
than an order of magnitude.
APPLYING THE AD828
The AD828 is a breakthrough dual amp that delivers precision
and speed at low cost with low power consumption. The AD828
offers excellent static and dynamic matching characteristics,
combined with the ability to drive heavy resistive loads.
As with all high frequency circuits, care should be taken to main-
tain overall device performance as well as their matching. The
following items are presented as general design considerations.
Circuit Board Layout
Input and output runs should be laid out so as to physically
isolate them from remaining runs. In addition, the feedback
resistor of each amplifier should be placed away from the feedback
resistor of the other amplifier, since this greatly reduces interamp
coupling.
Choosing Feedback and Gain Resistors
In order to prevent the stray capacitance present at each
amplifier's summing junction from limiting its performance, the
feedback resistors should be
1 k. Since the summing junction
capacitance may cause peaking, a small capacitor (1 pF5 pF)
may be paralleled with Rf to neutralize this effect. Finally, sock-
ets should be avoided, because of their tendency to increase
interlead capacitance.
Power Supply Bypassing
Proper power supply decoupling is critical to preserve the integ-
rity of high frequency signals. In carefully laid out designs,
decoupling capacitors should be placed in close proximity to the
supply pins, while their lead lengths should be kept to a mini-
mum. These measures greatly reduce undesired inductive effects
on the amplifier's response.
Though two 0.1
F capacitors will typically be effective in de-
coupling the supplies, several capacitors of different values can
be paralleled to cover a wider frequency range.
PARALLEL AMPS PROVIDE 100 mA TO LOAD
By taking advantage of the superior matching characteristics of
the AD828, enhanced performance can easily be achieved by
employing the circuit in Figure 41. Here, two identical cells are
paralleled to obtain even higher load driving capability than that
of a single amplifier (100 mA min guaranteed). R1 and R2 are
included to limit current flow between amplifier outputs that
would arise in the presence of any residual mismatch.
2
+V
S
V
IN
V
OUT
3
8
1k
R2
5
V
S
R
L
1/2
AD828
1/2
AD828
1 F
0.1 F
7
5
6
1
1 F
0.1 F
4
R1
5
1k
1k
1k
Figure 41. Parallel Amp Configuration
AD828
REV. B
11
3
2
1
1/2
AD828
R
Z
A
IN
1/2
AD828
510
2
3
B
IN
R
Z
100FT
RG59A/U
R
Z
= 75
1
1/2
AD828
B
OUT
5
6
7
6
5
1/2
AD828
A
OUT
7
510
510
536
510
510
536
510
Full-Duplex Transmission
Superior load handling capability (50 mA min/amp), high band-
width, wide supply voltage range and excellent crosstalk
rejection makes the AD828 an ideal choice even for the most
demanding high speed transmission applications.
The schematic below shows a pair of AD828s configured to
drive 100 feet of coaxial cable in a full-duplex fashion.
Two different NTSC video signals are simultaneously applied at
A
IN
and B
IN
and are recovered at A
OUT
and B
OUT
, respectively.
This situation is illustrated in Figures 43 and 44. These pictures
clearly show that each input signal appears undisturbed at its
output, while the unwanted signal is eliminated at either receiver.
The transmitters operate as followers, while the receivers' gain is
chosen to take full advantage of the AD828's unparalleled CMRR.
(In practice this gain is adjusted slightly from its theoretical
value to compensate for cable nonidealities and losses.) R
Z
is
chosen to match the characteristic impedance of the cable
employed.
Finally, although a coaxial cable was used, the same topology
applies unmodified to a variety of cables (such, as twisted pairs
often used in telephony).
10
90
0%
100
500mV
500mV
10s
A
IN
B
OUT
Figure 43. A Transmission/B Reception
Figure 42. Bidirectional Transmission CKT
10
90
0%
100
500mV
500mV
10s
B
IN
A
OUT
Figure 44. B Transmission/A Reception
A High Performance Video Line Driver
The buffer circuit shown in Figure 45 will drive a back-
terminated 75
video line to standard video levels (1 V p-p)
with 0.1 dB gain flatness to 40 MHz with only 0.05
and 0.01%
differential phase and gain at the 3.58 MHz NTSC subcarrier
frequency. This level of performance, which meets the require-
ments for high-definition video displays and test equipment, is
achieved using only 7 mA quiescent current/amplifier.
3
2
1
1/2
AD828
8
0.1 F
4
+15V
15V
R
BT
75
R
T
75
V
IN
1k
1.0 F
0.1 F
1.0 F
1k
75
R
T
75
Figure 45. Video Line Driver
AD828
REV. B
12
C1823a06/00 (rev. B) 00879
PRINTED IN U.S.A.
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Lead Plastic Mini-DIP (N) Package
0.011
0.003
(0.28
0.08)
0.30 (7.62)
REF
15
0
PIN 1
4
5
8
1
0.25
(6.35)
0.31
(7.87)
0.10
(2.54)
BSC
SEATING
PLANE
0.035
0.01
(0.89
0.25)
0.18
0.03
(4.57
0.76)
0.033
(0.84)
NOM
0.018
0.003
(0.46
0.08)
0.125
(3.18)
MIN
0.165
0.01
(4.19
0.25)
0.39 (9.91) MAX
8-Lead SO (R) Package
8
5
4
1
0.1968 (5.00)
0.1890 (4.80)
0.2440 (6.20)
0.2284 (5.80)
PIN 1
0.1574 (4.00)
0.1497 (3.80)
0.0500 (1.27)
BSC
0.0688 (1.75)
0.0532 (1.35)
SEATING
PLANE
0.0098 (0.25)
0.0040 (0.10)
0.0192 (0.49)
0.0138 (0.35)
0.0098 (0.25)
0.0075 (0.19)
0.0500 (1.27)
0.0160 (0.41)
8
0
0.0196 (0.50)
0.0099 (0.25)
45
LOW DISTORTION LINE DRIVER
The AD828 can quickly be turned into a powerful, low distor-
tion line driver (see Figure 46). In this arrangement the AD828
can comfortably drive a 75
back-terminated cable, with a
5 MHz, 2 V p-p input; all of this while achieving the harmonic
distortion performance outlined in the following table.
Configuration
2nd Harmonic
1. No Load
78.5 dBm
2. 150
R
L
Only
63.8 dBm
3. 150
R
L
7.5
R
C
70.4 dBm
In this application one half of the AD828 operates at a gain of
2.1 and supplies the current to the load, while the other pro-
vides the overall system gain of 2. This is important for two
reasons: the first is to keep the bandwidth of both amplifiers the
same, and the second is to preserve the AD828's ability to oper-
ate from low supply voltage. R
C
varies with the load and must
be chosen to satisfy the following equation:
RC = MR
L
,
where M is defined by [(M + 1) G
S
= G
D
] and G
D
= Driver's
Gain, G
S
= System Gain.
+V
S
1.1k
R
L
R
C
7.5
75
75
75
0.1 F
1/2
AD828
3
2
1
8
1 F
1k
V
S
1k
V
IN
1/2
AD828
6
5
7
1k
0.1 F
1 F
4
Figure 46. Low Distortion Amplifier
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