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Электронный компонент: AD8620

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REV. D
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
2004 Analog Devices, Inc. All rights reserved.
AD8610/AD8620
Precision, Very Low Noise,
Low Input Bias Current, Wide Bandwidth
JFET Operational Amplifier
FUNCTIONAL BLOCK DIAGRAMS
8-Lead MSOP and SOIC
(RM-8 and R-8 Suffixes)
IN
IN
V
V
OUT
NULL
NC
1
4
5
8
AD8610
NULL
NC = NO CONNECT
8-Lead SOIC
(R-8 Suffix)
INA
INA
V
OUTB
INB
INB
V
1
4
5
8
AD8620
OUTA
FEATURES
Low Noise 6 nV/
Hz
Low Offset Voltage: 100 V Max
Low Input Bias Current 10 pA Max
Fast Settling: 600 ns to 0.01%
Low Distortion
Unity Gain Stable
No Phase Reversal
Dual-Supply Operation: 5 V to 13 V
APPLICATIONS
Photodiode Amplifier
ATE
Instrumentation
Sensors and Controls
High Performance Filters
Fast Precision Integrators
High Performance Audio
GENERAL DESCRIPTION
The AD8610/AD8620 is a very high precision JFET input amplifier
featuring ultralow offset voltage and drift, very low input voltage
and current noise, very low input bias current, and wide bandwidth.
Unlike many JFET amplifiers, the AD8610/AD8620 input bias
current is low over the entire operating temperature range. The
AD8610/AD8620 is stable with capacitive loads of over 1000 pF
in noninverting unity gain; much larger capacitive loads can be
driven easily at higher noise gains. The AD8610/AD8620 swings to
within 1.2 V of the supplies even with a 1 k
load, maximizing
dynamic range even with limited supply voltages. Outputs slew at
50 V/
s in either inverting or noninverting gain configurations, and
settle to 0.01% accuracy in less than 600 ns. Combined with the
high input impedance, great precision, and very high output drive, the
AD8610/AD8620 is an ideal amplifier for driving high performance
A/D inputs and buffering D/A converter outputs.
Applications for the AD8610/AD8620 include electronic instru-
ments; ATE amplification, buffering, and integrator circuits;
CAT/MRI/ultrasound medical instrumentation; instrumentation
quality photodiode amplification; fast precision filters (including
PLL filters); and high quality audio.
The AD8610/AD8620 is fully specified over the extended
industrial (40
C to +125C) temperature range. The AD8610
is available in the narrow 8-lead SOIC and the tiny MSOP8
surface-mount packages. The AD8620 is available in the narrow
8-lead SOIC package. MSOP8 packaged devices are available
only in tape and reel.
REV. D
2
AD8610/AD8620SPECIFICATIONS
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
INPUT CHARACTERISTICS
Offset Voltage (AD8610B)
V
OS
45
100
V
40
C < T
A
< +125
C
80
200
V
Offset Voltage (AD8620B)
V
OS
45
150
V
40
C < T
A
< +125
C
80
300
V
Offset Voltage (AD8610A/AD8620A)
V
OS
85
250
V
+25
C < T
A
< 125
C
90
350
V
40
C < T
A
< +125
C
150
850
V
Input Bias Current
I
B
10
+2
+10
pA
40
C < T
A
< +85
C
250
+130
+250
pA
40
C < T
A
< +125
C
2.5
+1.5
+2.5
nA
Input Offset Current
I
OS
10
+1
+10
pA
40
C < T
A
< +85
C
75
+20
+75
pA
40
C < T
A
< +125
C
150
+40
+150
pA
Input Voltage Range
2
+3
V
Common-Mode Rejection Ratio
CMRR
V
CM
= 2.5 V to +1.5 V
90
95
dB
Large Signal Voltage Gain
A
VO
R
L
= 1 k
, V
O
= 3 V to +3 V
100
180
V/mV
Offset Voltage Drift (AD8610B)
V
OS
/
T
40
C < T
A
< +125
C
0.5
1
V/C
Offset Voltage Drift (AD8620B)
V
OS
/
T
40
C < T
A
< +125
C
0.5
1.5
V/C
Offset Voltage Drift (AD8610A/AD8620A)
V
OS
/
T
40
C < T
A
< +125
C
0.8
3.5
V/C
OUTPUT CHARACTERISTICS
Output Voltage High
V
OH
R
L
= 1 k
, 40C < T
A
< +125
C
3.8
4
V
Output Voltage Low
V
OL
R
L
= 1 k
, 40C < T
A
< +125
C
4
3.8
V
Output Current
I
OUT
V
OUT
>
2 V
30
mA
POWER SUPPLY
Power Supply Rejection Ratio
PSRR
V
S
=
5 V to 13 V
100
110
dB
Supply Current/Amplifier
I
SY
V
O
= 0 V
2.5
3.0
mA
40
C < T
A
< +125
C
3.0
3.5
mA
DYNAMIC PERFORMANCE
Slew Rate
SR
R
L
= 2 k
40
50
V/
s
Gain Bandwidth Product
GBP
25
MHz
Settling Time
t
S
A
V
= +1, 4 V Step, to 0.01%
350
ns
NOISE PERFORMANCE
Voltage Noise
e
n
p-p
0.1 Hz to 10 Hz
1.8
V p-p
Voltage Noise Density
e
n
f = 1 kHz
6
nV/
Hz
Current Noise Density
i
n
f = 1 kHz
5
fA/
Hz
Input Capacitance
C
IN
Differential
8
pF
Common-Mode
15
pF
Channel Separation
C
S
f = 10 kHz
137
dB
f = 300 kHz
120
dB
Specifications subject to change without notice.
(@ V
S
= 5.0 V, V
CM
= 0 V, T
A
= 25 C, unless otherwise noted.)
REV. D
AD8610/AD8620
3
ELECTRICAL SPECIFICATIONS
(@ V
S
= 13 V, V
CM
= 0 V, T
A
= 25 C, unless otherwise noted.)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
INPUT CHARACTERISTICS
Offset Voltage (AD8610B)
V
OS
45
100
V
40
C < T
A
< +125
C
80
200
V
Offset Voltage (AD8620B)
V
OS
45
150
V
40
C < T
A
< +125
C
80
300
V
Offset Voltage (AD8610A/AD8620A)
V
OS
85
250
V
+25
C < T
A
< 125
C
90
350
V
40
C < T
A
< +125
C
150
850
V
Input Bias Current
I
B
10
+3
+10
pA
40
C < T
A
< +85
C
250
+130
+250
pA
40
C < T
A
< +125
C
3.5
+3.5
nA
Input Offset Current
I
OS
10
+1.5
+10
pA
40
C < T
A
< +85
C
75
+20
+75
pA
40
C < T
A
< +125
C
150
+40
+150
pA
Input Voltage Range
10.5
+10.5
V
Common-Mode Rejection Ratio
CMRR
V
CM
= 10 V to +10 V
90
110
dB
Large Signal Voltage Gain
A
VO
R
L
= 1 k
, V
O
= 10 V to +10 V
100
200
V/mV
Offset Voltage Drift (AD8610B)
V
OS
/
T
40
C < T
A
< +125
C
0.5
1
V/C
Offset Voltage Drift (AD8620B)
V
OS
/
T
40
C < T
A
< +125
C
0.5
1.5
V/C
Offset Voltage Drift (AD8610A/AD8620A)
V
OS
/
T
40
C < T
A
< +125
C
0.8
3.5
V/C
OUTPUT CHARACTERISTICS
Output Voltage High
V
OH
R
L
= 1 k
, 40C < T
A
< +125
C
+11.75 +11.84
V
Output Voltage Low
V
OL
R
L
= 1 k
, 40C < T
A
< +125
C
11.84
11.75
V
Output Current
I
OUT
V
OUT
> 10 V
45
mA
Short Circuit Current
I
SC
65
mA
POWER SUPPLY
Power Supply Rejection Ratio
PSRR
V
S
=
5 V to 13 V
100
110
dB
Supply Current/Amplifier
I
SY
V
O
= 0 V
3.0
3.5
mA
40
C < T
A
< +125
C
3.5
4.0
mA
DYNAMIC PERFORMANCE
Slew Rate
SR
R
L
= 2 k
40
60
V/
s
Gain Bandwidth Product
GBP
25
MHz
Settling Time
t
S
A
V
= 1, 10 V Step, to 0.01%
600
ns
NOISE PERFORMANCE
Voltage Noise
e
n
p-p
0.1 Hz to 10 Hz
1.8
V p-p
Voltage Noise Density
e
n
f = 1 kHz
6
nV/
Hz
Current Noise Density
i
n
f = 1 kHz
5
fA/
Hz
Input Capacitance
C
IN
Differential
8
pF
Common-Mode
15
pF
Channel Separation
C
S
f = 10 kHz
137
dB
f = 300 kHz
120
dB
Specifications subject to change without notice.
REV. D
4
AD8610/AD8620
ORDERING GUIDE
Temperature
Package
Package
Model
Range
Description
Option
Branding
AD8610AR
40
C to +125C 8-Lead SOIC
RN-8
AD8610AR-REEL
40
C to +125C 8-Lead SOIC
RN-8
AD8610AR-REEL7
40
C to +125C 8-Lead SOIC
RN-8
AD8610ARM-REEL
40
C to +125C 8-Lead MSOP RM-8
B0A
AD8610ARM-R2
40
C to +125C 8-Lead MSOP RM-8
B0A
AD8610ARZ
*
40
C to +125C 8-Lead SOIC
RN-8
AD8610ARZ-REEL
*
40
C to +125C 8-Lead SOIC
RN-8
AD8610ARZ-REEL7
*
40
C to +125C 8-Lead SOIC
RN-8
AD8610BR
40
C to +125C 8-Lead SOIC
RN-8
AD8610BR-REEL
40
C to +125C 8-Lead SOIC
RN-8
AD8610BR-REEL7
40
C to +125C 8-Lead SOIC
RN-8
AD8610BRZ
*
40
C to +125C 8-Lead SOIC
RN-8
AD8610BRZ-REEL
*
40
C to +125C 8-Lead SOIC
RN-8
AD8610BRZ-REEL7
*
40
C to +125C 8-Lead SOIC
RN-8
AD8620AR
40
C to +125C 8-Lead SOIC
RN-8
AD8620AR-REEL
40
C to +125C 8-Lead SOIC
RN-8
AD8620AR-REEL7
40
C to +125C 8-Lead SOIC
RN-8
AD8620BR
40
C to +125C 8-Lead SOIC
RN-8
AD8620BR-REEL
40
C to +125C 8-Lead SOIC
RN-8
AD8620BR-REEL7
40
C to +125C 8-Lead SOIC
RN-8
*Pb-free part
ABSOLUTE MAXIMUM RATINGS
*
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27.3 V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
S
to V
S+
Differential Input Voltage . . . . . . . . . . . . . . .
Supply Voltage
Output Short-Circuit Duration to GND . . . . . . . . . . Indefinite
Storage Temperature Range
R, RM Packages . . . . . . . . . . . . . . . . . . . . . 65
C to +150C
Operating Temperature Range
AD8610/AD8620 . . . . . . . . . . . . . . . . . . . . 40
C to +125C
Junction Temperature Range
R, RM Packages . . . . . . . . . . . . . . . . . . . . . 65
C to +150C
Lead Temperature Range (Soldering, 10 sec) . . . . . . . . 300
C
*Stresses above those listed under Absolute Maximum Ratings may cause permanent
damage to the device. This is a stress rating only; functional operation of the device
at these or any other conditions above those listed in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
Package Type
JA
*
JC
Unit
8-Lead MSOP (RM)
190
44
C/W
8-Lead SOIC (RN)
158
43
C/W
*
JA
is specified for worst-case conditions; i.e.,
JA
is specified for a device
soldered in circuit board for surface-mount packages.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
AD8610/AD8620 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
REV. D
Typical Performance CharacteristicsAD8610/AD8620
5
INPUT OFFSET VOLTAGE V
14
8
6
4
2
10
12
0
250
250
150
50
150
50
NUMBER OF AMPLIFIERS
V
S
= 13V
TPC 1. Input Offset Voltage at
13 V
INPUT OFFSET VOLTAGE
V
600
400
600
200
0
200
400
TEMPERATURE C
40
25
85
125
V
S
= 5V
TPC 4. Input Offset Voltage vs.
Temperature at
5 V (300 Amplifiers)
SUPPLY VOLTAGE
V
3.0
1.5
0
2.5
1.0
0.5
2.0
0
13
1
2
3 4
5
6
7
8
9 10 11 12
SUPPL
Y CURRENT mA
TPC 7. Supply Current vs.
Supply Voltage
INPUT OFFSET VOLTAGE
V
600
400
600
200
0
200
400
V
S
= 13V
TEMPERATURE C
40
25
85
125
TPC 2. Input Offset Voltage vs.
Temperature at
13 V (300 Amplifiers)
T
C
V
OS
V/ C
14
0
12
10
8
6
4
2
0
0.2
0.6
1.0
1.4
1.8
2.2
2.6
NUMBER OF AMPLIFIERS
V
S
= 5V OR 13V
TPC 5. Input Offset Voltage Drift
V
S
= 13V
TEMPERATURE C
2.55
3.05
2.85
2.65
2.95
2.75
SUPPLY CURRENT mA
40
25
85
125
TPC 8. Supply Current vs.
Temperature at
13 V
V
S
= 5V
INPUT OFFSET VOLTAGE V
14
8
6
4
2
10
12
0
16
18
250
250
150
50
150
50
NUMBER OF AMPLIFIERS
TPC 3. Input Offset Voltage at
5 V
COMMON-MODE VOLTAGE V
3.6
3.4
2.0
2.8
2.6
2.4
2.2
3.2
3.0
10
5
0
5
10
INPUT BIAS CURRENT
p
A
V
S
= 13V
TPC 6. Input Bias Current vs.
Common-Mode Voltage
TEMPERATURE C
2.30
2.65
2.60
2.40
2.50
2.55
2.45
2.35
SUPPLY CURRENT mA
V
S
= 5V
40
25
85
125
TPC 9. Supply Current vs.
Temperature at
5 V
REV. D
6
AD8610/AD8620
OUTPUT V
O
L
T
A
GE
T
O

SUPPL
Y
RAIL V
RESISTANCE LOAD
100M
10M
1M
100k
10k
1k
100
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
V
S
= 13V
TPC 10. Output Voltage to
Supply Rail vs. Load
12.05
11.80
12.00
11.95
11.90
11.85
OUTPUT
V
O
L
T
A
GE HIGH
V
V
S
= 13V
R
L
= 1k
TEMPERATURE C
40
25
85
125
TPC 13. Output Voltage High
vs. Temperature at
13 V
FREQUENCY Hz
10k
100k
1M
1k
10M
100M
CLOSED-LOOP GAIN dB
40
20
0
20
60
40
G = 100
G = 10
G = 1
V
S
= 13V
R
L
= 2k
C
L
= 20pF
TPC 16. Closed-Loop Gain vs.
Frequency
TEMPERATURE C
4.25
4.20
3.95
4.15
4.10
4.05
4.00
40
25
85
125
OUTPUT
V
O
L
T
A
GE HIGH
V
V
S
= 5V
R
L
= 1k
TPC 11. Output Voltage High vs.
Temperature at
5 V
TEMPERATURE C
11.80
12.05
11.85
11.90
11.95
12.00
40
25
85
125
OUTPUT
V
O
L
T
A
GE LO
W
V
V
S
= 13V
R
L
= 1k
TPC 14. Output Voltage Low vs.
Temperature at
13 V
TEMPERATURE C
260
100
40
25
85
125
A
VO
V/mV
220
180
140
V
S
= 13V
V
O
= 10V
R
L
= 1k
240
200
160
120
TPC 17. A
VO
vs. Temperature at
13 V
TEMPERATURE C
3.95
4.05
4.30
4.10
4.15
4.20
4.25
4.00
OUTPUT
V
O
L
T
A
GE LO
W
V
V
S
= 5V
R
L
= 1k
40
25
85
125
TPC 12. Output Voltage Low vs.
Temperature at
5 V
GAIN dB
40
20
0
60
80
100
120
20
40
60
80
FREQUENCY MHz
200
100
10
1
PHASE Degrees
V
S
= 13V
R
L
= 1k
MARKER AT 27MHz
M
= 69.5
C
L
= 20pF
90
45
0
135
180
225
270
45
90
135
180
TPC 15. Open-Loop Gain
and Phase vs. Frequency
TEMPERATURE C
190
100
180
160
140
120
170
150
130
110
40
25
85
125
A
VO
V/mV
V
S
= 5V
V
O
= 3V
R
L
= 1k
TPC 18. A
VO
vs. Temperature at
5 V
REV. D
AD8610/AD8620
7
PSRR dB
40
100
80
60
40
0
120
20
20
160
140
FREQUENCY Hz
60M
10k
100k
1M
10M
100
1k
V
S
= 13V
+PSRR
PSRR
TPC 19. PSRR vs. Frequency at
13 V
CMRR dB
FREQUENCY Hz
10
60M
10k
100k
1M
10M
100
1k
V
S
= 13V
140
0
100
80
60
40
20
120
TPC 22. CMRR vs. Frequency
TIME 1s/DIV
P-P
V
O
L
T
A
GE NOISE 1
V/DIV
V
S
= 13V
V
IN p-p
= 1.8 V
TPC 25. 0.1 Hz to 10 Hz Input Voltage
Noise
PSRR dB
122
121
116
120
119
118
117
TEMPERATURE C
40
25
85
125
TPC 21. PSRR vs. Temperature
V
S
= 13V
V
IN
= 300mV p-p
A
V
= 100
R
L
= 10k
C
L
= 0pF
TIME 4 s/DIV
VO
LTA
GE 300mV/DIV
V
IN
0V
0V
V
OUT
CH
2
= 5V/DIV
TPC 24. Negative Overvoltage
Recovery
GAIN = 10
V
S
= 13V
FREQUENCY Hz
1k
100M
10k
100k
1M
10M
Z
OUT
100
90
0
80
70
60
50
40
30
20
10
GAIN = 100
GAIN = 1
TPC 27. Z
OUT
vs. Frequency
PSRR dB
40
100
80
60
40
0
120
20
20
160
140
FREQUENCY Hz
60M
10k
100k
1M
10M
100
1k
V
S
= 5V
+PSRR
PSRR
TPC 20. PSRR vs. Frequency at
5 V
V
S
= 13V
V
IN
= 300mV p-p
A
V
= 100
R
L
= 10k
TIME 4 s/DIV
VO
LTA
GE 300mV/DIV
V
IN
0V
0V
V
OUT
CH
2
= 5V/DIV
TPC 23. Positive Overvoltage Recovery
FREQUENCY Hz
1,000
100
1
10
1
1M
100
10k
10
1k
100k
VO
LTA
G
E

NOISE DENSITY nV/ Hz
V
SY
= 13V
TPC 26. Input Voltage Noise vs.
Frequency
REV. D
8
AD8610/AD8620
GAIN = 100
GAIN = 1
V
S
= 5V
FREQUENCY Hz
1k
100M
10k
100k
1M
10M
Z
OUT
100
90
0
80
70
60
50
40
30
20
10
GAIN = 10
TPC 28. Z
OUT
vs. Frequency
CAPACITANCE pF
40
35
0
30
25
5
20
15
10
1
10k
10
100
1k
SMALL SIGNAL O
VERSHOO
T %
V
S
= 5V
R
L
= 2k
V
IN
= 100mV
+OS
OS
TPC 31. Small Signal Overshoot vs.
Load Capacitance
TIME 400ns/DIV
VO
LTA
GE 5V/DIV
V
S
= 13V
V
IN
p-p = 20V
A
V
= +1
R
L
= 2k
C
L
= 20pF
TPC 34. +SR at G = +1
TEMPERATURE C
I
B
pA
3000
2500
0
0
25
85
125
2000
1500
1000
500
TPC 29. Input Bias Current vs.
Temperature
TIME 400 s/DIV
VO
LTA
GE 5V/DIV
V
S
= 13V
V
IN
= 14V
A
V
= +1
FREQ = 0.5kHz
V
IN
V
OUT
TPC 32. No Phase Reversal
TIME 400ns/DIV
VO
LTA
GE 5V/DIV
V
S
= 13V
V
IN
p-p = 20V
A
V
= +1
R
L
= 2k
C
L
= 20pF
TPC 35. SR at G = +1
CAPACITANCE pF
40
35
0
30
25
5
20
15
10
1
10k
10
100
1k
SMALL SIGNAL O
VERSHOO
T %
V
S
= 13V
R
L
= 2k
V
IN
= 100mV p-p
+OS
OS
TPC 30. Small Signal Overshoot vs.
Load Capacitance
TIME 1 s/DIV
VO
LTA
GE 5V/DIV
V
S
= 13V
V
IN
p-p = 20V
A
V
= +1
R
L
= 2k
C
L
= 20pF
TPC 33. Large Signal Response at
G = +1
TIME 1 s/DIV
VO
LTA
GE 5V/DIV
V
S
= 13V
V
IN
p-p = 20V
A
V
= 1
R
L
= 2k
C
L
= 20pF
TPC 36. Large Signal Response at G = 1
REV. D
AD8610/AD8620
9
TIME 400ns/DIV
VO
LTA
GE 5V/DIV
V
S
= 13V
V
IN
p-p = 20V
A
V
= 1
R
L
= 2k
SR = 55V/ s
C
L
= 20pF
TPC 37. +SR at G = 1
TIME 400ns/DIV
VO
LTA
GE 5V/DIV
V
S
= 13V
V
IN
p-p = 20V
A
V
= 1
R
L
= 2k
SR = 50V/ s
C
L
= 20pF
TPC 38. SR at G = 1
+
V
IN
20V p-p
0
3
2
U1
+13V
13V
2k
R4
2k
0
0
2k
R1
20k
R2
0
0
U2
5
6
7
V+
V
V
V+
CS(dB) = 20 log (V
OUT
/ 10 V
IN
)
Figure 1. Channel Separation Test Circuit
FUNCTIONAL DESCRIPTION
The AD8610/AD8620 is manufactured on Analog Devices, Inc.'s
proprietary XFCB (eXtra Fast Complementary Bipolar) process.
XFCB is fully dielectrically isolated (DI) and used in conjunc-
tion with N-channel JFET technology and trimmable thin-film
resistors to create the world's most precise JFET input amplifier.
Dielectrically isolated NPN and PNP transistors fabricated on
XFCB have F
T
greater than 3 GHz. Low T
C
thin film resistors
enable very accurate offset voltage and offset voltage tempco
trimming. These process breakthroughs allowed Analog Devices'
world class IC designers to create an amplifier with faster slew
rate and more than 50% higher bandwidth at half of the current
consumed by its closest competition. The AD8610 is uncondi-
tionally stable in all gains, even with capacitive loads well in
excess of 1 nF. The AD8610B achieves less than 100
V of offset
and 1
V/C of offset drift, numbers usually associated with very
high precision bipolar input amplifiers. The AD8610 is offered in
the tiny 8-lead MSOP as well as narrow 8-lead SOIC surface-
mount packages and is fully specified with supply voltages from
5 V to 13 V. The very wide specified temperature range, up to
125
C, guarantees superior operation in systems with little or no
active cooling.
The unique input architecture of the AD8610 features extremely
low input bias currents and very low input offset voltage. Low
power consumption minimizes the die temperature and maintains
the very low input bias current. Unlike many competitive JFET
amplifiers, the AD8610/AD8620 input bias currents are low even
at elevated temperatures. Typical bias currents are less than 200 pA
at 85
C. The gate current of a JFET doubles every 10C resulting
in a similar increase in input bias current over temperature.
Special care should be given to the PC board layout to minimize
leakage currents between PCB traces. Improper layout and
board handling generates leakage current that exceeds the bias
current of the AD8610/AD8620.
FREQUENCY kHz
0
350
50
100
150
200
250
300
138
136
120
128
126
124
122
132
130
134
CS dB
Figure 2. AD8620 Channel Separation Graph
Power Consumption
A major advantage of the AD8610/AD8620 in new designs is
the saving of power. Lower power consumption of the AD8610
makes it much more attractive for portable instrumentation and
for high-density systems, simplifying thermal management, and
reducing power supply performance requirements. Compare the
power consumption of the AD8610/AD8620 versus the OPA627
in Figure 3.
TEMPERATURE C
8
7
6
5
4
3
2
75
125
50
SUPPL
Y CURRENT mA
25
0
25
50
75
100
OPA627
AD8610
Figure 3. Supply Current vs. Temperature
REV. D
10
AD8610/AD8620
Driving Large Capacitive Loads
The AD8610 has excellent capacitive load driving capability and
can safely drive up to 10 nF when operating with
5 V supply.
Figures 4 and 5 compare the AD8610/AD8620 against the OPA627
in the noninverting gain configuration driving a 10 k
resistor and
10,000 pF capacitor placed in parallel on its output, with a square
wave input set to a frequency of 200 kHz. The AD8610 has much
less ringing than the OPA627 with heavy capacitive loads.
TIME 2 s/DIV
VO
LTA
GE 20mV/DIV
V
S
= 5V
C
L
= 10,000pF
R
L
= 10k
Figure 4. OPA627 Driving C
L
= 10,000 pF
TIME 2 s/DIV
VO
LTA
GE 20mV/DIV
V
S
= 5V
C
L
= 10,000pF
R
L
= 10k
Figure 5. AD8610/AD8620 Driving C
L
= 10,000 pF
The AD8610/AD8620 can drive much larger capacitances without
any external compensation. Although the AD8610/AD8620 is stable
with very large capacitive loads, remember that this capacitive
loading will limit the bandwidth of the amplifier. Heavy capacitive
loads will also increase the amount of overshoot and ringing at the
output. Figures 7 and 8 show the AD8610/AD8620 and the OPA627
in a noninverting gain of +2 driving 2
F of capacitance load. The
ringing on the OPA627 is much larger in magnitude and continues
more than 10 times longer than the AD8610.
V
IN
= 50mV
2k
2k
5V
+5V
2 F
3
2
7
4
Figure 6. Capacitive Load Drive Test Circuit
TIME 20 s/DIV
VO
LTA
GE 50mV/DIV
V
S
= 5V
R
L
= 10k
C
L
= 2 F
Figure 7. OPA627 Capacitive Load Drive, A
V
= +2
TIME 20 s/DIV
VO
LTA
GE 50mV/DIV
V
S
= 5V
R
L
= 10k
C
L
= 2 F
Figure 8. AD8610/AD8620 Capacitive Load Drive, A
V
= +2
Slew Rate (Unity Gain Inverting vs. Noninverting)
Amplifiers generally have a faster slew rate in an inverting unity
gain configuration due to the absence of the differential input
capacitance. Figures 9 through 12 show the performance of the
AD8610 configured in a gain of 1 compared to the OPA627.
The AD8610 slew rate is more symmetrical, and both the positive
and negative transitions are much cleaner than in the OPA627.
REV. D
AD8610/AD8620
11
TIME 400ns/DIV
VO
LTA
GE 5V/DIV
V
S
= 13V
R
L
= 2k
G = 1
SR = 54V/ s
Figure 9. (+SR) of AD8610/AD8620 in Unity Gain of 1
TIME 400ns/DIV
VO
LTA
GE 5V/DIV
V
S
= 13V
R
L
= 2k
G = 1
SR = 42.1V/ s
Figure 10. (+SR) of OPA627 in Unity Gain of 1
TIME 400ns/DIV
VO
LTA
GE 5V/DIV
V
S
= 13V
R
L
= 2k
G = 1
SR = 54V/ s
Figure 11. (SR) of AD8610/AD8620 in Unity Gain of 1
TIME 400ns/DIV
VO
LTA
GE 5V/DIV
V
S
= 13V
R
L
= 2k
G = 1
SR = 56V/ s
Figure 12. (SR) of OPA627 in Unity Gain of 1
The AD8610 has a very fast slew rate of 60 V/
s even when config-
ured in a noninverting gain of +1. This is the toughest condition to
impose on any amplifier since the input common-mode capacitance
of the amplifier generally makes its SR appear worse. The slew
rate of an amplifier varies according to the voltage difference
between its two inputs. To observe the maximum SR as specified
in the AD8610 data sheet, a difference voltage of about 2 V between
the inputs must be ensured. This will be required for virtually any
JFET op amp so that one side of the op amp input circuit is com-
pletely off, maximizing the current available to charge and discharge
the internal compensation capacitance. Lower differential
drive voltages will produce lower slew rate readings. A JFET-
input op amp with a slew rate of 60 V/
s at unity gain with
V
IN
= 10 V might slew at 20 V/
s if it is operated at a gain of
+100 with V
IN
= 100 mV.
The slew rate of the AD8610/AD8620 is double that of the OPA627
when configured in a unity gain of +1 (see Figures 13 and 14).
TIME 400ns/DIV
VO
LTA
GE 5V/DIV
V
S
= 13V
R
L
= 2k
G = +1
SR = 85V/ s
Figure 13. (+SR) of AD8610/AD8620 in Unity Gain of +1
REV. D
12
AD8610/AD8620
diodes greatly interfere with many application circuits such as
precision rectifiers and comparators. The AD8610 is free from
these limitations.
V1
13V
3
2
7
4
+13V
14V
0
6
AD8610
Figure 16. Unity Gain Follower
No Phase Reversal
Many amplifiers misbehave when one or both of the inputs are
forced beyond the input common-mode voltage range. Phase
reversal is typified by the transfer function of the amplifier,
effectively reversing its transfer polarity. In some cases, this can
cause lockup and even equipment damage in servo systems, and
may cause permanent damage or nonrecoverable parameter
shifts to the amplifier itself. Many amplifiers feature compensation
circuitry to combat these effects, but some are only effective for
the inverting input. The AD8610/AD8620 is designed to prevent
phase reversal when one or both inputs are forced beyond their
input common-mode voltage range.
TIME 400 s/DIV
0
VO
LTA
GE 5V/DIV
V
IN
V
OUT
Figure 17. No Phase Reversal
THD Readings vs. Common-Mode Voltage
Total harmonic distortion of the AD8610/AD8620 is well below
0.0006% with any load down to 600
. The AD8610/AD8620
outperforms the OPA627 for distortion, especially at frequen-
cies above 20 kHz.
FREQUENCY Hz
0.01
0.0001
10
80k
THD+N %
0.001
0.1
100
1k
10k
OPA627
AD8610
V
SY
= 13V
V
IN
= 5V rms
BW = 80kHz
Figure 18. AD8610 vs. OPA627 THD + Noise @ V
CM
= 0 V
TIME 400ns/DIV
VO
LTA
GE 5V/DIV
V
S
= 13V
R
L
= 2k
G = +1
SR = 23V/ s
Figure 14. (+SR) of OPA627 in Unity Gain of +1
The slew rate of an amplifier determines the maximum frequency
at which it can respond to a large signal input. This frequency
(known as full-power bandwidth, or FPBW) can be calculated
from the equation:
FPBW
SR
V
PEAK
=
(
)
2
for a given distortion (e.g., 1%).
VO
LTA
GE 10V/DIV
0V
CH
2
= 19.4V
p-p
0V
CH
1
= 20.8V
p-p
TIME 400ns/DIV
Figure 15. AD8610 FPBW
Input Overvoltage Protection
When the input of an amplifier is driven below V
EE
or above V
CC
by more than one V
BE
, large currents will flow from the substrate
through the negative supply (V) or the positive supply (V+),
respectively, to the input pins, which can destroy the device. If the
input source can deliver larger currents than the maximum forward
current of the diode (>5 mA), a series resistor can be added to
protect the inputs. With its very low input bias and offset current, a
large series resistor can be placed in front of the AD8610 inputs to
limit current to below damaging levels. Series resistance of 10 k
will generate less than 25
V of offset. This 10 k will allow input
voltages more than 5 V beyond either power supply. Thermal noise
generated by the resistor will add 7.5 nV/
Hz to the noise of the
AD8610. For the AD8610/AD8620, differential voltages equal to
the supply voltage will not cause any problem (see Figure 15).
In this context, it should also be noted that the high breakdown
voltage of the input FETs eliminates the need to include clamp
diodes between the inputs of the amplifier, a practice that is
mandatory on many precision op amps. Unfortunately, clamp
REV. D
AD8610/AD8620
13
4V rms
6V rms
2V rms
V
SY
= 13V
R
L
= 600
FREQUENCY Hz
0.01
0.001
10
20k
THD + N %
0.1
100
1k
10k
Figure 19. THD + Noise vs. Frequency
Noise vs. Common-Mode Voltage
AD8610 noise density varies only 10% over the input range as
shown in Table I.
Table I. Noise vs. Common-Mode Voltage
V
CM
at F = 1 kHz (V)
Noise Reading (nV/
Hz)
10
7.21
5
6.89
0
6.73
+5
6.41
+10
7.21
Settling Time
The AD8610 has a very fast settling time, even to a very tight error
band, as can be seen from Figure 20. The AD8610 is configured
in an inverting gain of +1 with 2 k
input and feedback resistors.
The output is monitored with a 10
, 10 M, 11.2 pF scope probe.
ERROR BAND %
1.2k
0
0.001
10
0.01
SETTLING TIME
ns
0.1
1
800
400
1.0k
600
200
Figure 20. AD8610 Settling Time vs. Error Band
ERROR BAND %
1.2k
1.0k
0
0.001
10
0.01
SETTLING TIME
ns
0.1
1
800
600
200
400
OPA627
Figure 21. OPA627 Settling Time vs. Error Band
The AD8610/AD8620 maintains this fast settling when loaded
with large capacitive loads as shown in Figure 22.
C
L
pF
0
2000
500
SETTLING TIME
s
1000
1500
ERROR BAND 0.01%
3.0
2.0
0.0
1.0
2.5
1.5
0.5
Figure 22. AD8610 Settling Time vs. Load Capacitance
C
L
pF
3.0
2.0
0.0
1.0
2.5
1.5
0.5
0
2000
500
SETTLING TIME
s
1000
1500
ERROR BAND 0.01%
Figure 23. OPA627 Settling Time vs. Load Capacitance
Output Current Capability
The AD8610 can drive very heavy loads due to its high output
current. It is capable of sourcing or sinking 45 mA at
10 V output.
The short circuit current is quite high and the part is capable of
sinking about 95 mA and sourcing over 60 mA while operating with
REV. D
14
AD8610/AD8620
supplies of
5 V. Figures 24 and 25 compare the load current
versus output voltage of AD8610/AD8620 and OPA627.
LOAD CURRENT A
10
0.1
0.00001
1
DEL
T
A
FR
OM RESPECTIVE RAIL
V
1
0.0001
0.001
0.01
0.1
V
EE
V
CC
Figure 24. AD8610 Dropout from
13 V vs. Load Current
LOAD CURRENT A
10
0.1
0.00001
1
DEL
T
A
FR
OM RESPECTIVE RAIL V
1
0.0001
0.001
0.01
0.1
V
EE
V
CC
Figure 25. OPA627 Dropout from
15 V vs. Load Current
Although operating conditions imposed on the AD8610 (
13 V)
are less favorable than the OPA627 (
15 V), it can be seen that the
AD8610 has much better drive capability (lower headroom to the
supply) for a given load current.
Operating with Supplies Greater than
13 V
The AD8610 maximum operating voltage is specified at
13 V.
When
13 V is not readily available, an inexpensive LDO can
provide
12 V from a nominal 15 V supply.
Input Offset Voltage Adjustment
Offset of AD8610 is very small and normally does not require
additional offset adjustment. However, the offset adjust pins can
be used as shown in Figure 26 to further reduce the dc offset. By
using resistors in the range of 50 k
, offset trim range is 3.3 mV.
R1
2
3
7
5
+V
S
V
OUT
4
6
V
S
1
AD8610
Figure 26. Offset Voltage Nulling Circuit
Programmable Gain Amplifier (PGA)
The combination of low noise, low input bias current, low input
offset voltage, and low temperature drift make the AD8610 a
perfect solution for programmable gain amplifiers. PGAs are often
used immediately after sensors to increase the dynamic range of
the measurement circuit. Historically, the large ON resistance of
switches, combined with the large I
B
currents of amplifiers,
created a large dc offset in PGAs. Recent and improved monolithic
switches and amplifiers completely remove these problems. A PGA
discrete circuit is shown in Figure 27. In Figure 27, when the 10 pA
bias current of the AD8610 is dropped across the (<5
) R
ON
of
the switch, it results in a negligible offset error.
When high precision resistors are used, as in the circuit of Figure 27,
the error introduced by the PGA is within the 1/2 LSB requirement
for a 16-bit system.
Y0
Y1
Y2
Y3
G
A
B
5
IN1
S1
D1
10k
10k
1k
5V
+5V
IN2
S2
D2
IN3
S3
D3
IN4
S4
D4
ADG452
3
2
14
15
11
10
6
7
V
L
V
DD
13
12
1
16
9
8
74HC139
V
SS
4
GND
5
V
OUT
1k
100
11
5pF
100
V
IN
G = 1
G = 10
G = 100
G = 1000
+5V
+5V
AD8610
U10
A0
A1
5V
Figure 27. High Precision PGA
1. Room temperature error calculation due to R
ON
and I
B
:
V
I
R
Total Offset
Offset
V
Total Offset
Offset Trimmed
V
Total Offset
OS
B
ON
OS
OS
=
=
=
=
+
=
+
=
+
2
5
10
5
10
5
pA
pV
(
)
(
_
)
V
pV
V
AD8610
AD8610
2. Full temperature error calculation due to R
ON
and I
B
:
V
I
R
OS
B
ON
(
C)
(
C)
(
C)
pA
.
nV
@
@
@
85
85
85
250
15
3 75
=
=
=
3. Temperature coefficient of switch and AD8610/AD8620
combined is essentially the same as the T
C
V
OS
of the AD8610:
V
T total
V
T
V
T I
R
V
T total
OS
OS
OS
B
ON
OS
/
(
)
/
(
)
/
(
)
/
(
)
.
V/ C
.
nV/ C
.
V/ C
=
+
=
+
AD8610
0 5
0 06
0 5
REV. D
AD8610/AD8620
15
High Speed Instrumentation Amplifier (IN AMP)
The three op amp instrumentation amplifiers shown in Figure 28
can provide a range of gains from unity up to 1,000 or higher. The
instrumentation amplifier configuration features high common-
mode rejection, balanced differential inputs, and stable, accurately
defined gain. Low input bias currents and fast settling are achieved
with the JFET input AD8610/AD8620. Most instrumentation
amplifiers cannot match the high frequency performance of this
circuit. The circuit bandwidth is 25 MHz at a gain of 1, and close
to 5 MHz at a gain of 10. Settling time for the entire circuit is
550 ns to 0.01% for a 10 V step (gain = 10). Note that the resistors
around the input pins need to be small enough in value so that
the RC time constant they form in combination with stray circuit
capacitance does not reduce circuit bandwidth.
1/2 AD8620
U
1
V
IN2
C2
10pF
R2 1k
R4 2k
R7
2k
C4
15pF
V
OUT
R6
2k
R8 2k
V
V+
AD8610
U2
C3
15pF
R5 2k
V
IN1
V
V+
1/2 AD8620
U1
C5
10pF
R1 1k
RG
Figure 28. High Speed Instrumentation Amplifier
High Speed Filters
The four most popular configurations are Butterworth, Elliptical,
Bessel, and Chebyshev. Each type has a response that is optimized
for a given characteristic as shown in Table II.
In active filter applications using operational amplifiers, the
dc accuracy of the amplifier is critical to optimal filter performance.
The amplifier's offset voltage and bias current contribute to output
error. Input offset voltage is passed by the filter, and may be
amplified to produce excessive output offset. For low frequency
applications requiring large value input resistors, bias and offset
currents flowing through these resistors will also generate an
offset voltage.
At higher frequencies, an amplifier's dynamic response must be
carefully considered. In this case, slew rate, bandwidth, and open-
loop gain play a major role in amplifier selection. The slew rate
must be both fast and symmetrical to minimize distortion. The
amplifier's bandwidth, in conjunction with the filter's gain, will
dictate the frequency response of the filter. The use of a high perfor-
mance amplifier such as the AD8610/AD8620 will minimize both
dc and ac errors in all active filter applications.
Second-Order Low-Pass Filter
Figure 29 shows the AD8610 configured as a second-order
Butterworth low-pass filter. With the values as shown, the corner
frequency of the filter will be 1 MHz. The wide bandwidth of
the AD8610/AD8620 allows a corner frequency up to tens of
megaHertz. The following equations can be used for component
selection:
R1
R2
C1
1
C2
1
=
=
-
(
)
=
( )(
)( )
=
( )(
)( )
User Selected Typical Values
f
R
f
R
CUTOFF
CUTOFF
:
k
k
.
.
10
100
1 414
2
0 707
2
where C1 and C2 are in farads.
13V
+13V
5
C2
11pF
V
IN
AD8610
U1
V
OUT
R2
10k
R1
10k
C1
22pF
Figure 29. Second-Order Low-Pass Filter
Table II. Filter Types
Type
Sensitivity
Overshoot
Phase
Amplitude (Pass Band)
Butterworth
Moderate
Good
Max Flat
Chebyshev
Good
Moderate
Nonlinear
Equal Ripple
Elliptical
Best
Poor
Equal Ripple
Bessel (Thompson)
Poor
Best
Linear
REV. D
16
AD8610/AD8620
High Speed, Low Noise Differential Driver
The AD8620 is a perfect candidate as a low noise differential
driver for many popular ADCs. There are also other applications,
such as balanced lines, that require differential drivers. The circuit
of Figure 30 is a unique line driver widely used in industrial applica-
tions. With
13 V supplies, the line driver can deliver a differential
signal of 23 V p-p into a 1 k
load. The high slew rate and wide
bandwidth of the AD8620 combine to yield a full power bandwidth
of 145 kHz while the low noise front end produces a referred-to-
input noise voltage spectral density of 6 nV/
Hz. The design is a
transformerless, balanced transmission system where output
common-mode rejection of noise is of paramount importance.
Like the transformer-based design, either output can be shorted
to ground for unbalanced line driver applications without changing
the circuit gain of 1. This allows the design to be easily set to
noninverting, inverting, or differential operation.
3
2
V
3
2
V
V+
5
6
1k
R8
V+
R10
50
1/2 OF AD8620
R1
1k
1k
R9
1k
R4
1k
R3
AD8610
1/2 OF AD8620
6
R2
1k
7
U3
U2
R13
1k
R5
1k
R6
10k
R7
1k
R12
1k
R11
50
V
O
2
V
O
1
V
V+
0
1
V
O
2 V
O
1 = V
IN
0
Figure 30. Differential Driver
REV. D
AD8610/AD8620
17
OUTLINE DIMENSIONS
8-Lead Standard Small Outline Package [SOIC]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
0.50 (0.0196)
0.25 (0.0099)
45
8
0
1.75 (0.0688)
1.35 (0.0532)
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0040)
8
5
4
1
5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
1.27 (0.0500)
BSC
6.20 (0.2440)
5.80 (0.2284)
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
COMPLIANT TO JEDEC STANDARDS MS-012AA
8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
0.80
0.60
0.40
8
0
8
5
4
1
4.90
BSC
PIN 1
0.65 BSC
3.00
BSC
SEATING
PLANE
0.15
0.00
0.38
0.22
1.10 MAX
3.00
BSC
COPLANARITY
0.10
0.23
0.08
COMPLIANT TO JEDEC STANDARDS MO-187AA
18
REV. D
AD8610/AD8620
Revision History
Location
Page
2/04--Data Sheet changed from REV. C to REV. D.
Changes to SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Changes to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
10/02--Data Sheet changed from REV. B to REV. C.
Updated ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Edits to Figure 15 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5/02--Data Sheet changed from REV. A to REV. B.
Addition of part number AD8620 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Universal
Addition of 8-Lead SOIC (R-8 Suffix) Drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Changes to GENERAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Additions to SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Change to ELECTRICAL SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Additions to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Replace TPC 29 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Add Channel Separation Test Circuit Figure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Add Channel Separation Graph . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Changes to Figure 26 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Addition of High-Speed, Low Noise Differential Driver section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Addition of Figure 30 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
19
C0273002/04(D)
20