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Электронный компонент: AD8627

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Precision Low Power
Single-Supply JFET Amplifier
AD8627/AD8626/AD8625
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.326.8703
2004 Analog Devices, Inc. All rights reserved.
FEATURES
SC70 package
Very low I
B
: 1 pA max
Single-supply operation: 5 V to 26 V
Dual-supply operation: 2.5 V to 13 V
Rail-to-rail output
Low supply current: 630 A/amp typ
Low offset voltage: 500 V max
Unity gain stable
No phase reversal
APPLICATIONS
Photodiode amplifiers
ATE
Line-powered/battery-powered instrumentation
Industrial controls
Automotive sensors
Precision filters
Audio
GENERAL DESCRIPTION
The AD862x is a precision JFET input amplifier. It features
true single-supply operation, low power consumption, and
rail-to-rail output. The outputs remain stable with capacitive
loads of over 500 pF; the supply current is less than 630 A/amp.
Applications for the AD862x include photodiode transimpedance
amplification, ATE reference level drivers, battery management,
both line powered and portable instrumentation, and remote
sensor signal conditioning including automotive sensors.
The AD862x's ability to swing nearly rail-to-rail at the input
and rail-to-rail at the output enables it to be used to buffer
CMOS DACs, ASICs, and other wide output swing devices in
single-supply systems.
The 5 MHz bandwidth and low offset are ideal for precision
filters.
The AD862x is fully specified over the industrial temperature
range. (40 to +85) The AD8627 is available in both 5-lead
SC70 and 8-lead SOIC surface-mount packages. The SC70
packaged parts are available in tape and reel only. The AD8626
is available in an MSOP package.
PIN CONFIGURATIONS
03023-B
-
001
2
3
1
4
5
OUT A
V
+IN
V+
IN
AD8627
5-Lead SC70
(KS Suffix)
NC
IN
V+
2
+IN
OUT
3
V
NC
4
NC
1
7
6
5
8
AD8627
NC = NO CONNECT
8-Lead SOIC
(R-8 Suffix)
OUT A
IN A
OUT B
2
+IN A
IN B
3
V
+IN B
4
V+
1
7
6
5
8
AD8626
8-Lead SOIC
(R-8 Suffix)
V+
OUT A
OUT B
IN A
IN B
+IN A
+IN B
V
AD8626
8-Lead MSOP
(RM-Suffix)
5
8
4
1
OUT A
OUT D
1
14
IN A
IN D
2
13
+IN A
+IN D
3
12
V+
V
4
11
+IN B
+IN C
5
10
IN B
IN C
6
9
OUT B
OUT C
7
8
AD8625
14-Lead SOIC
(R-Suffix)
OUT D
OUT A
IN D
IN A
+IN D
+IN A
V
V+
+IN C
+IN B
IN C
IN B
OUT C
OUT B
AD8625
14-Lead TSSOP
(RU-Suffix)
8
14
7
1
Figure 1.
AD8627/AD8626/AD8625
Rev. B | Page 2 of 20
TABLE OF CONTENTS
AD8627/AD8626/AD8625Specifications ................................... 3
Electrical Characteristics ............................................................. 3
Electrical Characteristics ............................................................. 4
Absolute Maximum Ratings............................................................ 5
Typical Performance Characteristics
AD8627/AD8626/AD8625.............................................................. 6
Applications..................................................................................... 13
Minimizing Input Current ........................................................ 15
Photodiode Preamplifier Application...................................... 15
Output Amplifier for Digital-to-Analog Converters............. 15
Eight-Pole Sallen Key Low-Pass Filter..................................... 16
Outline Dimensions ....................................................................... 18
Ordering Guide .......................................................................... 19
REVISION HISTORY
1/04--Data sheet changed from Rev. A to Rev. B
Change to General Description ......................................................... 1
Change to Figure 10 ............................................................................ 7
Change to Figure13 ............................................................................. 7
Change to Figure 37 .......................................................................... 11
Changes to Figure 38......................................................................... 12
Change to Output Amplifier for DACs section ............................. 15
Updated Outline Dimensions .......................................................... 19
10/03--Data sheet changed from Rev. 0 to Rev. A
Addition of two new parts
...........................................
Universal
Change to General Description
.............................................. ...
1
Changes to Pin Configurations
............................................................
1
Change to Specifications table
................................................. .
3
Changes to Figure 31
....................................................................
.... 10
Changes to Figure 32
...................................................................... ..
11
Changes to Figure 38
.....................................................................
... 12
Changes to Figure 46
.....................................................................
... 16
Changes to Figure 47
...................................................................... ..
16
Changes to Figure 49
...................................................................... ..
17
Updated Outline Dimensions
..................................................
18
Changes to Ordering Guide
............................................................. ..
19
AD8627/AD8626/AD8625
Rev. B | Page 3 of 20
AD8627/AD8626/AD8625SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
Table 1. @V
S
= 5 V, V
CM
= 1.5 V, T
A
= 25C, unless otherwise noted.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
INPUT CHARACTERISTICS
Offset Voltage
V
OS
0.05
0.5
mV
-40C < T
A
< +85C
1.2
mV
Input Bias Current
I
B
0.25
1
pA
40C < T
A
< +85C
60
pA
Input Offset Current
I
OS
0.5
pA
40C < T
A
< +85C
25
pA
Input Voltage Range
0
3
V
Common-Mode Rejection Ratio
CMRR
V
CM
= 0 V to 2.5 V
66
87
dB
Large Signal Voltage Gain
A
VO
R
L
= 10 k,
VO
= 0.5 V to 4.5 V
100
230
V/mV
Offset Voltage Drift
V
OS
/T
40C < T
A
< +85C
2.5
V/C
OUTPUT CHARACTERISTICS
Output Voltage High
V
OH
4.92
V
I
L
= 2 mA, 40C < T
A
< +85C
4.90
V
Output Voltage Low
V
OL
0.075
V
I
L
= 2 mA, 40C < T
A
< +85C
0.08
V
Output Current
I
OUT
10
mA
POWER SUPPLY
Power Supply Rejection Ratio
PSRR
V
S
= 5 V to 26 V
80
104
dB
Supply Current/Amplifier
I
SY
630
785
A
40C < T
A
< +85C
800
A
DYNAMIC PERFORMANCE
Slew Rate
SR
5
V/s
Gain Bandwidth Product
GBP
5
MHz
Phase Margin
M
60
Degrees
NOISE PERFORMANCE
Voltage Noise
e
n
p-p
0.1 Hz to 10 Hz
1.9
V p-p
Voltage Noise Density
e
n
f = 1 kHz
17.5
nV/Hz
Current Noise Density
i
n
f = 1 kHz
0.4
fA/Hz
Channel Separation
Cs
f = 1 kHz
104
dB
AD8627/AD8626/AD8625
Rev. B | Page 4 of 20
ELECTRICAL CHARACTERISTICS
Table 2. @V
S
= 13 V; V
CM
= 0 V; T
A
= 25C, unless otherwise noted.
Parameter Symbol
Conditions
Min
Typ
Max
Unit
INPUT CHARACTERISTICS
Offset Voltage
V
OS
0.35
0.75
mV
40C < T
A
< +85C
1.35
mV
Input Bias Current
I
B
0.25
1
pA
40C < T
A
< +85C
60
pA
Input Offset Current
I
OS
0.5
pA
40C < T
A
< +85C
25
pA
Input Voltage Range
13
+11
V
Common-Mode Rejection Ratio
CMRR
V
CM
= 13 V to +10 V
76
105
dB
Large Signal Voltage Gain
A
VO
R
L
= 10 k, V
O
= 11 V to +11 V
150
310
V/mV
Offset Voltage Drift
V
OS
/T
40C < T
A
< +85C
2.5
V/C
OUTPUT CHARACTERISTICS
Output Voltage High
V
OH
+12.92
V
V
OH
I
L
= 2 mA, 40C < T
A
< +85C
+12.91
V
Output Voltage Low
V
OL
12.92
V
V
OL
I
L
= 2 mA, 40C < T
A
< +85C
12.91
V
Output Current
I
OUT
15
mA
POWER SUPPLY
Power Supply Rejection Ratio
PSRR
V
S
= 2.5 V to 13 V
80
104
dB
Supply Current/Amplifier
I
SY
710
850
A
40C < T
A
< +85C
900
A
DYNAMIC PERFORMANCE
Slew Rate
SR
5
V/s
Gain Bandwidth Product
GBP
5
MHz
Phase Margin
M
60
Degrees
NOISE PERFORMANCE
Voltage Noise
e
n
p-p
0.1 Hz to 10 Hz
2.5
V p-p
Voltage Noise Density
e
n
f = 1 kHz
16
nV/Hz
Current Noise Density
i
n
f = 1 kHz
0.5
fA/Hz
Channel Separation
Cs
f = 1 kHz
105
dB
AD8627/AD8626/AD8625
Rev. B | Page 5 of 20
ABSOLUTE MAXIMUM RATINGS
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to
absolute maximum rating conditions for extended periods may
affect device reliability. Absolute maximum ratings apply at
25C, unless otherwise noted.
Table 3. Stress Ratings
Parameter Rating
Supply Voltage
27 V
Input Voltage
V
S
to V
S+
Differential Input Voltage
Supply Voltage
Output Short Circuit Duration Indefinite
Storage Temperature Range, R Package
65C to + 125C
Operating Temperature Range
40C to + 85C
Junction Temperature Range, R Package
65C to 150C
Lead Temperature Range (Soldering, 60 sec)
300C
Table 4.
Package Type
JA
1
JC
Unit
5-Lead SC70 (KS)
376
126
C/W
8-Lead MSOP (RM)
210
45
C/W
8-Lead SOIC (R)
158
43
C/W
14-Lead SOIC (R)
120
36
C/W
14-Lead TSSOP (RU)
180
35
C/W
1
JA
is specified for worst case conditions when devices are soldered in circuit
boards for surface-mount packages.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
AD8627/AD8626/AD8625
Rev. B | Page 6 of 20
TYPICAL PERFORMANCE CHARACTERISTICSAD8627/AD8626/AD8625
03023-B
-
002
VOLTAGE (
V)
25
20
0
600
400
NUMBE
R OF AMP
L
IFIE
RS
200
0
200
400
600
15
10
5
V
SY
=
12V
T
A
= 25
C
Figure 2. Input Offset Voltage
OFFSET VOLTAGE (
V/
C)
12
0
0
1
2
3
4
5
6
7
8
9
10
03023-B
-
003
NUMBE
R OF AMP
L
IFIE
RS
6
4
2
8
10
V
SY
=
13V
Figure 3. Offset Voltage Drift
VOLTAGE (
V)
18
16
14
12
10
8
6
4
2
0
400
300
200
100
0
100
200
300
03023-B
-
004
NUMBE
R OF AMP
L
IFIE
RS
V
SY
= +3.5V/1.5V
Figure 4. Input Offset Voltage
OFFSET VOLTAGE (
V/
C)
16
14
12
10
8
6
4
2
0
0
1
2
3
4
5
6
7
8
9
10
03023-B
-
005
NUMBER OF AMPLIFIERS
V
SY
= +3.5V/1.5V
Figure 5. Offset Voltage Drift
V
CM
(V)
50
50
40
30
20
10
0
10
20
30
40
15.012.510.0 7.5 5.0 2.5
0
2.5 5.0 7.5 10.0 12.5 15.0
03023-B
-
006
INP
U
T BIAS
CURRE
NT (pA)
V
SY
=
13V
T
A
= 25
C
Figure 6. Input Bias Current vs. V
CM
V
CM
(V)
0.9
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
15.012.510.0 7.5 5.0 2.5
0
2.5 5.0
7.5 10.0 12.5 15.0
03023-B
-
007
INP
U
T BIAS
CURRE
NT (pA)
V
SY
=
13V
T
A
= 25
C
Figure 7. Input Bias Current vs. V
CM
AD8627/AD8626/AD8625
Rev. B | Page 7 of 20
TEMPERATURE (
C)
0.1
100
10
1
50
25
0
25
50
75
100
125
150
03023-B
-
008
INP
U
T BIAS
CURRE
NT (pA)
V
SY
=
13V
V
CM
= 0V
Figure 8. Input Bias Current vs. Temperature
V
CM
(V)
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
5
4
3
2
1
0
1
2
3
5
5
03023-B
-
009
INP
U
T BIAS
CURRE
NT (pA)
V
SY
= +5V OR
5V
Figure 9. Input Bias Current vs. V
CM
V
CM
(V)
100
0
100
200
300
400
500
600
700
800
900
1000
15
12
9
6
3
0
3
6
9
12
15
03023-B
-
010
IN
PU
T OFFSET VOLTA
GE (
V)
V
SY
=
13V
Figure 10. Input Offset Voltage vs. V
CM
V
CM
(V)
500
400
300
200
100
0
100
200
300
400
500
1
0
1
2
3
4
03023-B
-
011
IN
PU
T OFFSET VOLTA
GE (
V)
V
SY
= 5V
Figure 11. Input Offset Voltage vs. V
CM
LOAD RESISTANCE (k
)
10k
100k
1M
10M
0.1
1
10
100
03023-B
-
012
OPEN-
L
OOP GAIN (
V
/V)
V
SY
= +5V
V
SY
=
13V
Figure 12. Open-Loop Gain vs. Load Resistance
TEMPERATURE (
C)
1
10
100
1000
40
25
95
125
03023-B
-
013
OPEN-
L
OOP GAIN (
V
/mV)
e
c
b
d
a
a. V
SY
=
13V, V
O
=
11V, R
L
= 10k
b. V
SY
=
13V, V
O
=
11V, R
L
= 2k
c. V
SY
= +5V, V
O
= +0.5V/+4.5V, R
L
= 2k
d. V
SY
= +5V, V
O
= +0.5V/+4.5V, R
L
= 10k
e. V
SY
= +5V, V
O
= +0.5V/+4.5V, R
L
= 600
Figure 13. Open-Loop Gain vs. Temperature
AD8627/AD8626/AD8625
Rev. B | Page 8 of 20
OUTPUT VOLTAGE (V)
400
300
200
100
0
100
200
300
400
500
600
15
10
5
0
5
10
15
03023-B
-
014
OFFSET VOLTAGE (
V)
V
SY
=
13V
R
L
= 100k
R
L
= 10k
R
L
= 600
Figure 14. Input Error Voltage vs. Output Voltage for Resistive Loads
OUTPUT VOLTAGE FROM SUPPLY RAILS (mV)
250
200
150
100
50
0
50
100
150
200
250
0
50
100
150
200
250
300
03023-B
-
015
INPUT VOLTAGE (
V)
NEG RAIL
POS RAIL
V
SY
=
5V
R
L
= 1k
R
L
= 100k
R
L
= 10k
R
L
= 10k
R
L
= 1k
Figure 15. Input Error Voltage vs. Output Voltage within 300 mV of
Supply Rails
TOTAL SUPPLY VOLTAGE (V)
0
100
200
300
400
500
600
700
800
0
4
8
12
16
20
24
28
03023-B
-
016
QUIE
S
C
E
N
T CURRE
NT (
A)
+125
C
+25
C
55
C
Figure 16. Quiescent Current vs. Supply Voltage at Different Temperatures
LOAD CURRENT (mA)
1
10
100
1k
10k
0.001
0.01
0.1
1
10
100
03023-B
-
017
V
SY
OUTPUT VOLTAGE (mV)
V
OH
V
OL
V
SY
=
13V
Figure 17. Output Saturation Voltage vs. Load Current
LOAD CURRENT (mA)
1
10
100
1k
10k
0.001
0.01
0.1
1
10
100
03023-B
-
018
V
SY
OUTPUT VOLTAGE (mV)
V
SY
= 5V
V
OL
V
OH
Figure 18. Output Saturation Voltage vs. Load Current
FREQUENCY (Hz)
30
135
90
45
0
45
90
135
180
225
270
315
20
10
0
10
20
30
40
50
60
70
10k
100k
1M
10M
50M
03023-B
-
019
GAIN (
d
B)
PH
A
SE (
D
egrees)
GAIN
PHASE
V
SY
=
13V
R
L
= 2k
C
L
= 40pF
Figure 19. Open-Loop Gain and Phase Margin vs. Frequency
AD8627/AD8626/AD8625
Rev. B | Page 9 of 20
FREQUENCY (Hz)
30
135
90
45
0
45
90
135
180
225
270
315
20
10
0
10
20
30
40
50
60
70
10k
100k
1M
10M
50M
03023-B
-
020
GAIN (
d
B)
PH
A
S
E (
D
egrees)
V
SY
= 5V
R
L
= 2k
C
L
= 40pF
GAIN
PHASE
Figure 20. Open Loop Gain and Phase Margin vs. Frequency
FREQUENCY (Hz)
30
20
10
0
10
20
30
40
50
60
70
1k
10k
100k
1M
10M
50M
03023-B
-
021
GAIN (
d
B)
G = 100
G = 1
G = 10
V
SY
=
13V
R
L
= 2k
C
L
= 40pF
Figure 21. Closed-Loop Gain vs. Frequency
FREQUENCY (Hz)
30
20
10
0
10
20
30
40
50
60
70
1k
10k
100k
1M
10M
50M
03023-B
-
022
GAIN (
d
B)
G = 100
G = 1
G = 10
V
SY
= 5V
R
L
= 2k
C
L
= 40pF
Figure 22. Closed-Loop Gain vs. Frequency
FREQUENCY (Hz)
60
40
20
0
20
40
60
80
100
120
140
1k
10k
100k
1M
10M
03023-B
-
023
CMRR (dB)
V
SY
=
13V
Figure 23. CMRR vs. Frequency
FREQUENCY (Hz)
60
40
20
0
20
40
60
80
100
120
140
1k
10k
100k
1M
10M
03023-B
-
024
CMRR (dB)
V
SY
= 5V
Figure 24. CMRR vs. Frequency
FREQUENCY (Hz)
60
40
20
0
20
40
60
80
100
120
140
1k
10k
100k
1M
10M
03023-B
-
025
P
S
RR (dB)
+PSRR
PSRR
V
SY
=
13V
Figure 25. PSRR vs. Frequency
AD8627/AD8626/AD8625
Rev. B | Page 10 of 20
FREQUENCY (Hz)
60
40
20
0
20
40
60
80
100
120
140
1k
10k
100k
1M
10M
03023-B
-
026
P
S
RR (dB)
+PSRR
PSRR
V
SY
= 5V
Figure 26. PSRR vs. Frequency
FREQUENCY (Hz)
0
30
60
90
120
150
180
210
240
270
300
1k
10k
100k
1M
100M
10M
03023-B
-
027
Z
OUT
(
)
G = 100
G = 1
G = 10
V
SY
=
13V
Figure 27. Output Impedance vs. Frequency
FREQUENCY (Hz)
0
30
60
90
120
150
180
210
240
270
300
1k
10k
100k
1M
100M
10M
03023-B
-
028
Z
OUT
(
)
G = 100
G = 1
G = 10
V
SY
= 5V
Figure 28. Output Impedance vs. Frequency
TIME (400
s/DIV)
03023-B
-
029
VOLTAGE (
10V/DIV)
INPUT
OUTPUT
V
SY
=
13V
Figure 29. No Phase Reversal
SETTLING TIME (
s)
15
10
5
0
5
10
15
0
0.5
1.0
1.5
2.5
2.0
03023-B
-
030
OUTPUT SW
ING (
V
)
TS + (1%)
TS + (0.1%)
TS (1%)
TS (0.1%)
Figure 30. Output Swing and Error vs. Settling Time
CAPACITANCE (pF)
0
10
60
50
40
30
20
70
10
100
1k
03023-B
-
031
OVER
SH
OOT (
%
)
OS
OS+
V
S
=
13V
R
L
= 10k
V
IN
= 100mV p-p
A
V
= +1
Figure 31. Small Signal Overshoot vs. Load Capacitance
AD8627/AD8626/AD8625
Rev. B | Page 11 of 20
CAPACITANCE (pF)
0
10
50
40
30
20
70
60
10
100
1k
03023-B
-
032
OVER
SH
OOT (
%
)
OS
OS+
V
S
=
2.5V
R
L
= 10k
V
IN
= 100mV p-p
A
V
= +1
Figure 32. Small Signal Overshoot vs. Load Capacitance
TIME (1s/DIV)
03023-B
-
033
VOLTA
GE (
50mV/D
I
V)
V
SY
=
3V
A
VO
= 100,000V/V
0
Figure 33. 0.1 Hz to 10 Hz Noise
TIME (1s/DIV)
03023-B
-
034
VOLTA
GE (
50mV/D
I
V)
0
V
SY
=
2.5V
A
VO
= 100,000V/V
Figure 34. 0.1 Hz to 10 Hz Noise
FREQUENCY (kHz)
0
1
2
3
4
5
6
7
8
9
10
03023-B
-
035
VOLTA
GE (
n
V)
28
35
42
49
56
21
14
7
0
V
SY
=
13V
19.7nV/ Hz
Figure 35. Voltage Noise Density
FREQUENCY (kHz)
0
1
2
3
4
5
6
7
8
9
10
03023-B
-
036
VOLTA
GE (
n
V)
28
35
42
49
56
21
14
7
0
V
SY
= 5V
16.7nV/ Hz
Figure 36. Voltage Noise Density
FREQUENCY (Hz)
10
100
1k
10k
100k
03023-B
-
037
NOIS
E
(dB)
40
110
100
90
80
70
60
50
V
SY
=
5V, V
IN
= 9V p-p
V
SY
=
13V, V
IN
= 18V p-p
V
SY
=
2.5V, V
IN
= 4.5V p-p
Figure 37. Total Harmonic Distortion + Noise vs. Frequency
AD8627/AD8626/AD8625
Rev. B | Page 12 of 20
FREQUENCY (Hz)
160
150
140
130
120
110
100
90
80
10
100
1k
10k
100k
03023-B
-
049
GAIN (
d
B)
V
IN
2k
2k
2k
20k
V
IN
= 9V p-p
V
IN
= 4.5V p-p
V
IN
= 18V p-p
Figure 38. Channel Separation
AD8627/AD8626/AD8625
Rev. B | Page 13 of 20
APPLICATIONS
The AD862x is one of the smallest and most economical
JFETs offered. It has true single-supply capability and has
an input voltage range that extends below the negative rail,
allowing the part to accommodate input signals below ground.
The rail-to-rail output of the AD862x provides the maximum
dynamic range in many applications. To provide a low offset,
low noise, high impedance input stage, the AD862x uses
n-channel JFETs The input common-mode voltage extends
from 0.2 V below V
S
to 2 V below +V
S
. Driving the input of the
amplifier, configured in unity gain buffer, closer than 2 V to the
positive rail causes an increase in common-mode voltage error,
as illustrated in Figure 15, and a loss of amplifier bandwidth.
This loss of bandwidth causes the rounding of the output
waveforms shown in Figure 39 and Figure 40, which have inputs
that are 1 V and 0 V from +V
S
, respectively.
The AD862x will not experience phase reversal with input
signals close to the positive rail, as shown in Figure 29. For input
voltages greater than +V
SY
, a resistor in series with the AD862x's
noninverting input prevents phase reversal at the expense of
greater input voltage noise. This current limiting resistor should
also be used if there is a possibility of the input voltage
exceeding the positive supply by more than 300 mV, or if an
input voltage is applied to the AD862x when V
SY
= 0. Either of
these conditions will damage the amplifier if the condition
exists for more than 10 seconds. A 100 k resistor allows the
amplifier to withstand up to 10 V of continuous overvoltage,
while increasing the input voltage noise by a negligible amount.
TIME (2
s/DIV)
03023-B
-
038
VOLTA
GE (
2
V/D
I
V)
INPUT
OUTPUT
V
SY
= 5V
Figure 39. Unity Gain Follower Response to 0 V to 4 V Step
TIME (2
s/DIV)
03023-B
-
039
VOLTA
G
E (
2
V/D
I
V)
INPUT
OUTPUT
V
SY
= 5V
Figure 40. Unity Gain Follower Response to 0 V to 5 V Step
AD8627/AD8626/AD8625
Rev. B | Page 14 of 20
The AD862x can safely withstand input voltages 15 V below
V
SY
if the total voltage between the positive supply and the input
terminal is less than 26 V. Figure 41 through Figure 43 show the
AD862x in different configurations accommodating signals
close to the negative rail. The amplifier input stage typically
maintains picoamp-level input currents across that input
voltage range.
TIME (2
s/DIV)
03023-B
-
040
VOLTA
GE (
1
V/D
I
V)
+5V
20k
10k
0V
2.5V
V
SY
= 5V, 0V
Figure 41. Gain of Two Inverter Response to 2.5 V Step,
Centered 1.25 V below Ground
TIME (2
s/DIV)
03023-B
-
041
VOLTA
GE (
10mV/D
I
V)
5V
60mV
20mV
600
0V
V
SY
= 5V
R
L
= 600
Figure 42. Unity Gain Follower Response to 40 mV Step,
Centered 40 mV above Ground
TIME (2
s/DIV)
03023-B
-
042
VOLTA
GE (
10mV/D
I
V)
+5V
20k
10k
10mV
30mV
0V
V
SY
= 5V
Figure 43. Gain of Two Inverter Response to 20 mV Step,
Centered 20 mV below Ground
The AD862x is designed for 16 nV/Hz wideband input voltage
noise and maintains low noise performance to low frequencies,
as shown in Figure 35. This noise performance, along with the
AD862x's low input current and current noise, means that the
AD862x contributes negligible noise for applications with large
source resistances.
The AD862x has a unique bipolar rail-to-rail output stage that
swings within 5 mV of the rail when up to 2 mA of current is
drawn. At larger loads, the drop-out voltage increases as shown
in Figure 17 and Figure 18. The AD862x's wide bandwidth and
fast slew rate allows it to be used with faster signals than previous
single-supply JFETs. Figure 44 shows the response of AD862x,
configured in unity gain, to a V
IN
of 20 V p-p at 50 kHz. The
FPBW of the part is close to 100 kHz.
TIME (5
s/DIV)
03023-B
-
043
VOLTA
GE (
5
V/D
I
V)
V
SY
=
13V
R
L
= 600
Figure 44. Unity Gain Follower Response to 20 V, 50 kHz Input Signal
AD8627/AD8626/AD8625
Rev. B | Page 15 of 20
MINIMIZING INPUT CURRENT
The AD862x is guaranteed to 1 pA max input current with a
13 V supply voltage at room temperature. Careful attention to
how the amplifier is used will maintain or possibly better this
performance. The amplifier's operating temperature should be
kept as low as possible. Like other JFET input amplifiers, the
AD862x's input current doubles for every 10C rise in junction
temperature, as illustrated in Figure 8. On-chip power dissipation
raises the device operating temperature, causing an increase in
input current. Reducing supply voltage to cut power dissipation
reduces the AD862x's input current. Heavy output loads can
also increase chip temperature; maintaining a minimum load
resistance of 1 k is recommended.
The AD862x is designed for mounting on PC boards.
Maintaining picoampere resolution in those environments
requires a lot of care. Both the board and the amplifier's
package have finite resistance. Voltage differences between the
input pins and other pins as well as PC board metal traces may
cause parasitic currents larger than the AD862x's input current,
unless special precautions are taken. For proper board layout
to ensure the best result, refer to the ADI website for proper
layout seminar material. Two common methods of minimizing
parasitic leakages that should be used are guarding of the input
lines and maintaining adequate insulation resistance.
Contaminants such as solder flux on the board's surface and the
amplifier's package can greatly reduce the insulation resistance
between the input pin and traces with supply or signal voltages.
Both the package and the board must be kept clean and dry.
PHOTODIODE PREAMPLIFIER APPLICATION
The low input current and offset voltage levels of the AD862x,
together with its low voltage noise, make this amplifier an
excellent choice for preamplifiers used in sensitive photodiode
applications. In a typical photovoltaic preamp circuit, shown in
Figure 45, the output of the amplifier is equal to
(P)Rf
R
ID(Rf)
V
p
OUT
-
=
-
=
where:
ID = photodiode signal current (A)
R
p
= photodiode sensitivity (A/W)
R
f
= value of the feedback resistor, in
P = light power incident to photodiode surface, in W
The amplifier's input current, I
B
, contributes an output voltage
error proportional to the value of the feedback resistor. The
offset voltage error, V
OS
, causes a small current error due to the
photodiode's finite shunt resistance, R
D
.
The resulting output voltage error, V
E
, is equal to
)
Rf(I
V
R
R
V
B
OS
D
f
E
+


+
= 1
A shunt resistance on the order of 100 M is typical for a small
photodiode. Resistance R
D
is a junction resistance that typically
drops by a factor of two for every 10C rise in temperature. In
the AD862x, both the offset voltage and drift are low, which
helps minimize these errors. With I
B
values of 1 pA and V
OS
of
50 mV, V
E
for Figure 45 is very negligible. Also, the circuit in
Figure 45 results in an SNR value of 95 dB for a signal bandwidth
of 30 kHz.
03023-B
-
044
R
D
100M
C4
15pF
I
B
I
B
V
OS
C
F
5pF
R
F
1.5M
OUTPUT
AD8627
PHOTODIODE
Figure 45. A Photodiode Model Showing DC Error
OUTPUT AMPLIFIER FOR DIGITAL-TO-ANALOG
CONVERTERS
Many system designers use amplifiers as buffers on the output
of amplifiers to increase the DAC's output driving capability.
The high resolution current output DACs need high precision
amplifiers on their output as current to voltage converters (I/V).
Additionally, many DACs operate with a single supply of 5 V. In
a single-supply application, selection of a suitable op amp may
be more difficult because the output swing of the amplifier does
not usually include the negative rail, in this case AGND. This
can result in some degradation of the DAC's specified perform-
ance unless the application does not use codes near zero. The
selected op amp needs to have very low offset voltage--for a
14-bit DAC, the DAC LSB is 300 V with a 5 V reference--to
eliminate the need for output offset trims. Input bias current
should also be very low because the bias current multiplied by
the DAC output impedance (about 10 k in some cases) adds
to the zero code error. Rail-to-rail input and output performance
is desired. For fast settling, the slew rate of the op amp should
not impede the settling time of the DAC. Output impedance of
the DAC is constant and code independent, but in order to
minimize gain errors, the input impedance of the output
amplifier should be as high as possible. The AD862x, with very
high input impedance, I
B
of 1 pA, and fast slew rate, is an ideal
amplifier for these types of applications. A typical configuration
with a popular DAC is shown in Figure 46. In these situations,
the amplifier adds another time constant to the system, increasing
the settling time of the output. The AD862x, with 5 MHz of BW,
helps in achieving a faster effective settling time of the combined
DAC and amplifier.
AD8627/AD8626/AD8625
Rev. B | Page 16 of 20
03023-B
-
045
AD5551/AD5552
AD8627
DGND
*AD5552 ONLY
V
DD
V
REFF
*
V
REFS
*
OUT
SCLK
DIN
CS
AGND
5V
2.5V
UNIPOLAR
OUTPUT
LDAC*
0.1
F
10
F
0.1
F
SERIAL
INTERFACE
5V
Figure 46. Unipolar Output
In applications with full 4-quadrant multiplying capability or a
bipolar output swing, the circuit in Figure 47 can be used. In
this circuit, the first and second amplifiers provide a total gain
of 2, which increases the output voltage span to 20 V. Biasing the
external amplifier with a 10 V offset from the reference voltage
results in a full 4-quadrant multiplying circuit.
03023-B
-
046
ONE CHANNEL
AD5544
1/2
AD8626
DIGITAL INTERFACE CONNECTIONS
OMITTED FOR CLARITY
V
SS
A
GND
F
A
GND
X
V
DD
V
REF
X
R
FB
X
ADR01
VREF
10V
1/2
AD8626
13V
+13V
10V < V
OUT
< +10V
10k
5k
10k
V
OUT
Figure 47. 4-Quadrant Multiplying Application Circuit
EIGHT-POLE SALLEN KEY LOW-PASS FILTER
The AD862x's high input impedance and dc precision make it a
great selection for active filters. Due to the very low bias current
of the AD862x, high value resistors can be used to construct low
frequency filters. The AD862x's picoamp-level input currents
contribute minimal dc errors. Figure 49 shows an example, a
10 Hz, 8-pole Sallen Key filter constructed using the AD862x.
Different numbers of the AD862x can be used depending on
the desired response, which is shown in Figure 48. The high
value used for R1 minimizes interaction with signal source
resistance. Pole placement in this version of the filter minimizes
the Q associated with the lower pole section of the filter. This
eliminates any peaking of the noise contribution of resistors in
the preceding sections, minimizing the inherent output voltage
noise of the filter.
03023-B
-
047
V2
V4
V3
V1
FREQUENCY (Hz)
VOLTA
G
E (
V
)
0.1
0
0.4
0.8
1.2
1
10
100
1k
Figure 48. Frequency Response Output at Different Stages
of the Low-Pass Filter
AD8627/AD8626/AD8625
Rev. B | Page 17 of 20
03023-B
-
048
V
IN
V
DD
V
EE
R1
162.3k
R2
162.3k
3
2
11
1
4
U1
R3
25k
C2
96.19
F
D
D
V3
R10
191.4k
R5
191.4k
U2
R4
25k
C4
69.14
F
D
R11
286.5k
R7
286.5k
U3
R6
25k
C6
30.86
F
D
R12
815.8k
R9
815.8k
U4
R8
25k
C8
3.805
F
D
C1
100
F
C3
1/4
AD8625
1/4
AD8625
1/4
AD8625
1/4
AD8625
100
F
C5
100
F
C7
100
F
V1
V2
V3
V4
Figure 49. 10 Hz, 8-Pole Sallen Key Low-Pass Filter
AD8627/AD8626/AD8625
Rev. B | Page 18 of 20
OUTLINE DIMENSIONS
COMPLIANT TO JEDEC STANDARDS MO-203AA
2.00 BSC
0.30
0.15
0.10 MAX
1.00
0.90
0.70
SEATING
PLANE
1.10 MAX
0.22
0.08
0.46
0.36
0.26
3
5
4
1
2
PIN 1
2.10 BSC
0.65 BSC
1.25 BSC
0.10 COPLANARITY
8
4
0
Figure 50. 5-Lead Plastic Surface-Mount Package [SC70]
(KS-5)
Dimensions shown in millimeters

0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
0.50 (0.0196)
0.25 (0.0099)
45
8
0
1.75 (0.0688)
1.35 (0.0532)
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0040)
4
1
8
5
5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
1.27 (0.0500)
BSC
6.20 (0.2440)
5.80 (0.2284)
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
COMPLIANT TO JEDEC STANDARDS MS-012AA
Figure 51. 8-Lead Standard Small Outline Package [SOIC]
Narrow Body (R-8)
0.80
0.60
0.40
8
0
4
8
5
4.90
BSC
PIN 1
0.65 BSC
3.00
BSC
SEATING
PLANE
0.15
0.00
0.38
0.22
1.10 MAX
3.00
BSC
COPLANARITY
0.10
0.23
0.08
COMPLIANT TO JEDEC STANDARDS MO-187AA
Figure 52. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
COPLANARITY
0.10
14
8
7
1
6.20 (0.2441)
5.80 (0.2283)
4.00 (0.1575)
3.80 (0.1496)
8.75 (0.3445)
8.55 (0.3366)
1.27 (0.0500)
BSC
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0039)
0.51 (0.0201)
0.31 (0.0122)
1.75 (0.0689)
1.35 (0.0531)
8
0
0.50 (0.0197)
0.25 (0.0098)
1.27 (0.0500)
0.40 (0.0157)
0.25 (0.0098)
0.17 (0.0067)
COMPLIANT TO JEDEC STANDARDS MS-012AB
45
Figure 53. 14-Lead Standard Small Outline Package [SOIC]
Narrow Body (R-14)
Dimensions shown in millimeters and (inches)
4.50
4.40
4.30
14
8
7
1
6.40
BSC
PIN 1
5.10
5.00
4.90
0.65
BSC
SEATING
PLANE
0.15
0.05
0.30
0.19
1.20
MAX
1.05
1.00
0.80
0.20
0.09
8
0
0.75
0.60
0.45
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-153AB-1
Figure 54. 14-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-14)
Dimensions shown in millimeters
AD8627/AD8626/AD8625
Rev. B | Page 19 of 20
ORDERING GUIDE
Model
Temperature Range
Package Description
Package Option
Branding
AD8627AKS-REEL
40C to +85C
5-Lead SC70
KS-5
B9A
AD8627AKS-REEL7
40C to +85C
5-Lead SC70
KS-5
B9A
AD8627AKS-R2
40C to +85C
5-Lead SC70
KS-5
B9A
AD8627AR
40C to +85C
8-Lead SOIC
R-8
AD8627AR-REEL
40C to +85C
8-Lead SOIC
R-8
AD8627AR-REEL7
40C to +85C
8-Lead SOIC
R-8
AD8626ARM-REEL
40C to +85C
8-Lead MSOP
RM-8
BJA
AD8626ARM-R2
40C to +85C
8-Lead MSOP
RM-8
BJA
AD8626AR
40C to +85C
8-Lead SOIC
R-8
AD8626AR-REEL
40C to +85C
8-Lead SOIC
R-8
AD8626AR-REEL7
40C to +85C
8-Lead SOIC
R-8
AD8625ARU
40C to +85C
14-Lead TSSOP
RU-14
AD8625ARU-REEL
40C to +85C
14-Lead TSSOP
RU-14
AD8625AR
40C to +85C
14-Lead SOIC
R-14
AD8625AR-REEL
40C to +85C
14-Lead SOIC
R-14
AD8625AR-REEL7
40C to +85C
14-Lead SOIC
R-14
AD8627/AD8626/AD8625
Rev. B | Page 20 of 20
NOTES
2004 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
C03023-0-1/04(B)