One Technology Way, P.O. Box 9106, Norwood. MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
a
FUNCTIONAL BLOCK DIAGRAMS
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
FEATURES
44 V Supply Maximum Ratings
V
SS
to V
DD
Analog Signal Range
Low On Resistance (80
max)
Low Power
Fast Switching
t
ON
< 160 ns
t
OFF
< 150 ns
Break Before Make Switching Action
Plug-In Upgrade for
DG506A/ADG506A, DG507A/ADG507A,
DG526/ADG526A
ADG406/ADG407 are Plug-In Replacements for
DG406/DG407
APPLICATIONS
Audio and Video Routing
Automatic Test Equipment
Data Acquisition Systems
Battery Powered Systems
Sample Hold Systems
Communication Systems
Avionics
LC
2
MOS 8-/16-Channel
High Performance Analog Multiplexers
ADG406/ADG407/ADG426
ADG407
EN
A0 A1 A2
S1A
S8A
DA
S8B
DB
S1B
1 OF 8
DECODER
EN
A0 A1 A2 A3
RS
ADG426
S1
S16
D
WR
DECODER/
LATCHES
ADG406
EN
A0 A1 A2 A3
S1
S16
D
1 OF 16
DECODER
GENERAL DESCRIPTION
The ADG406, ADG407 and ADG426 are monolithic CMOS
analog multiplexers. The ADG406 and ADG426 switch one of
sixteen inputs to a common output as determined by the 4-bit
binary address lines A0, A1, A2 and A3. The ADG426 has on-
chip address and control latches that facilitate microprocessor
interfacing. The ADG407 switches one of eight differential
inputs to a common differential output as determined by the 3-
bit binary address lines A0, A1 and A2. An EN input on all
devices is used to enable or disable the device. When disabled,
all channels are switched OFF.
The ADG406/ADG407/ADG426 are designed on an enhanced
LC
2
MOS process that provides low power dissipation yet gives
high switching speed and low on resistance. These features
make the parts suitable for high speed data acquisition systems
and audio signal switching. Low power dissipation makes the
parts suitable for battery powered systems. Each channel
conducts equally well in both directions when ON and has an
input signal range which extends to the supplies. In the OFF
condition, signal levels up to the supplies are blocked. All
channels exhibit break before make switching action preventing
momentary shorting when switching channels. Inherent in the
design is low charge injection for minimum transients when
switching the digital inputs.
PRODUCT HIGHLIGHTS
1. Extended Signal Range
The ADG406/ADG407/ADG426 are fabricated on an
enhanced LC
2
MOS process giving an increased signal range
which extends to the supply rails
2. Low Power Dissipation
3. Low R
ON
4. Single/Dual Supply Operation
5. Single Supply Operation
For applications where the analog signal is unipolar, the
ADG406/ADG407/ADG426 can be operated from a single
rail power supply. The parts are fully specified with a single
+12 V power supply and will remain functional with single
supplies as low as +5 V.
B Version
T Version
40
C to
55
C to
Parameter
+25
C
+85
C
+25
C
+125
C
Units
Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range
V
SS
to V
DD
V
SS
to V
DD
V
R
ON
50
50
typ
V
D
=
10 V, I
S
= 1 mA
80
125
80
125
max
V
DD
= +13.5 V, V
SS
= 13.5 V
R
ON
Match
4
4
typ
V
D
= 0 V, I
S
= 1 mA
LEAKAGE CURRENTS
V
DD
= +16.5 V, V
SS
= 16.5 V
Source OFF Leakage I
S
(OFF)
0.5
20
0.5
50
nA max
V
D
=
10 V, V
S
= 10 V, Test Circuit 2
Drain OFF Leakage I
D
(OFF)
V
D
=
10 V, V
S
= 10 V;
ADG406, ADG426
1
20
1
200
nA max
Test Circuit 3
ADG407
1
20
1
100
nA max
Channel ON Leakage I
D
, I
S
(ON)
V
S
= V
D
=
10 V;
ADG406, ADG426
1
20
1
200
nA max
Test Circuit 4
ADG407
1
20
1
100
nA max
DIGITAL INPUTS
Input High Voltage, V
INH
2.4
2.4
V min
Input Low Voltage, V
INL
0.8
0.8
V max
Input Current
I
INL
or I
INH
1
1
A max
V
IN
= 0 or V
DD
C
IN
, Digital Input Capacitance
8
8
pF typ
f = 1 MHz
DYNAMIC CHARACTERISTICS
2
t
TRANSITION
120
120
ns typ
R
L
= 300
, C
L
= 35 pF;
150
250
150
250
ns max
V
1
=
10 V, V
2
= 10 V;
Test Circuit 5
Break Before Make Delay, t
OPEN
10
10
10
10
ns min
R
L
= 300
, C
L
= 35 pF;
V
S
= +5 V, Test Circuit 6
t
ON
(EN, WR)
120
175
120
175
ns typ
R
L
= 300
, C
L
= 35 pF;
160
225
160
225
ns max
V
S
= +5 V, Test Circuit 7
t
OFF
(EN, RS)
110
130
110
130
ns typ
R
L
= 300
, C
L
= 35 pF;
150
180
150
180
ns max
V
S
= +5 V, Test Circuit 7
ADG426 Only
t
W
, Write Pulse Width
100
100
ns min
t
S
, Address, Enable Setup Time
100
100
ns min
t
H
, Address, Enable Hold Time
10
10
ns min
t
RS
, Reset Pulse Width
100
100
ns min
V
S
= +5 V
Charge Injection
8
8
pC typ
V
S
= 0 V, R
S
= 0
, C
L
= 1 nF;
Test Circuit 10
OFF Isolation
75
75
dB typ
R
L
= 1 k
, f = 100 kHz;
V
EN
= 0 V, Test Circuit 11
Channel-to-Channel Crosstalk
85
85
dB typ
R
L
= 1 k
, f = 100 kHz, Test Circuit 12
C
S
(OFF)
5
5
pF typ
f = 1 MHz
C
D
(OFF)
f = 1 MHz
ADG406, ADG426
50
50
pF typ
ADG407
25
25
pF typ
C
D
, C
S
(ON)
f = 1 MHz
ADG406, ADG426
60
60
pF typ
ADG407
40
40
pF typ
POWER REQUIREMENTS
V
DD
= +16.5 V, V
SS
= 16.5 V
I
DD
1
1
A typ
V
IN
= 0 V, V
EN
= 0 V
5
5
A max
I
SS
1
1
A typ
5
5
A max
I
DD
100
100
A typ
V
IN
= 0 V, V
EN
= 2.4 V
200
500
200
500
A max
I
SS
1
1
A typ
5
5
A max
N
OTES
1
Temperature ranges are as follows: B Versions: 40
C to +85
C; T Versions: 55
C to +125
C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
ADG406/ADG407/ADG426SPECIFICATIONS
1
DUAL SUPPLY
2
REV. 0
(V
DD
= +15 V
10%, V
SS
= 15 V
10%, GND = 0 V, unless otherwise noted)
REV. 0
3
ADG406/ADG407/ADG426
SINGLE SUPPLY
(V
DD
= +12 V
10%, V
SS
= 0 V, GND = 0 V, unless otherwise noted)
B Version
T Version
40
C to
55
C to
Parameter
+25
C
+85
C
+25
C
+125
C
Units
Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range
0 to V
DD
0 to V
DD
V
R
ON
90
90
typ
V
D
= +3 V, +8.5 V, I
S
= 1 mA;
125
200
125
200
max
V
DD
= +10.8 V
LEAKAGE CURRENTS
V
DD
= +13.2 V
Source OFF Leakage I
S
(OFF)
0.5
20
0.5
50
nA max
V
D
= 8 V/0.1 V, V
S
= 0.1 V/8 V;
Test Circuit 2
Drain OFF Leakage I
D
(OFF)
V
D
= 8 V/0.1 V, V
S
= 0.1 V/8 V;
ADG406, ADG426
1
20
1
200
nA max
Test Circuit 3
ADG407
1
20
1
100
nA max
Channel ON Leakage I
D
, I
S
(ON)
V
S
= V
D
= 8 V/0.1 V, Test Circuit 4
ADG406, ADG426
1
20
1
200
nA max
ADG407
1
20
1
100
nA max
DIGITAL INPUTS
Input High Voltage, V
INH
2.4
2.4
V min
Input Low Voltage, V
INL
0.8
0.8
V max
Input Current
I
INL
or I
INH
1
1
A max
V
IN
= 0 or V
DD
C
IN
, Digital Input Capacitance
8
8
pF typ
f = 1 MHz
DYNAMIC CHARACTERISTICS
2
t
TRANSITION
180
180
ns typ
R
L
= 300
, C
L
= 35 pF;
220
350
220
350
ns max
V
1
= 8 V/0 V, V
2
= 0 V/8 V;
Test Circuit 5
Break Before Make Delay, t
OPEN
10
10
ns typ
R
L
= 300
, C
L
= 35 pF;
V
S
= +5 V, Test Circuit 6
t
ON
(EN, WR)
180
180
ns typ
R
L
= 300
, C
L
= 35 pF;
240
350
240
350
ns max
V
S
= +5 V, Test Circuit 7
t
OFF
(EN, RS)
135
135
ns typ
R
L
= 300
, C
L
= 35 pF;
180
220
180
220
ns max
V
S
= +5 V, Test Circuit 7
ADG426 Only
t
W
, Write Pulse Width
100
100
ns min
t
S
, Address, Enable Setup Time
100
100
ns min
t
H
, Address, Enable Hold Time
10
10
ns min
t
RS
, Reset Pulse Width
100
100
ns min
V
S
= +5 V
Charge Injection
5
5
pC typ
V
S
= 6 V, R
S
= 0
, C
L
= 1 nF;
Test Circuit 10
OFF Isolation
75
75
dB typ
R
L
= 1 k
, f = 100 kHz;
Test Circuit 11
Channel-to-Channel Crosstalk
85
85
dB typ
R
L
= 1 k
, f = 100 kHz;
Test Circuit 12
C
S
(OFF)
8
8
pF typ
f = 1 MHz
C
D
(OFF)
f = 1 MHz
ADG406, ADG426
80
80
pF typ
ADG407
40
40
pF typ
C
D
, C
S
(ON)
f = 1 MHz
ADG406, ADG426
100
100
pF typ
ADG407
50
50
pF typ
POWER REQUIREMENTS
V
DD
= +13.2 V
I
DD
1
1
A typ
V
IN
= 0 V, V
EN
= 0 V
5
5
A max
I
DD
100
100
A typ
V
IN
= 0 V, V
EN
= 2.4 V
200
500
200
500
A max
NOTES
1
Temperature ranges are as follows: B Versions: 40
C to +85
C; T Versions: 55
C to +125
C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
4
ADG406/ADG407/ADG426
REV. 0
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although these devices feature proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
ORDERING GUIDE
Model
Temperature Range
Package Option*
ADG406BN
40
C to +85
C
N-28
ADG406BP
40
C to +85
C
P-28A
ADG407BN
40
C to +85
C
N-28
ADG407BP
40
C to +85
C
P-28A
ADG426BN
40
C to +85
C
N-28
ADG426BRS
40
C to +85
C
RS-28
*N = Plastic DIP, P = Plastic Leaded Chip Carrier (PLCC), RS = Shrink Small
Outline Package (SSOP).
ABSOLUTE MAXIMUM RATINGS
1
(T
A
= +25
C unless otherwise noted)
V
DD
to V
SS
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+44 V
V
DD
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to +25 V
V
SS
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to 25 V
Analog, Digital Inputs
2
. . . . . . . . . . . . . V
SS
2 V to V
DD
+ 2 V
or 20 mA, Whichever Occurs First
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . 20 mA
Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 mA
(Pulsed at 1 ms, 10% Duty Cycle Max)
Operating Temperature Range
Industrial (B Version) . . . . . . . . . . . . . . . . . 40
C to +85
C
Extended (T Version) . . . . . . . . . . . . . . . . . 55
C to +125
C
Storage Temperature Range . . . . . . . . . . . . . 65
C to +150
C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . +150
C
Plastic Package
JA
, Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 75
C/W
Lead Temperature, Soldering (10 sec) . . . . . . . . . . . +260
C
PLCC Package
JA
, Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 80
C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . +215
C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . +220
C
SSOP Package
JA
, Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 122
C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . +215
C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . +220
C
NOTES
1
Stresses above those listed under "Absolute Maximum Ratings" may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those listed in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability. Only
one absolute maximum rating may be applied at any one time.
2
Overvoltages at A, S, D, WR or RS will be clamped by internal diodes. Current
should be limited to the maximum ratings given.
5
REV. 0
ADG406/ADG407/ADG426
Table III. Truth Table (ADG426)
A3
A2
A1
A0
EN
WR RS
ON SWITCH
X
X
X
X
X
1
Retains Previous
Switch Condition
X
X
X
X
X
X
0
NONE (Address
and Enable
Latches Cleared)
X
X
X
X
0
0
1
NONE
0
0
0
0
1
0
1
1
0
0
0
1
1
0
1
2
0
0
1
0
1
0
1
3
0
0
1
1
1
0
1
4
0
1
0
0
1
0
1
5
0
1
0
1
1
0
1
6
0
1
1
0
1
0
1
7
0
1
1
1
1
0
1
8
1
0
0
0
1
0
1
9
1
0
0
1
1
0
1
10
1
0
1
0
1
0
1
11
1
0
1
1
1
0
1
12
1
1
0
0
1
0
1
13
1
1
0
1
1
0
1
14
1
1
1
0
1
0
1
15
1
1
1
1
1
0
1
16
V
DD
NC
D
V
SS
S15
S14
S13
S6
S5
S4
NC
S16
S8
S7
S12
S3
S11
S2
S10
S1
S9
EN
GND
A0
NC
A1
A3
A2
13
18
1
2
28
27
5
6
7
24
23
22
3
4
26
25
8
21
9
20
10
19
11
11
12
17
16
14
15
TOP VIEW
(Not to Scale)
ADG406
PLCC
PIN CONFIGURATIONS
DIP
V
DD
DB
DA
V
SS
S7B
S6B
S5B
S6A
S5A
S4A
NC
S8B
S8A
S7A
S3A
S3B
S2A
S2B
S1A
S1B
EN
GND
A0
NC
A1
NC
A2
13
18
1
2
28
27
5
6
7
24
23
22
3
4
26
25
8
21
9
20
10
19
11
11
12
17
16
14
15
TOP VIEW
(Not to Scale)
ADG407
S4B
PIN CONFIGURATION
DIP/SSOP
NC = NO CONNECT
V
DD
NC
D
V
SS
S15
S14
S13
S6
S5
S4
S16
S8
S7
S12
S3
S11
S2
S10
S1
S9
EN
GND
A0
A1
A3
A2
13
18
1
2
28
27
5
6
7
24
23
22
3
4
26
25
8
21
9
20
10
19
11
11
12
17
16
14
15
TOP VIEW
(Not to Scale)
ADG426
RS
WR
NC = NO CONNECT
S7
S6
S3
S2
S1
S5
S4
S15
S14
S11
S10
S9
S13
S12
S16
NC
D
V
SS
S8
NC
GND
NC
A1
A0
EN
A3
A2
V
DD
26
27
28
4
2
3
15
18
17
16
12
14
13
25
24
21
20
19
23
22
TOP VIEW
(Not to Scale)
1
5
6
9
10
11
7
8
ADG406
Table I. Truth Table (ADG406)
A3
A2
A1
A0
EN
ON SWITCH
X
X
X
X
0
NONE
0
0
0
0
1
1
0
0
0
1
1
2
0
0
1
0
1
3
0
0
1
1
1
4
0
1
0
0
1
5
0
1
0
1
1
6
0
1
1
0
1
7
0
1
1
1
1
8
1
0
0
0
1
9
1
0
0
1
1
10
1
0
1
0
1
11
1
0
1
1
1
12
1
1
0
0
1
13
1
1
0
1
1
14
1
1
1
0
1
15
1
1
1
1
1
16
NC = NO CONNECT
S7A
S6A
S3A
S2A
S1A
S5A
S4A
S7B
S6B
S3B
S2B
S1B
S5B
S4B
S8B
NC
DA
V
SS
S8A
DB
GND
NC
A1
A0
EN
NC
A2
V
DD
26
27
28
4
2
3
15
18
17
16
12
14
13
25
24
21
20
19
23
22
TOP VIEW
(Not to Scale)
1
5
6
9
10
11
7
8
ADG407
Table II. Truth Table (ADG407)
A2
A1
A0
EN
ON SWITCH PAIR
X
X
X
0
NONE
0
0
0
1
1
0
0
1
1
2
0
1
0
1
3
0
1
1
1
4
1
0
0
1
5
1
0
1
1
6
1
1
0
1
7
1
1
1
1
8
PDF 
ZIP