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Электронный компонент: ADG622

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Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
a
ADG621/ADG622/ADG623
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
Analog Devices, Inc., 2001
CMOS 5 V/5 V
4 Dual SPST Switches
FUNCTIONAL BLOCK DIAGRAM
ADG621
IN1
D2
S2
S1
D1
IN2
ADG622
IN1
D2
S2
S1
D1
IN2
ADG623
IN1
D2
S2
S1
D1
IN2
SWITCHES SHOWN FOR A LOGIC "0" INPUT
FEATURES
5.5 (Max) On Resistance
0.9 (Max) On-Resistance Flatness
2.7 V to 5.5 V Single Supply
2.7 V to 5.5 V Dual Supply
Rail-to-Rail Operation
10-Lead SOIC Package
Typical Power Consumption (<0.01 W)
TTL/CMOS Compatible Inputs
APPLICATIONS
Automatic Test Equipment
Power Routing
Communication Systems
Data Acquisition Systems
Sample and Hold Systems
Avionics
Relay Replacement
Battery-Powered Systems
GENERAL DESCRIPTION
The ADG621, ADG622, and the ADG623 are monolithic,
CMOS SPST (single-pole, single-throw) switches. Each switch
of the ADG621, ADG622, and ADG623 conducts equally well
in both directions when on.
The ADG621/ADG622/ADG623 contain two independent
switches. The ADG621 and ADG622 differ only in that both
switches are normally open and normally closed respectively. In the
ADG623, Switch 1 is normally open and Switch 2 is normally
closed. The ADG623 exhibits break-before-make switching action.
The ADG621/ADG622/ADG623 offers low on-resistance of
4
, which is matched to within 0.25 between channels.
These switches also provide low power dissipation yet gives
high switching speeds. The ADG621, ADG622, and ADG623
are available in a 10-lead
SOIC package.
PRODUCT HIGHLIGHTS
1. Low On Resistance (R
ON
) (4
typ)
2. Dual
2.7 V to 5.5 V or Single 2.7 V to 5.5 V
3. Low Power Dissipation. CMOS construction ensures low
power dissipation.
4. Tiny 10-Lead
SOIC Package
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ADG621/ADG622/ADG623SPECIFICATIONS
B Version
40 C to
Parameter
+25 C
+85 C
Unit
Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range
V
SS
to V
DD
V
V
DD
= +4.5 V, V
SS
= 4.5 V
On Resistance (R
ON
)
4
typ
V
S
=
4.5 V, I
S
= 10 mA,
5.5
7
max
Test Circuit 1
On Resistance Match Between
Channels (
R
ON
)
0.25
typ
V
S
=
4.5 V, I
S
= 10 mA
0.35
0.4
max
On-Resistance Flatness (R
FLAT(ON)
)
0.9
0.9
typ
V
S
=
3.3 V, I
S
= 10 mA
1.5
max
LEAKAGE CURRENTS
V
DD
= +5.5 V, V
SS
= 5.5 V
Source OFF Leakage I
S
(OFF)
0.01
nA typ
V
S
=
4.5 V, V
D
= 4.5 V,
0.25
1
nA max
Test Circuit 2
Drain OFF Leakage I
D
(OFF)
0.01
nA typ
V
S
=
4.5 V, V
D
= 4.5 V,
0.25
1
nA max
Test Circuit 2
Channel ON Leakage I
D
, I
S
(ON)
0.01
nA typ
V
S
= V
D
=
4.5 V, Test Circuit 3
0.25
1
nA max
DIGITAL INPUTS
Input High Voltage, V
INH
2.4
V min
Input Low Voltage, V
INL
0.8
V max
Input Current
I
INL
or I
INH
0.005
A typ
V
IN
= V
INL
or V
INH
0.1
A max
C
IN
, Digital Input Capacitance
2
pF typ
DYNAMIC CHARACTERISTICS
2
t
ON
75
ns typ
R
L
= 300
, C
L
= 35 pF
120
155
ns max
V
S
= 3.3 V, Test Circuit 4
t
OFF
45
ns typ
R
L
= 300
, C
L
= 35 pF
70
85
ns max
V
S
= 3.3 V, Test Circuit 4
Break-Before-Make Time Delay, t
BBM
30
ns typ
R
L
= 300
, C
L
= 35 pF,
(ADG623 Only)
10
ns min
V
S1
= V
S2
= 3.3 V, Test Circuit 5
Charge Injection
110
pC typ
V
S
= 0 V, R
S
= 0
, C
L
= 1 nF,
Test Circuit 7
Off Isolation
65
dB typ
R
L
= 50
, C
L
= 5 pF, f = 1 MHz,
Test Circuit 8
Channel-to-Channel Crosstalk
90
dB typ
R
L
= 50
, C
L
= 5 pF, f = 1 MHz,
Test Circuit 10
Bandwidth 3 dB
230
MHz typ
R
L
= 50
, C
L
= 5 pF, Test Circuit 9
C
S
(OFF)
20
pF typ
f = 1 MHz
C
D
(OFF)
20
pF typ
f = 1 MHz
C
D,
C
S
(ON)
70
pF typ
f = 1 MHz
POWER REQUIREMENTS
V
DD
= +5.5 V, V
SS
= 5.5 V
I
DD
0.001
A typ
Digital Inputs = 0 V or 5.5 V
1.0
A max
I
SS
0.001
A typ
Digital Inputs = 0 V or 5.5 V
1.0
A max
NOTES
1
Temperature ranges are as follows: B Version, 40
C to +85C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
DUAL SUPPLY
1
(V
DD
= +5 V 10%, V
SS
= 5 V 10%, GND = 0 V. All specifications 40 C to +85 C unless otherwise noted.)
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3
ADG621/ADG622/ADG623
(V
DD
= +5 V 10%, V
SS
= 0 V, GND = 0 V. All specifications 40 C to +85 C unless otherwise noted.)
SINGLE SUPPLY
1
B Version
40 C to
Parameter
+25 C
+85 C
Unit
Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range
0 V to V
DD
V
V
DD
= 4.5 V, V
SS
= 0 V
On Resistance (R
ON
)
7
typ
V
S
= 0 V to 4.5 V, I
S
= 10 mA,
10
12.5
max
Test Circuit 1
On Resistance Match Between
Channels (
R
ON
)
0.5
typ
V
S
= 0 V to 4.5 V, I
S
= 10 mA
0.75
1
max
On-Resistance Flatness (R
FLAT(ON)
)
0.5
0.5
typ
V
S
= 1.5 V to 3.3 V, I
S
= 10 mA
1
max
LEAKAGE CURRENTS
V
DD
= 5.5 V
Source OFF Leakage I
S
(OFF)
0.01
nA typ
V
S
= 1 V/4.5 V, V
D
= 4.5 V/1 V,
0.25
1
nA max
Test Circuit 2
Drain OFF Leakage I
D
(OFF)
0.01
nA typ
V
S
= 1 V/4.5 V, V
D
= 4.5 V/1 V,
0.25
1
nA max
Test Circuit 2
Channel ON Leakage I
D
, I
S
(ON)
0.01
nA typ
V
S
= V
D
= 1 V/4.5 V,
0.25
1
nA max
Test Circuit 3
DIGITAL INPUTS
Input High Voltage, V
INH
2.4
V min
Input Low Voltage, V
INL
0.8
V max
Input Current
I
INL
or I
INH
0.005
A typ
V
IN
= V
INL
or V
INH
0.1
A max
C
IN
, Digital Input Capacitance
2
pF typ
DYNAMIC CHARACTERISTICS
2
t
ON
120
ns typ
R
L
= 300
, C
L
= 35 pF
210
260
ns max
V
S
= 3.3 V, Test Circuit 4
t
OFF
50
ns typ
R
L
= 300
, C
L
= 35 pF
75
100
ns max
V
S
= 3.3 V, Test Circuit 4
Break-Before-Make Time Delay, t
BBM
70
ns typ
R
L
= 300
, C
L
= 35 pF,
(ADG623 Only)
10
ns min
V
S1
= V
S2
= 3.3 V, Test Circuit 5
Charge Injection
6
pC typ
V
S
= 0 V; R
S
= 0
, C
L
= 1 nF,
Test Circuit 6
Off Isolation
65
dB typ
R
L
= 50
, C
L
= 5 pF, f = 1 MHz,
Test Circuit 7
Channel-to-Channel Crosstalk
90
dB typ
R
L
= 50
, C
L
= 5 pF, f = 1 MHz,
Test Circuit 9
Bandwidth 3 dB
230
MHz typ
R
L
= 50
, C
L
= 5 pF, Test Circuit 8
C
S
(OFF)
20
pF typ
f = 1 MHz
C
D
(OFF)
20
pF typ
f = 1 MHz
C
D
, C
S
(ON)
70
pF typ
f = 1 MHz
POWER REQUIREMENTS
V
DD
= 5.5 V
I
DD
0.001
A typ
Digital Inputs = 0 V or 5.5 V
1.0
A max
NOTES
1
Temperature ranges are as follows: B Version, 40
C to +85C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
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ADG621/ADG622/ADG623
4
ABSOLUTE MAXIMUM RATINGS
1
(T
A
= +25
C unless otherwise noted)
V
DD
to V
SS
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 V
V
DD
to GND . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to +6.5 V
V
SS
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to 6.5 V
Analog Inputs
2
. . . . . . . . . . . . . . . . . V
SS
0.3 V to V
DD
+ 0.3 V
Digital Inputs
2
. . . . . . . . . . . . . . . . . . 0.3 V to V
DD
+ 0.3 V or
30 mA, Whichever Occurs First
Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA
(Pulsed at 1 ms, 10% Duty Cycle max)
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . 50 mA
Operating Temperature Range
Industrial (B Version) . . . . . . . . . . . . . . . . 40
C to +85C
Storage Temperature Range . . . . . . . . . . . . 65
C to +150C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150
C
SOIC Package
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 206
C/W
JC
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 44
C/W
Lead Temperature, Soldering (10 seconds) . . . . . . . . . . . 300
C
IR Reflow, Peak Temperature . . . . . . . . . . . . . . . . . . . 220
C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute maximum rating condi-
tions for extended periods may affect device reliability. Only one absolute maximum
rating may be applied at any one time.
2
Overvoltages at IN, S, or D will be clamped by internal diodes. Current should be
limited to the maximum ratings given.
Table I. Truth Table for the ADG621/ADG622
ADG621 INx
ADG622 INx
Switch x Condition
0
1
OFF
1
0
ON
ORDERING GUIDE
Model Option
Temperature Range
Description
Package
Branding Information
*
ADG621BRM
40
C to +85C
SOIC (microSmall Outline IC)
RM-10
SXB
ADG622BRM
40
C to +85C
SOIC (microSmall Outline IC)
RM-10
SYB
ADG623BRM
40
C to +85C
SOIC (microSmall Outline IC)
RM-10
SZB
*Branding on
SOIC packages is limited to three characters due to space constraints.
Table II. Truth Table for the ADG623
IN1
IN2
Switch S1
Switch S2
0
0
OFF
ON
0
1
OFF
OFF
1
0
ON
ON
1
1
ON
OFF
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the ADG621/ADG622/ADG623 features proprietary ESD protection circuitry, permanent damage
may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
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ADG621/ADG622/ADG623
5
TERMINOLOGY
V
DD
Most Positive Power Supply Potential.
V
SS
Most Negative Power Supply in a Dual Supply Application. In single supply applications, this should be tied
to ground at the device.
GND
Ground (0 V) Reference
I
DD
Positive Supply Current
I
SS
Negative Supply Current
S
Source Terminal. May be an input or output.
D
Drain Terminal. May be an input or output.
IN
Logic Control Input
R
ON
Ohmic resistance between D and S.
R
ON
On resistance match between any two Channels i.e., R
ON
max R
ON
min.
R
FLAT(ON)
Flatness is defined as the difference between the maximum and minimum value of on resistance as measured
over the specified analog signal range.
I
S
(OFF)
Source Leakage Current with the switch "OFF."
I
D
(OFF)
Drain Leakage Current with the switch "OFF."
I
D
, I
S
(ON)
Channel Leakage Current with the switch "ON."
V
D
(V
S
)
Analog Voltage on Terminals D, S.
V
INL
Maximum Input Voltage for Logic "0."
V
INH
Minimum Input Voltage for Logic "1."
I
INL
(I
INH
)
Input Current of the Digital Input
C
S
(OFF)
"OFF" Switch Source Capacitance
C
D
(OFF)
"OFF" Switch Drain Capacitance
C
D
, C
S
(ON)
"ON" Switch Capacitance
t
ON
Delay between applying the digital control input and the output switching on.
t
OFF
Delay between applying the digital control input and the output switching off.
t
BBM
"OFF" time or "ON" time measured between the 90% points of both switches, when switching from one
address state to another.
Charge Injection
A measure of the Glitch Impulse transfered from the Digital input to the Analog output during switching.
Crosstalk
A measure of unwanted signal that is coupled through from one channel to another as a result of parasitic
capacitance.
Off Isolation
A measure of unwanted signal coupling through an "OFF" switch.
Bandwidth
The frequency response of the "ON" switch.
Insertion Loss
The loss due to the ON resistance of the Switch.
PIN CONFIGURATION
10-Lead SOIC
(RM-10)
TOP VIEW
(Not to Scale)
10
9
8
7
6
1
2
3
4
5
NC = NO CONNECT
D1
S1
GND
S2
IN1
V
DD
ADG621/
ADG622/
ADG623
V
SS
NC
D2
IN2
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ADG621/ADG622/ADG623
6
ON RESISTANCE
8
7
6
5
4
3
2
1
0
V
D
, V
S
V
5
4
3
2
1
0
1
2
3
5
4
V
DD
, V
SS
= 2.5V
T
A
= 25 C
V
DD
, V
SS
= 3V
V
DD
, V
SS
= 3.3V
V
DD
, V
SS
= 4.5V
V
DD
, V
SS
= 5V
TPC 1. On Resistance vs. V
D
(V
S
). (Dual Supply)
V
DD
= 2.7V
V
DD
= 3V
V
DD
= 3.3V
V
DD
= 4.5V
V
DD
= 5V
T
A
= 25 C
V
SS
= 0V
V
D
, V
S
V
ON RESIST
ANCE
20
0
16
12
8
4
1
2
3
4
5
0
TPC 2. On Resistance vs. V
D
(V
S
). (Single Supply)
V
D
, V
S
V
ON RESISTANCE
6
5
5
4
3
2
1
0
3
1
1
5
3
4
2
0
2
4
V
DD
= +5V
V
SS
= 5V
T
A
= +85 C
T
A
= +25 C
T
A
= 40 C
TPC 3. On Resistance vs. V
D
(V
S
) for Different
Temperatures. (Dual Supply)
Typical Performance Characteristics
V
D
, V
S
V
ON RESISTANCE
10
0
8
6
4
2
0
1
2
3
5
4
9
7
5
3
1
T
A
= +85 C
T
A
= +25 C
T
A
= 40 C
V
DD
= 5V
V
SS
= 0V
TPC 4. On Resistance vs. V
D
(V
S
) for Different
Temperature. (Single Supply)
TEMPERATURE C
LEAKAGE CURRENT
nA
0
10
20
30
40
50
60
70
80
0.5
0.5
0.2
0.4
0.3
0.1
0
0.1
0.2
0.3
0.4
I
D
(OFF)
I
D
, I
S
(ON)
I
S
(OFF)
V
DD
= 5V
V
SS
= 0V
V
D
= 4.5V
V
S
= 4.5V
TPC 5. Leakage Currents vs. Temperature. (Dual Supply)
I
D
(OFF)
I
D
, I
S
(ON)
I
S
(OFF)
TEMPERATURE C
LEAKAGE CURRENT
nA
0
10
20
30
40
50
60
70
80
0.5
0.5
0.2
0.4
0.3
0.1
0
0.1
0.2
0.3
0.4
V
DD
= 5V
V
SS
= 0V
V
D
= 4.5V/1V
V
S
= 1V/4.5V
TPC 6. Leakage Currents vs. Temperature. (Single Supply)
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ADG621/ADG622/ADG623
7
V
S
CHARGE INJECTION
pC
250
5
4
3
2
1
0
1
2
3
5
T
A
= 25 C
200
150
100
50
0
4
V
DD
= 5V
V
SS
= 0V
V
DD
= +5V
V
SS
= 5V
TPC 7. Charge Injection vs. Source Voltage
TEMPERATURE C
40
20
0
20
40
60
80
TIME
ns
180
160
0
80
60
40
20
140
100
120
t
ON
t
OFF
V
DD
5V
V
SS
0V
V
DD
+5V
V
SS
5V
V
DD
+5V
V
SS
5V
V
DD
5V
V
SS
0V
TPC 8. t
ON
/ t
OFF
Times vs. Temperature
0.2
0
1
10
100
FREQUENCY MHz
ALTERNATION
dB
10
20
30
40
50
60
70
80
V
DD
= +5V
V
SS
= 5V
T
A
= 25 C
TPC 9. OFF Isolation vs. Frequency
0.2
100
10
1
FREQUENCY MHz
ATTENUATION
dB
0
10
20
30
40
50
60
70
80
V
DD
= +5V
V
SS
= 5V
T
A
= 25 C
TPC 10. Crosstalk vs. Frequency
0.2
1000
0
10
V
DD
= +5V
V
SS
= 5V
T
A
= 25 C
2
4
6
8
10
12
1
100
FREQUENCY MHz
ATTENUATION
dB
TPC 11. On Response vs. Frequency
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ADG621/ADG622/ADG623
Test Circuits
I
DS
V1
S
D
V
S
R
ON
= V1/I
DS
Test Ciruit 1. On Resistance
S
D
V
S
A
A
V
D
I
S
(OFF)
I
D
(OFF)
Test Ciruit 2. Off Leakage
S
D
A
V
D
I
D
(ON)
NC
NC = NO CONNECT
Test Ciruit 3. On Leakage
0.1 F
V
S
IN
S
D
V
DD
GND
R
L
300
C
L
35pF
V
OUT
V
DD
VIN
VIN
V
OUT
t
ON
t
OFF
50%
50%
90%
90%
50%
50%
V
SS
V
SS
0.1 F
ADG621
ADG622
Test Ciruit 4. Switching Times
S1
D1
0.1 F
V
DD
IN1, IN2
V
S1
GND
R
L1
300
C
L1
35pF
V
OUT1
V
S2
V
OUT2
R
L2
300
C
L2
35pF
S2
V
IN
D2
V
DD
t
BBM
t
BBM
50%
50%
90%
V
IN
V
OUT1
V
OUT2
90%
90%
90%
0V
0V
0V
0.1 F
V
SS
V
SS
Test Ciruit 5. Break-Before-Make Time Delay,
t
BBM
(ADG623 Only)
S
D
V
DD
IN
V
S
GND
C
L
1nF
V
OUT
R
S
V
DD
SW ON
V
IN
V
OUT
Q
INJ
= C
L
V
OUT
SW OFF
V
SS
V
SS
V
OUT
Test Ciruit 6. Charge Injection
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ADG621/ADG622/ADG623
9
V
S
V
OUT
NETWORK
ANALYZER
R
L
IN
GND
V
IN
S
D
50
OFF
ISOLATION
=
20
LOG
V
OUT
V
S
V
DD
V
DD
V
SS
0.1 F
V
SS
50
50
0.1 F
Test Ciruit 7. Off Isolation
CHANNEL-TO-CHANNEL CROSSTALK = 20 LOG
GND
V
DD
V
DD
V
SS
0.1 F
V
SS
D1
D2
S2
V
S
V
OUT
NETWORK
ANALYZER
R
L
IN
V
OUT
V
S
R
S1
R
50
50
50
50
0.1 F
Test Ciruit 8. Channel-to-Channel Crosstalk
V
S
V
OUT
NETWORK
ANALYZER
R
L
IN
GND
V
IN
S
D
INSERTION
LOSS
=
20
LOG
V
OUT
WITH
SWITCH
V
OUT
WITHOUT
SWITCH
V
DD
V
DD
V
SS
0.1 F
V
SS
50
50
0.1 F
Test Ciruit 9. Bandwidth
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REV. 0
ADG621/ADG622/ADG623
10
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
10-Lead SOIC Package
(RM-10)
0.120 (3.05)
0.112 (2.85)
6
0
0.028 (0.70)
0.016 (0.40)
0.009 (0.23)
0.005 (0.13)
10
6
5
1
0.0197 (0.50) BSC
0.122 (3.10)
0.114 (2.90)
0.199 (5.05)
0.187 (4.75)
PIN 1
0.122 (3.10)
0.114 (2.90)
0.012 (0.30)
0.006 (0.15)
0.037 (0.94)
0.031 (0.78)
SEATING
PLANE
0.120 (3.05)
0.112 (2.85)
0.043 (1.10)
MAX
0.006 (0.15)
0.002 (0.05)
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11
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12
C02616.810/01(0)
PRINTED IN U.S.A.

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