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REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
ADG701/ADG702
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
Analog Devices, Inc., 1998
CMOS
Low Voltage 2
SPST Switches
FUNCTIONAL BLOCK DIAGRAMS
IN
S
D
ADG701
IN
S
D
ADG702
SWITCHES SHOWN FOR
A LOGIC "1" INPUT
FEATURES
+1.8 V to +5.5 V Single Supply
2 (Typ) On Resistance
Low On-Resistance Flatness
3 dB Bandwidth >200 MHz
Rail-to-Rail Operation
6-Lead SOT-23
8-Lead SOIC Package
Fast Switching Times
t
ON
18 ns
t
OFF
12 ns
Typical Power Consumption (<0.01 W)
TTL/CMOS Compatible
APPLICATIONS
Battery Powered Systems
Communication Systems
Sample Hold Systems
Audio Signal Routing
Video Switching
Mechanical Reed Relay Replacement
GENERAL DESCRIPTION
The ADG701/ADG702 are monolithic CMOS SPST switches.
These switches are designed on an advanced submicron process
that provides low power dissipation yet high switching speed,
low on resistance, low leakage currents and 3 dB bandwidths of
greater than 200 MHz can be achieved.
The ADG701/ADG702 can operate from a single +1.8 V to
+5.5 V supply making it ideal for use in battery powered instru-
ments and with the new generation of DACs and ADCs from
Analog Devices.
As can be seen from the Functional Block Diagrams, with a
logic input of "1" the switch of the ADG701 is closed, while
that of the ADG702 is open. Each switch conducts equally well
in both directions when ON.
The ADG701/ADG702 are available in 6-lead SOT-23 and
8-lead
SOIC packages.
PRODUCT HIGHLIGHTS
1. +1.8 V to +5.5 V Single Supply Operation. The ADG701/
ADG702 offer high performance, including low on resistance
and fast switching times and is fully specified and guaranteed
with +3 V and +5 V supply rails.
2. Very Low R
ON
(3
max at 5 V, 5
max at 3 V). At 1.8 V
operation, R
ON
is typically 40
over the temperature range.
3. On-Resistance Flatness R
FLAT(ON)
(1
max).
4. 3 dB Bandwidth >200 MHz.
5. Low Power Dissipation. CMOS construction ensures low
power dissipation.
6. Fast t
ON
/t
OFF.
7. Tiny 6-Lead SOT-23 and 8-Lead
SOIC.
2
REV. A
ADG701/ADG702SPECIFICATIONS
1
(V
DD
= 5 V 10%, GND = 0 V. All specifications 40 C to +85 C
unless otherwise noted.)
B Version
Parameter
+25 C
40 C to +85 C
Units
Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range
0 V to V
DD
V
On Resistance (R
ON
)
2
typ
V
S
= 0 V to V
DD
, I
S
= 10 mA;
3
4
max
Test Circuit 1
On-Resistance Flatness (R
FLAT(ON)
)
0.5
typ
V
S
= 0 V to V
DD
, I
S
= 10 mA
1.0
max
LEAKAGE CURRENTS
V
DD
= +5.5 V
Source OFF Leakage I
S
(OFF)
0.01
nA typ
V
S
= 4.5 V/1 V, V
D
= 1 V/4.5 V;
0.25
0.35
nA max
Test Circuit 2
Drain OFF Leakage I
D
(OFF)
0.01
nA typ
V
S
= 4.5 V/1 V, V
D
= 1 V/4.5 V;
0.25
0.35
nA max
Test Circuit 2
Channel ON Leakage I
D
, I
S
(ON)
0.01
nA typ
V
S
= V
D
= 1 V, or 4.5 V;
0.25
0.35
nA max
Test Circuit 3
DIGITAL INPUTS
Input High Voltage, V
INH
2.4
V min
Input Low Voltage, V
INL
0.8
V max
Input Current
I
INL
or I
INH
0.005
A typ
V
IN
= V
INL
or V
INH
0.1
A max
DYNAMIC CHARACTERISTICS
2
t
ON
12
ns typ
R
L
= 300
, C
L
= 35 pF
18
ns max
V
S
= 3 V; Test Circuit 4
t
OFF
8
ns typ
R
L
= 300
, C
L
= 35 pF
12
ns max
V
S
= 3 V; Test Circuit 4
Charge Injection
5
pC typ
V
S
= 2 V, R
S
= 0
, C
L
= 1 nF;
Test Circuit 5
Off Isolation
55
dB typ
R
L
= 50
, C
L
= 5 pF, f = 10 MHz
75
dB typ
R
L
= 50
, C
L
= 5 pF, f = 1 MHz;
Test Circuit 6
Bandwidth 3 dB
200
MHz typ
R
L
= 50
, C
L
= 5 pF;
Test Circuit 7
C
S
(OFF)
17
pF typ
C
D
(OFF)
17
pF typ
C
D
, C
S
(ON)
38
pF typ
POWER REQUIREMENTS
V
DD
= +5.5 V
Digital Inputs = 0 V or 5 V
I
DD
0.001
A typ
1.0
A max
NOTES
1
Temperature ranges are as follows: B Versions: 40
C to +85
C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
3
REV. A
ADG701/ADG702
(V
DD
= 3 V 10%, GND = 0 V. All specifications 40 C to +85 C
unless otherwise noted.)
B Version
Parameter
+25 C
40 C to +85 C
Units
Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range
0 V to V
DD
V
On Resistance (R
ON
)
3.5
typ
V
S
= 0 V to V
DD
, I
S
= 10 mA;
5
6
max
Test Circuit 1
On-Resistance Flatness (R
FLAT(ON)
)
1.5
typ
V
S
= 0 V to V
DD
, I
S
= 10 mA
LEAKAGE CURRENTS
V
DD
= +3.3 V
Source OFF Leakage I
S
(OFF)
0.01
nA typ
V
S
= 3 V/1 V, V
D
= 1 V/3 V;
0.25
0.35
nA max
Test Circuit 2
Drain OFF Leakage I
D
(OFF)
0.01
nA typ
V
S
= 3 V/1 V, V
D
= 1 V/3 V;
0.25
0.35
nA max
Test Circuit 2
Channel ON Leakage I
D
, I
S
(ON)
0.01
nA typ
V
S
= V
D
= 1 V, or 3 V;
0.25
0.35
nA max
Test Circuit 3
DIGITAL INPUTS
Input High Voltage, V
INH
2.0
V min
Input Low Voltage, V
INL
0.4
V max
Input Current
I
INL
or I
INH
0.005
A typ
V
IN
= V
INL
or V
INH
0.1
A max
DYNAMIC CHARACTERISTICS
2
t
ON
14
ns typ
R
L
= 300
, C
L
= 35 pF
20
ns max
V
S
= 2 V, Test Circuit 4
t
OFF
8
ns typ
R
L
= 300
, C
L
= 35 pF
13
ns max
V
S
= 2 V, Test Circuit 4
Charge Injection
4
pC typ
V
S
= 1.5 V, R
S
= 0
, C
L
= 1 nF;
Test Circuit 5
Off Isolation
55
dB typ
R
L
= 50
, C
L
= 5 pF, f = 10 MHz
75
dB typ
R
L
= 50
, C
L
= 5 pF, f = 1 MHz;
Test Circuit 6
Bandwidth 3 dB
200
MHz typ
R
L
= 50
, C
L
= 5 pF;
Test Circuit 7
C
S
(OFF)
17
pF typ
C
D
(OFF)
17
pF typ
C
D
, C
S
(ON)
38
pF typ
POWER REQUIREMENTS
V
DD
= +3.3 V
Digital Inputs = 0 V or 3 V
I
DD
0.001
A typ
1.0
A max
NOTES
1
Temperature ranges are as follows: B Versions: 40
C to +85
C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
SPECIFICATIONS
1
ADG701/ADG702
4
REV. A
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute maximum rating condi-
tions for extended periods may affect device reliability. Only one absolute maxi-
mum rating may be applied at any one time.
2
Overvoltages at IN, S or D will be clamped by internal diodes. Current should be
limited to the maximum ratings given.
Table I. Truth Table
ADG701 In
ADG702 In
Switch Condition
0
1
OFF
1
0
ON
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the ADG701/ADG702 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
ABSOLUTE MAXIMUM RATINGS
1
(T
A
= +25
C unless otherwise noted)
V
DD
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to +7 V
Analog, Digital Inputs
2
. . . . . . . . . . . . . . 0.3 V to V
DD
+0.3 V
or 30 mA, Whichever Occurs First
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . 30 mA
Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA
(Pulsed at 1 ms, 10% Duty Cycle Max)
Operating Temperature Range
Industrial (B Version) . . . . . . . . . . . . . . . . . 40
C to +85
C
Storage Temperature Range . . . . . . . . . . . . . 65
C to +150
C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . +150
C
SOIC Package, Power Dissipation . . . . . . . . . . . . . . . 315 mW
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 206
C/W
JC
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 44
C/W
SOT-23 Package, Power Dissipation . . . . . . . . . . . . . . 282 mW
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . 229.6
C/W
JC
Thermal Impedance . . . . . . . . . . . . . . . . . . . . 91.99
C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . +215
C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . +220
C
ESD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV
ORDERING GUIDE
Model
Temperature Range
Brand*
Package Descriptions
Package Options
ADG701BRT
40
C to +85
C
S3B
SOT-23 (Plastic Surface Mount)
RT-6
ADG702BRT
40
C to +85
C
S4B
SOT-23 (Plastic Surface Mount)
RT-6
ADG701BRM
40
C to +85
C
S3B
SOIC (Small Outline)
RM-8
ADG702BRM
40
C to +85
C
S4B
SOIC (Small Outline)
RM-8
*Brand = Due to package size limitations, these three characters represent the part number.
ADG701/ADG702
5
REV. A
PIN CONFIGURATIONS
8-Lead SOIC
(RM-8)
TOP VIEW
(Not to Scale)
8
7
6
5
1
2
3
4
NC = NO CONNECT
D
NC
NC
S
GND
IN
NC
V
DD
ADG701/
ADG702
6-Lead Plastic Surface Mount (SOT-23)
(RT-6)
TOP VIEW
(Not to Scale)
6
5
4
1
2
3
NC = NO CONNECT
D
S
GND
V
DD
NC
IN
ADG701/
ADG702
TERMINOLOGY
V
DD
Most Positive Power Supply Potential.
GND
Ground (0 V) Reference.
S
Source Terminal. May be an input or output.
D
Drain Terminal. May be an input or output.
IN
Logic Control Input.
R
ON
Ohmic Resistance Between D and S.
R
FLAT(ON)
Flatness is defined as the difference between
the maximum and minimum value of on
resistance as measured over the specified
analog signal range.
I
S
(OFF)
Source Leakage Current with the Switch "OFF."
I
D
(OFF)
Drain Leakage Current with the Switch "OFF."
I
D
, I
S
(ON)
Channel Leakage Current with the Switch "ON."
V
D
(V
S
)
Analog Voltage on Terminals D, S.
C
S
(OFF)
"OFF" Switch Source Capacitance.
C
D
(OFF)
"OFF" Switch Drain Capacitance.
C
D
, C
S
(ON)
"ON" Switch Capacitance.
t
ON
Delay between applying the digital control
input and the output switching on. See Test
Circuit 4.
t
OFF
Delay between applying the digital control
input and the output switching off.
Off Isolation
A measure of Unwanted Signal Coupling
Through an "OFF" Switch.
Charge
A measure of the glitch impulse transferred
Injection
from the digital input to the analog output
during switching.
Bandwidth
The frequency at which the output is attenu-
ated by 3 dBs.
On Response
The frequency response of the "ON" switch.
On Loss
The voltage drop across the "ON" switch seen
on the On Response vs. Frequency plot as how
many dBs the signal is away from 0 dB at very
low frequencies.
ADG701/ADG702
6
REV. A
Typical Performance Characteristics
V
D
OR V
S
DRAIN OR SOURCE VOLTAGE V
3.5
0
0
5.0
0.5
R
ON
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
3.0
2.5
2.0
1.5
1.0
0.5
V
DD
= 2.7V
V
DD
= 3.0V
V
DD
= 4.5V
V
DD
= 5.0V
T
A
= 25 C
Figure 1. On Resistance as a Function of V
D
(V
S
) Single
Supplies
V
D
OR V
S
DRAIN OR SOURCE VOLTAGE V
3.5
0
0
0.5
R
ON
1.0
1.5
2.0
2.5
3.0
3.0
2.5
2.0
1.5
1.0
0.5
V
DD
= +3V
+85 C
+25 C
40 C
Figure 2. On Resistance as a Function of V
D
(V
S
) for
Different Temperatures V
DD
= 3 V
V
D
OR V
S
DRAIN OR SOURCE VOLTAGE V
0
0
5.0
0.5
R
ON
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
2.5
2.0
1.5
1.0
0.5
V
DD
= +5V
+85 C
+25 C
40 C
3.5
3.0
Figure 3. On Resistance as a Function of V
D
(V
S
) for
Different Temperatures V
DD
= 5 V
FREQUENCY Hz
10m
1
1n
10
10M
10k
I
SUPPLY
A
100n
10n
10
100
1m
100
1k
100k
1M
V
DD
= +5V
Figure 4. Supply Current vs. Input Switching Frequency
V
DD
= +5V, +3V
FREQUENCY Hz
10
50
110
10M
10k
OFF ISOLATION dB
60
70
40
30
20
100k
1M
100M
100
90
80
Figure 5. Off Isolation vs. Frequency
V
DD
= +3V
FREQUENCY Hz
0
10M
10k
ON RESPONSE dB
4
2
100k
1M
100M
6
Figure 6. On Response vs. Frequency
ADG701/ADG702
7
REV. A
Test Circuits
I
DS
V1
S
D
V
S
R
ON
= V1/I
DS
Test Circuit 1. On Resistance
S
D
V
S
A
A
V
D
I
S
(OFF)
I
D
(OFF)
Test Circuit 2. Off Leakage
S
D
V
S
A
V
D
I
D
(ON)
Test Circuit 3. On Leakage
0.1 F
V
S
IN
S
D
V
DD
GND
R
L
300
C
L
35pF
V
OUT
V
DD
ADG701
ADG702
V
IN
V
IN
V
OUT
t
ON
t
OFF
50%
50%
90%
90%
50%
50%
Test Circuit 4. Switching Times
V
S
IN
S
D
V
DD
GND
C
L
1nF
V
OUT
R
S
ADG701
ADG702
V
IN
V
IN
V
OUT
OFF
V
OUT
ON
Q
INJ
= C
L
V
OUT
V
DD
Test Circuit 5. Charge Injection
0.1 F
IN
S
D
V
DD
GND
R
L
50
V
OUT
V
IN
V
S
V
DD
Test Circuit 6. Off Isolation
0.1 F
IN
S
D
V
DD
GND
R
L
50
V
OUT
V
IN
V
S
V
DD
Test Circuit 7. Bandwidth
ADG701/ADG702
8
REV. A
APPLICATIONS INFORMATION
The ADG701/ADG702 belongs to Analog Devices' new fam-
ily of CMOS switches. This series of general purpose switches
have improved switching times, lower on resistance, higher
bandwidth, low power consumption and low leakage currents.
ADG701/ADG702 Supply Voltages
Functionality of the ADG701/ADG702 extends from +1.8 V to
+5.5 V single supply, which makes it ideal for battery powered
instruments, where important design parameters are power
efficiency and performance.
It is important to note that the supply voltage effects the input
signal range, the on resistance and the switching times of the
part. By taking a look at the typical performance characteristics
and the specifications, the effects of the power supplies can be
clearly seen.
For V
DD
= +1.8 V operation, R
ON
is typically 40
over the
temperature range.
On Response vs. Frequency
Figure 7 illustrates the parasitic components that affect the ac
performance of CMOS switches (the switch is shown surrounded
by a box). Additional external capacitances will further degrade
some performance. These capacitances affect feedthrough,
crosstalk and system bandwidth.
S
V
IN
D
C
DS
R
ON
C
D
C
LOAD
R
LOAD
V
OUT
Figure 7. Switch Represented by Equivalent Parasitic
Components
The transfer function that describes the equivalent diagram of
the switch (Figure 7) is of the form (A)s shown below.
A(s)
=
R
T
s(R
ON
C
DS
)
+
1
s(R
ON
C
T
R
T
)
+
1
where:
C
T
= C
LOAD
+ C
D
+ C
DS
R
T
= R
LOAD
/(R
LOAD
+ R
ON
)
The signal transfer characteristic is dependent on the switch
channel capacitance, C
DS
. This capacitance creates a frequency
zero in the numerator of the transfer function A(s). Because the
switch on resistance is small, this zero usually occurs at high
frequencies. The bandwidth is a function of the switch output
capacitance combined with C
DS
and the load capacitance. The
frequency pole corresponding to these capacitances appears in
the denominator of A(s).
The dominant effect of the output capacitance, C
D
, causes the
pole breakpoint frequency to occur first. Therefore, in order to
maximize bandwidth a switch must have a low input and output
capacitance and low on resistance. The On Response vs. Fre-
quency plot for the ADG701/ADG702 can be seen in Figure 6.
Off Isolation
Off isolation is a measure of the input signal coupled through an
off switch to the switch output. The capacitance, C
DS
, couples
the input signal to the output load, when the switch is off, as
shown in Figure 8.
S
V
IN
D
C
DS
C
D
C
LOAD
R
LOAD
V
OUT
Figure 8. Off Isolation Is Affected by External Load Resis-
tance and Capacitance
The larger the value of C
DS
, larger values of feedthrough will be
produced. The typical performance characteristic graph of Fig-
ure 5 illustrates the drop in off-isolation as a function of fre-
quency. From dc to roughly 1 MHz, the switch shows better
than 75 dB isolation. Up to frequencies of 10 MHz, the off
isolation remains better than 55 dB. As the frequency increases,
more and more of the input signal is coupled through to the
output. Off-isolation can be maximized by choosing a switch
with the smallest C
DS
as possible. The values of load resistance
and capacitance affect off isolation also, as they contribute to
the coefficients of the poles and zeros in the transfer function of
the switch when open.
A(s)
=
s(R
LOAD
C
DS
)
s(R
LOAD
)(C
T
)
+
1
8-Lead SOIC
(RM-8)
8
5
4
1
0.122 (3.10)
0.114 (2.90)
0.199 (5.05)
0.187 (4.75)
PIN 1
0.0256 (0.65) BSC
0.122 (3.10)
0.114 (2.90)
SEATING
PLANE
0.006 (0.15)
0.002 (0.05)
0.018 (0.46)
0.008 (0.20)
0.043 (1.09)
0.037 (0.94)
0.120 (3.05)
0.112 (2.84)
0.011 (0.28)
0.003 (0.08)
0.028 (0.71)
0.016 (0.41)
33
27
0.120 (3.05)
0.112 (2.84)
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
6-Lead Plastic Surface Mount (SOT-23)
(RT-6)
0.122 (3.10)
0.106 (2.70)
PIN 1
0.118 (3.00)
0.098 (2.50)
0.075 (1.90)
BSC
0.037 (0.95) BSC
1
3
4
5
6
2
0.071 (1.80)
0.059 (1.50)
0.009 (0.23)
0.003 (0.08)
0.022 (0.55)
0.014 (0.35)
10
0
0.020 (0.50)
0.010 (0.25)
0.006 (0.15)
0.000 (0.00)
0.051 (1.30)
0.035 (0.90)
SEATING
PLANE
0.057 (1.45)
0.035 (0.90)
C3292a08/98
PRINTED IN U.S.A.
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