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Электронный компонент: ADG709

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REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
ADG708/ADG709
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
Analog Devices, Inc., 2000
CMOS, 3 Low Voltage
4-/8-Channel Multiplexers
FUNCTIONAL BLOCK DIAGRAMS
S1
S8
A0
D
A1
A2
ADG708
S1A
A0
DA
S4A
S1B
S4B
DB
EN
ADG709
1 OF 4
DECODER
EN
1 OF 8
DECODER
A1
FEATURES
1.8 V to 5.5 V Single Supply
3 V Dual Supply
3 On-Resistance
0.75 On-Resistance Flatness
100 pA Leakage Currents
14 ns Switching Times
Single 8-to-1 Multiplexer ADG708
Differential 4-to-1 Multiplexer ADG709
16-Lead TSSOP Package
Low Power Consumption
TTL/CMOS-Compatible Inputs
APPLICATIONS
Data Acquisition Systems
Communication Systems
Relay Replacement
Audio and Video Switching
Battery-Powered Systems
GENERAL DESCRIPTION
The ADG708 and ADG709 are low voltage, CMOS analog
multiplexers comprising eight single channels and four differential
channels respectively. The ADG708 switches one of eight inputs
(S1S8) to a common output, D, as determined by the 3-bit
binary address lines A0, A1, and A2. The ADG709 switches one
of four differential inputs to a common differential output as
determined by the 2-bit binary address lines A0 and A1. An EN
input on both devices is used to enable or disable the device. When
disabled, all channels are switched OFF.
Low power consumption and operating supply range of 1.8 V to
5.5 V make the ADG708 and ADG709 ideal for battery-powered,
portable instruments. All channels exhibit break-before-make
switching action preventing momentary shorting when switch-
ing channels.
These switches are designed on an enhanced submicron process
that provides low power dissipation yet gives high switching
speed, very low on-resistance and leakage currents. On-resistance
is in the region of a few ohms and is closely matched between
switches and very flat over the full signal range. These parts can
operate equally well as either Multiplexers or Demultiplexers,
and have an input signal range that extends to the supplies.
The ADG708 and ADG709 are available in a 16-lead TSSOP
package.
PRODUCT HIGHLIGHTS
1. Single/Dual Supply Operation. The ADG708 and ADG709
are fully specified and guaranteed with 3 V and 5 V single
supply and
3 V dual supply rails.
2. Low R
ON
(3
Typical).
3. Low Power Consumption (<0.01
W).
4. Guaranteed Break-Before-Make Switching Action.
5. Small 16-Lead TSSOP Package.
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2
REV. 0
ADG708/ADG709SPECIFICATIONS
1
(V
DD
= 5 V 10%, V
SS
= 0 V, GND = 0 V, unless otherwise noted)
B Version
C Version
40 C
40 C
Parameter
+25 C
to +85 C
+25 C to +85 C
Unit
Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range
0 V to V
DD
0 V to V
DD
V
On-Resistance (R
ON
)
3
3
typ
V
S
= 0 V to V
DD
, I
DS
= 10 mA;
4.5
5
4.5
5
max
Test Circuit 1
On-Resistance Match Between
0.4
0.4
typ
Channels (
R
ON
)
0.8
0.8
max
V
S
= 0 V to V
DD
, I
DS
= 10 mA
On-Resistance Flatness (R
FLAT(ON)
)
0.75
0.75
typ
V
S
= 0 V to V
DD
, I
DS
= 10 mA
1.2
1.2
max
LEAKAGE CURRENTS
V
DD
= 5.5 V
Source OFF Leakage I
S
(OFF)
0.01
0.01
nA typ
V
D
= 4.5 V/1 V, V
S
= 1 V/4.5 V;
20
0.1
0.3
nA max
Test Circuit 2
Drain OFF Leakage I
D
(OFF)
0.01
0.01
nA typ
V
D
= 4.5 V/1 V, V
S
= 1 V/4.5 V;
20
0.1
0.75
nA max
Test Circuit 3
Channel ON Leakage I
D
, I
S
(ON)
0.01
0.01
nA typ
V
D
= V
S
= 1 V, or 4.5 V, Test Circuit 4
20
0.1
0.75
nA max
DIGITAL INPUTS
Input High Voltage, V
INH
2.4
2.4
V min
Input Low Voltage, V
INL
0.8
0.8
V max
Input Current
I
INL
or I
INH
0.005
0.005
A typ
V
IN
= V
INL
or V
INH
0.1
0.1
A max
C
IN
, Digital Input Capacitance
2
2
pF typ
DYNAMIC CHARACTERISTICS
2
t
TRANSITION
14
14
ns typ
R
L
= 300
, C
L
= 35 pF, Test Circuit 5
25
25
ns max
V
S1
= 3 V/0 V, V
S8
= 0 V/3 V
Break-Before-Make Time Delay, t
D
8
8
ns typ
R
L
= 300
, C
L
= 35 pF
1
1
ns min
V
S
= 3 V, Test Circuit 6
t
ON
(EN)
14
14
ns typ
R
L
= 300
, C
L
= 35 pF
25
25
ns max
V
S
= 3 V, Test Circuit 7
t
OFF
(EN)
7
7
ns typ
R
L
= 300
, C
L
= 35 pF
12
12
ns max
V
S
= 3 V, Test Circuit 7
Charge Injection
3
3
pC typ
V
S
= 2.5 V, R
S
= 0
, C
L
= 1 nF;
Test Circuit 8
Off Isolation
60
60
dB typ
R
L
= 50
, C
L
= 5 pF, f = 10 MHz
80
80
dB typ
R
L
= 50
, C
L
= 5 pF, f = 1 MHz;
Test Circuit 9
Channel-to-Channel Crosstalk
60
60
dB typ
R
L
= 50
, C
L
= 5 pF, f = 10 MHz
80
80
dB typ
R
L
= 50
, C
L
= 5 pF, f = 1 MHz;
Test Circuit 10
3 dB Bandwidth
55
55
MHz typ
R
L
= 50
, C
L
= 5 pF, Test Circuit 9
C
S
(OFF)
13
13
pF typ
C
D
(OFF)
ADG708
85
85
pF typ
ADG709
42
42
pF typ
C
D
, C
S
(ON)
ADG708
96
96
pF typ
ADG709
48
48
pF typ
POWER REQUIREMENTS
V
DD
= 5.5 V
I
DD
0.001
0.001
A typ
Digital Inputs = 0 V or 5.5 V
1.0
1.0
A max
NOTES
1
Temperature range is as follows: B and C Versions: 40
C to +85
C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
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3
REV. 0
ADG708/ADG709
SPECIFICATIONS
1
(V
DD
= 3 V 10%, V
SS
= 0 V, GND = 0 V, unless otherwise noted)
B Version
C Version
40 C
40 C
Parameter
+25 C
to +85 C
+25 C to +85 C
Unit
Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range
0 V to V
DD
0 V to V
DD
V
On-Resistance (R
ON
)
8
8
typ
V
S
= 0 V to V
DD
, I
DS
= 10 mA;
11
12
11
12
max
Test Circuit 1
On-Resistance Match Between
0.4
0.4
typ
V
S
= 0 V to V
DD
, I
DS
= 10 mA
Channels (
R
ON
)
1.2
1.2
max
LEAKAGE CURRENTS
V
DD
= 3.3 V
Source OFF Leakage I
S
(OFF)
0.01
0.01
nA typ
V
S
= 3 V/1 V, V
D
= 1 V/3 V;
20
0.1
0.3
nA max
Test Circuit 2
Drain OFF Leakage I
D
(OFF)
0.01
0.01
nA typ
V
S
= 3 V/1 V, V
D
= 1 V/3 V;
20
0.1
0.75
nA max
Test Circuit 3
Channel ON Leakage I
D
, I
S
(ON)
0.01
0.01
nA typ
V
S
= V
D
= 1 V or 3 V, Test Circuit 4
20
0.1
0.75
nA max
DIGITAL INPUTS
Input High Voltage, V
INH
2.0
2.0
V min
Input Low Voltage, V
INL
0.4
0.4
V max
Input Current
I
INL
or I
INH
0.005
0.005
A typ
V
IN
= V
INL
or V
INH
0.1
0.1
A max
C
IN
, Digital Input Capacitance
2
2
pF typ
DYNAMIC CHARACTERISTICS
2
t
TRANSITION
18
18
ns typ
R
L
= 300
, C
L
= 35 pF, Test Circuit 5
30
30
ns max
V
S1
= 2 V/0 V, V
S2
= 0 V/2 V
Break-Before-Make Time Delay, t
D
8
8
ns typ
R
L
= 300
, C
L
= 35 pF
1
1
ns min
V
S
= 2 V, Test Circuit 6
t
ON
(EN)
18
18
ns typ
R
L
= 300
, C
L
= 35 pF
30
30
ns max
V
S
= 2 V, Test Circuit 7
t
OFF
(EN)
8
8
ns typ
R
L
= 300
, C
L
= 35 pF
15
15
ns max
V
S
= 2 V, Test Circuit 7
Charge Injection
3
3
pC typ
V
S
= 1.5 V, R
S
= 0
, C
L
= 1 nF;
Test Circuit 8
Off Isolation
60
60
dB typ
R
L
= 50
, C
L
= 5 pF, f = 10 MHz
80
80
dB typ
R
L
= 50
, C
L
= 5 pF, f = 1 MHz;
Test Circuit 9
Channel-to-Channel Crosstalk
60
60
dB typ
R
L
= 50
, C
L
= 5 pF, f = 10 MHz
80
80
dB typ
R
L
= 50
, C
L
= 5 pF, f = 1 MHz;
Test Circuit 10
3 dB Bandwidth
55
55
MHz typ
R
L
= 50
, C
L
= 5 pF, Test Circuit 9
C
S
(OFF)
13
13
pF typ
C
D
(OFF)
ADG708
85
85
pF typ
ADG709
42
42
pF typ
C
D
, C
S
(ON)
ADG708
96
96
pF typ
ADG709
48
48
pF typ
POWER REQUIREMENTS
V
DD
= 3.3 V
I
DD
0.001
0.001
A typ
Digital Inputs = 0 V or 3.3 V
1.0
1.0
A max
NOTES
1
Temperature ranges are as follows: B and C Versions: 40
C to +85
C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
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4
REV. 0
ADG708/ADG709SPECIFICATIONS
1
DUAL SUPPLY
B Version
C Version
40 C
40 C
Parameter
+25 C
to +85 C
+25 C to +85 C
Unit
Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range
V
SS
to V
DD
V
SS
to V
DD
V
On-Resistance (R
ON
)
2.5
2.5
typ
V
S
= V
SS
to V
DD
, I
DS
= 10 mA;
4.5
5
4.5
5
max
Test Circuit 1
On-Resistance Match Between
0.4
0.4
typ
Channels (
R
ON
)
0.8
0.8
max
V
S
= V
SS
to V
DD
, I
DS
= 10 mA
On-Resistance Flatness (R
FLAT(ON)
)
0.6
0.6
typ
V
S
= V
SS
to V
DD
, I
DS
= 10 mA
1.0
1.0
max
LEAKAGE CURRENTS
V
DD
= +3.3 V, V
SS
= 3.3 V
Source OFF Leakage I
S
(OFF)
0.01
0.01
nA typ
V
S
= +2.25 V/1.25 V, V
D
= 1.25 V/+2.25 V;
20
0.1
0.3
nA max
Test Circuit 2
Drain OFF Leakage I
D
(OFF)
0.01
0.01
nA typ
V
S
= +2.25 V/1.25 V, V
D
= 1.25 V/+2.25 V;
20
0.1
0.75
nA max
Test Circuit 3
Channel ON Leakage I
D
, I
S
(ON)
0.01
0.01
nA typ
V
S
= V
D
= +2.25 V/1.25 V, Test Circuit 4
20
0.1
0.75
nA max
DIGITAL INPUTS
Input High Voltage, V
INH
2.0
2.0
V min
Input Low Voltage, V
INL
0.4
0.4
V max
Input Current
I
INL
or I
INH
0.005
0.005
A typ
V
IN
= V
INL
or V
INH
0.1
0.1
A max
C
IN
, Digital Input Capacitance
2
2
pF typ
DYNAMIC CHARACTERISTICS
2
t
TRANSITION
14
14
ns typ
R
L
= 300
, C
L
= 35 pF, Test Circuit 5
25
25
ns max
V
S
= 1.5 V/0 V, Test Circuit 5
Break-Before-Make Time Delay, t
D
8
8
ns typ
R
L
= 300
, C
L
= 35 pF
1
1
ns min
V
S
= 1.5 V, Test Circuit 6
t
ON
(EN)
14
14
ns typ
R
L
= 300
, C
L
= 35 pF
25
25
ns max
V
S
= 1.5 V, Test Circuit 7
t
OFF
(EN)
8
8
ns typ
R
L
= 300
, C
L
= 35 pF
15
15
ns max
V
S
= 1.5 V, Test Circuit 7
Charge Injection
3
3
pC typ
V
S
= 0 V, R
S
= 0
, C
L
= 1 nF;
Test Circuit 8
Off Isolation
60
60
dB typ
R
L
= 50
, C
L
= 5 pF, f = 10 MHz
80
80
dB typ
R
L
= 50
, C
L
= 5 pF, f = 1 MHz;
Test Circuit 9
Channel-to-Channel Crosstalk
60
60
dB typ
R
L
= 50
, C
L
= 5 pF, f = 10 MHz
80
80
dB typ
R
L
= 50
, C
L
= 5 pF, f = 1 MHz;
Test Circuit 10
3 dB Bandwidth
55
55
MHz typ
R
L
= 50
, C
L
= 5 pF, Test Circuit 9
C
S
(OFF)
13
13
pF typ
C
D
(OFF)
ADG708
85
85
pF typ
ADG709
42
42
pF typ
C
D
, C
S
(ON)
ADG708
96
96
`
pF typ
ADG709
48
48
pF typ
POWER REQUIREMENTS
V
DD
= 3.3 V
I
DD
0.001
0.001
A typ
Digital Inputs = 0 V or 3.3 V
1.0
1.0
A max
I
SS
0.001
0.001
A typ
V
SS
= 3.3 V
1.0
1.0
A max
Digital Inputs = 0 V or 3.3 V
NOTES
1
Temperature range is as follows: B and C Versions: 40
C to +85
C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
(V
DD
= +3 V 10%, V
SS
= 3 V 10%, GND = 0 V)
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ADG708/ADG709
5
REV. 0
ABSOLUTE MAXIMUM RATINGS
1
(T
A
= 25
C unless otherwise noted)
V
DD
to V
SS
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
V
DD
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to +7 V
V
SS
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to 3.5 V
Analog Inputs
2
. . . . . . . . . . . . . . V
SS
0.3 V to V
DD
+0.3 V or
30 mA, Whichever Occurs First
Digital Inputs
2
. . . . . . . . . . . . . . . . . . 0.3 V to V
DD
+0.3 V or
30 mA, Whichever Occurs First
Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA
. . . . . . . . . . . . . . . . . (Pulsed at 1 ms, 10% Duty Cycle max)
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . 30 mA
Operating Temperature Range
Industrial (B, C Versions) . . . . . . . . . . . . . 40
C to +85
C
Storage Temperature Range . . . . . . . . . . . . 65
C to +150
C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150
C
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the ADG708/ADG709 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
TSSOP Package, Power Dissipation . . . . . . . . . . . . . 432 mW
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . 150.4
C/W
JC
Thermal Impedance . . . . . . . . . . . . . . . . . . . . 27.6
C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . . 215
C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220
C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability. Only one absolute
maximum rating may be applied at any one time.
2
Overvoltages at IN, S or D will be clamped by internal diodes. Current should be
limited to the maximum ratings given.
Table I. ADG708 Truth Table
A2
A1
A0
EN
Switch Condition
X
X
X
0
NONE
0
0
0
1
1
0
0
1
1
2
0
1
0
1
3
0
1
1
1
4
1
0
0
1
5
1
0
1
1
6
1
1
0
1
7
1
1
1
1
8
X = Don't Care
Table II. ADG709 Truth Table
A1
A0
EN
ON Switch Pair
X
X
0
NONE
0
0
1
1
0
1
1
2
1
0
1
3
1
1
1
4
X = Don't Care.
ORDERING GUIDE
Model
Temperature Range
Package Description
Package Option
ADG708BRU
40
C to +85
C
16-Lead Thin Shrink Small Outline Package (TSSOP)
RU-16
ADG709BRU
40
C to +85
C
16-Lead Thin Shrink Small Outline Package (TSSOP)
RU-16
ADG708CRU
40
C to +85
C
16-Lead Thin Shrink Small Outline Package (TSSOP)
RU-16
ADG709CRU
40
C to +85
C
16-Lead Thin Shrink Small Outline Package (TSSOP)
RU-16
PIN CONFIGURATIONS
TSSOP
A0
EN
S2
S3
S4
V
SS
S1
D
1
2
16
15
5
6
7
12
11
10
3
4
14
13
8
9
TOP VIEW
(Not to Scale)
ADG708
A1
A2
S5
S6
S7
GND
V
DD
S8
A0
EN
S2A
S3A
S4A
V
SS
S1A
DA
1
2
16
15
5
6
7
12
11
10
3
4
14
13
8
9
TOP VIEW
(Not to Scale)
ADG709
A1
GND
S2B
S3B
S4B
V
DD
S1B
DB
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ADG708/ADG709
6
REV. 0
V
DD
Most positive power supply potential.
V
SS
Most negative power supply in a dual supply
application. In single supply applications, this
should be tied to ground at the device.
GND
Ground (0 V) Reference.
S
Source Terminal. May be an input or output.
D
Drain Terminal. May be an input or output.
IN
Logic Control Input.
R
ON
Ohmic resistance between D and S.
R
FLAT(ON)
Flatness is defined as the difference between the
maximum and minimum value of on-resistance
as measured over the specified analog signal range.
I
S
(OFF)
Source leakage current with the switch "OFF."
I
D
(OFF)
Drain leakage current with the switch "OFF."
I
D
, I
S
(ON)
Channel leakage current with the switch "ON."
V
D
(V
S
)
Analog voltage on terminals D, S.
C
S
(OFF)
"OFF" switch source capacitance. Measured
with reference to ground.
C
D
(OFF)
"OFF" switch drain capacitance. Measured
with reference to ground.
C
D
, C
S
(ON)
"ON" switch capacitance. Measured with
reference to ground.
C
IN
Digital Input Capacitance.
t
TRANSITION
Delay time measured between the 50% and 90%
points of the digital inputs and the switch "ON"
condition when switching from one address state
to another.
TERMINOLOGY
t
ON
(EN)
Delay time between the 50% and 90% points
of the EN digital input and the switch "ON"
condition.
t
OFF
(EN)
Delay time between the 50% and 90% points
of the EN digital input and the switch "OFF"
condition.
t
OPEN
"OFF" time measured between the 80% points
of both switches when switching from one address
state to another.
Off Isolation
A measure of unwanted signal coupling through
an "OFF" switch.
Crosstalk
A measure of unwanted signal which is coupled
through from one channel to another as a result
of parasitic capacitance.
Charge
A measure of the glitch impulse transferred from
Injection
the digital input to the analog output during
switching.
Bandwidth
The frequency at which the output is attenuated
by 3 dBs.
On Response The frequency response of the "ON" switch.
On Loss
The loss due to the ON resistance of the switch.
V
INL
Maximum input voltage for Logic "0."
V
INH
Minimum input voltage for Logic "1."
I
INL
(I
INH
)
Input current of the digital input.
I
DD
Positive Supply Current.
I
SS
Negative Supply Current.
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ADG708/ADG709
7
REV. 0
Typical Performance Characteristics
V
D
, V
S
, DRAIN OR SOURCE VOLTAGE V
8
0
1
2
3
4
5
T
A
= 25 C
V
SS
= 0V
7
6
5
4
3
2
1
0
ON RESISTANCE
V
DD
= 2.7V
V
DD
= 3.3V
V
DD
= 4.5V
V
DD
= 5.5V
Figure 1. On Resistance as a Function of V
D
(V
S
) for Single
Supply
V
D
OR V
S
DRAIN OR SOURCE VOLTAGE V
8
3.0
T
A
= 25 C
7
6
5
4
3
2
0
ON RESISTANCE
2.5 2.0 1.5 1.0 0.5
1.0
1.5
2.0
2.5
3.0
0.5
0
V
DD
= +2.25V
V
SS
= 2.25V
V
DD
= +2.75V
V
SS
= 2.75V
V
DD
= +3.0V
V
SS
= 3.0V
1
Figure 2. On Resistance as a Function of V
D
(V
S
) for Dual
Supply
V
D
OR V
S
DRAIN OR SOURCE VOLTAGE V
0
1
2
3
4
5
7
6
5
4
3
2
1
0
ON RESISTANCE
+85 C
+25 C
40 C
V
DD
= 5V
V
SS
= 0V
8
Figure 3. On Resistance as a Function of V
D
(V
S
) for Differ-
ent Temperatures, Single Supply
V
D
OR V
S
DRAIN OR SOURCE VOLTAGE V
0
0.5
7
6
5
4
3
2
1
0
ON RESISTANCE
V
DD
= 3V
V
SS
= 0V
1.0
1.5
2.0
2.5
3.0
40 C
+25 C
+85 C
8
Figure 4. On Resistance as a Function of V
D
(V
S
) for Differ-
ent Temperatures, Single Supply
V
D
OR V
S
DRAIN OR SOURCE VOLTAGE V
7
6
5
4
3
2
1
0
ON RESISTANCE
3.0 2.5 2.0 1.5 1.0
1.0
1.5
2.0
2.5
0.5
0
V
DD
= +3.0V
V
SS
= 3.0V
+85 C
+25 C
40 C
3.0
8
0.5
Figure 5. On Resistance as a Function of V
D
(V
S
) for Differ-
ent Temperatures, Dual Supply
V
D
(V
S)
Volts
0
1
0.12
CURRENT nA
2
3
4
5
V
DD
= 5V
V
SS
= 0V
T
A
= 25 C
0.08
0.04
0.00
0.04
0.08
0.12
I
D
(ON)
I
S
(OFF)
I
D
(OFF)
Figure 6. Leakage Currents as a Function of V
D
(V
S
)
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ADG708/ADG709
8
REV. 0
V
D
(V
S)
Volts
0
0.5
0.12
CURRENT nA
1.0
1.5
2.0
3.0
V
DD
= 3V
V
SS
= 0V
T
A
= 25 C
0.08
0.04
0.00
0.04
0.08
0.12
2.5
I
D
(ON)
I
S
(OFF)
I
D
(OFF)
Figure 7. Leakage Currents as a Function of V
D
(V
S
)
V
D
(V
S)
Volts
3.0
0.12
CURRENT nA
V
DD
= +3.0V
V
SS
= 3.0V
T
A
= 25 C
0.08
0.04
0.00
0.04
0.08
0.12
2.5 2.0 1.5 1.0
0
0.5
1.0
1.5
2.0
2.5
I
D
(ON)
I
S
(OFF)
I
D
(OFF)
0.5
3.0
Figure 8. Leakage Currents as a Function of V
D
(V
S
)
TEMPERATURE
C
15
CURRENT nA
V
DD
= 5V
V
SS
= 0V
AND
V
DD
= +3V
V
SS
= 3V
0.05
0.00
0.05
0.10
0.15
0.20
0.25
0.30
0.35
25
35
45
55
65
75
85
I
D
(ON)
I
S
(OFF)
I
D
(OFF)
Figure 9. Leakage Currents as a Function of Temperature
TEMPERATURE
C
15
CURRENT nA
V
DD
= 3V
V
SS
= 0V
0.05
0.00
0.05
0.10
0.15
0.20
0.25
0.30
0.35
25
35
45
55
65
75
85
I
D
(ON)
I
S
(OFF)
I
D
(OFF)
Figure 10. Leakage Currents as a Function of Temperature
FREQUENCY Hz
10m
10
CURRENT A
1m
100
10
1
100n
10n
1n
100
1k
10k
100k
1M
10M
T
A
= 25 C
V
DD
= +3.0V
V
SS
= 3.0V
V
DD
= +3V
V
DD
= +5V
Figure 11. Supply Current vs. Input Switching Frequency
FREQUENCY Hz
0
30k
ATTENUATION dB
20
40
60
80
100
120
100k
1M
10M
100M
V
DD
= 5V
T
A
= 25 C
Figure 12. Off Isolation vs. Frequency
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ADG708/ADG709
9
REV. 0
FREQUENCY Hz
0
30k
ATTENUATION dB
20
40
60
80
100
120
100k
1M
10M
100M
V
DD
= 5V
T
A
= 25 C
Figure 13. Crosstalk vs. Frequency
FREQUENCY Hz
0
30k
ATTENUATION dB
5
100k
1M
10M
100M
10
15
20
V
DD
= 5V
T
A
= 25 C
Figure 14. On Response vs. Frequency
VOLTAGE Volts
3
2
20
Q
INJ
pC
1
1
2
5
T
A
= 25 C
10
0
10
20
40
3
30
0
4
V
DD
= 3V
V
SS
= 0V
V
DD
= +3V
V
SS
= 3V
V
DD
= 5V
V
SS
= 0V
Figure 15. Charge Injection vs. Source Voltage
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ADG708/ADG709
10
REV. 0
V
S8
3V
50%
t
TRANSITION
90%
90%
ADDRESS
DRIVE (V
IN
)
50%
0V
V
S1
V
OUT
t
TRANSITION
A2
D
* SIMILAR CONNECTION FOR ADG709
A1
A0
EN
GND
ADG708*
S1
S8
S2 THRU S7
V
IN
2.4V
50
35pF
V
DD
V
SS
V
DD
V
SS
V
S1
V
S8
300
R
L
C
L
V
OUT
Test Circuit 5. Switching Time of Multiplexer, t
TRANSITION
t
OPEN
3V
80%
80%
ADDRESS
DRIVE (V
IN
)
0V
V
OUT
A2
D
* SIMILAR CONNECTION FOR ADG709
A1
A0
EN
GND
ADG708*
S1
S8
S2 THRU S7
V
IN
2.4V
50
35pF
V
DD
V
SS
V
DD
V
SS
V
S
300
R
L
C
L
V
OUT
Test Circuit 6. Break-Before-Make Delay, t
OPEN
Test Circuits
R
ON
= V
1
/I
DS
V
S
V1
I
DS
D
S
Test Circuit 1. On Resistance
V
D
A
0.8V
D
I
S
(OFF)
V
SS
V
DD
V
SS
V
DD
S1
S2
S8
EN
GND
V
S
Test Circuit 2. I
S
(OFF)
V
S
A
0.8V
D
I
D
(OFF)
V
SS
V
DD
V
SS
V
DD
S1
S2
S8
EN
GND
V
D
Test Circuit 3. I
D
(OFF)
A
2.4V
D
I
D
(ON)
V
SS
V
DD
V
SS
V
DD
S1
S8
EN
GND
V
D
V
S
Test Circuit 4. I
D
(ON)
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ADG708/ADG709
11
REV. 0
OUTPUT
3V
50%
ENABLE
DRIVE (V
IN
)
50%
0V
V
0
t
ON
(EN)
0V
0.9V
0
0.9V
0
t
OFF
(EN)
A2
D
* SIMILAR CONNECTION FOR ADG709
A1
A0
EN
GND
ADG708*
S1
S2 THRU S8
V
IN
35pF
V
DD
V
SS
V
DD
V
SS
V
S
300
R
L
C
L
V
OUT
50
Test Circuit 7. Enable Delay, t
ON
(EN), t
OFF
(EN)
LOGIC INPUT
(V
IN
)
3V
0V
V
OUT
Q
INJ
= C
L
V
OUT
V
OUT
A2
V
OUT
V
DD
D
A1
A0
EN
GND
ADG708*
C
L
1nF
V
DD
S
V
IN
R
S
V
SS
V
SS
V
S
*SIMILAR CONNECTION FOR ADG709
Test Circuit 8. Charge Injection
A2
D
A1
A0
EN**
GND
V
DD
V
DD
50
R
L
V
OUT
S1
S8
V
SS
V
SS
V
S
* SIMILAR CONNECTION FOR ADG709
** CONNECT TO 2.4V FOR BANDWIDTH MEASUREMENTS
ADG708
*
OFF ISOLATION = 20LOG
10
V
OUT
V
S
V
OUT
WITH SWITCH
V
OUT
WITHOUT SWITCH
(
)
INSERTION LOSS = 20LOG
10
Test Circuit 9. OFF Isolation and Bandwidth
A2
V
OUT
V
SS
V
DD
D
A1
A0
EN
GND
ADG708
*
R
L
V
SS
V
SS
S1
V
S
S2
S8
2.4V
50
50
* SIMILAR CONNECTION FOR ADG709
CHANNEL-TO-CHANNEL CROSSTALK = 20LOG
10
V
OUT
V
S
Test Circuit 10. Channel-to-Channel Crosstalk
Power-Supply Sequencing
When using CMOS devices, care must be taken to ensure correct
power-supply sequencing. Incorrect power-supply sequencing
can result in the device being subjected to stresses beyond the
maximum ratings listed in the data sheet. Digital and analog
inputs should always be applied after power supplies and ground.
For single supply operation, V
SS
should be tied to GND as close
to the device as possible.
background image
12
C371281/00 (rev. 0)
PRINTED IN U.S.A.
ADG708/ADG709
REV. 0
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
16-Lead TSSOP
(RU-16)
16
9
8
1
0.201 (5.10)
0.193 (4.90)
0.256 (6.50)
0.246 (6.25)
0.177 (4.50)
0.169 (4.30)
PIN 1
SEATING
PLANE
0.006 (0.15)
0.002 (0.05)
0.0118 (0.30)
0.0075 (0.19)
0.0256
(0.65)
BSC
0.0433
(1.10)
MAX
0.0079 (0.20)
0.0035 (0.090)
0.028 (0.70)
0.020 (0.50)
8
0