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REV. 0
Information furnished by Analog Devices is believed to be accurate and
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which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
ADG749
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
Analog Devices, Inc., 2000
CMOS Low Voltage
2.5 SPDT Switch In SC70 Package
FUNCTIONAL BLOCK DIAGRAM
IN
ADG749
S2
S1
D
SWITCHES SHOWN FOR
A LOGIC "1" INPUT
FEATURES
1.8 V to 5.5 V Single Supply
5 (Max) On Resistance
0.75
(Typ) On-Resistance Flatness
3 dB Bandwidth >200 MHz
Rail-to-Rail Operation
6-Lead SC70 Package
Fast Switching Times
t
ON
20 ns
t
OFF
6 ns
Typical Power Consumption (<0.01 W)
TTL/CMOS-Compatible
APPLICATIONS
Battery-Powered Systems
Communication Systems
Sample Hold Systems
Audio Signal Routing
Video Switching
Mechanical Reed Relay Replacement
GENERAL DESCRIPTION
The ADG749 is a monolithic CMOS SPDT switch. This switch
is designed on a submicron process that provides low power
dissipation yet gives high switching speed, low on resistance and
low leakage currents.
The ADG749 can operate from a single supply range of 1.8 V to
5.5 V, making it ideal for use in battery-powered instruments and
with the new generation of DACs and ADCs from Analog Devices.
Each switch of the ADG749 conducts equally well in both
directions when on. The ADG749 exhibits break-before-make
switching action.
Because of the advanced submicron process, 3 dB bandwidths
of greater than 200 MHz can be achieved.
The ADG749 is available in a 6-lead SC70 package.
PRODUCT HIGHLIGHTS
1. 1.8 V to 5.5 V Single Supply Operation. The ADG749
offers high performance, including low on resistance and
fast switching times, and is fully specified and guaranteed
with 3 V and 5 V supply rails.
2. Very Low R
ON
(5
max at 5 V, 10 max at 3 V). At 1.8 V
operation, R
ON
is typically 40
over the temperature range.
3. On-Resistance Flatness (R
FLAT(ON)
) (0.75
typ).
4. 3 dB Bandwidth >200 MHz.
5. Low Power Dissipation. CMOS construction ensures low
power dissipation.
6. Fast t
ON
/t
OFF.
7. Tiny 6-lead SC70 package.
2
REV. 0
ADG749SPECIFICATIONS
1
B Version
40 C to
Parameter
25 C
+85 C
Unit
Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range
0 V to V
DD
V
On Resistance (R
ON
)
2 .5
typ
V
S
= 0 V to V
DD
, I
S
= 10 mA
5
6
max
Test Circuit 1
On Resistance Match Between
Channels (
R
ON
)
0.1
typ
V
S
= 0 V to V
DD
, I
S
= 10 mA
0.8
max
On-Resistance Flatness (R
FLAT(ON)
)
0.75
typ
V
S
= 0 V to V
DD
, I
S
= 10 mA
1.2
max
LEAKAGE CURRENTS
2
V
DD
= 5.5 V
Source OFF Leakage I
S
(OFF)
0.01
nA typ
V
S
= 4.5 V/1 V, V
D
= 1 V/4.5 V
0.25
0.35
nA max
Test Circuit 2
Channel ON Leakage I
D
, I
S
(ON)
0.01
nA typ
V
S
= V
D
= 1 V, or V
S
= V
D
= 4.5 V
0.25
0.35
nA max
Test Circuit 3
DIGITAL INPUTS
Input High Voltage, V
INH
2.4
V min
Input Low Voltage, V
INL
0.8
V max
Input Current
I
INL
or I
INH
0.005
A typ
V
IN
= V
INL
or V
INH
0.1
A max
DYNAMIC CHARACTERISTICS
2
t
ON
14
ns typ
R
L
= 300
, C
L
= 35 pF
20
ns max
V
S
= 3 V, Test Circuit 4
t
OFF
3
ns typ
R
L
= 300
, C
L
= 35 pF
6
ns max
V
S
= 3 V, Test Circuit 4
Break-Before-Make Time Delay, t
D
8
ns typ
R
L
= 300
, C
L
= 35 pF,
1
ns min
V
S1
= V
S2
= 3 V, Test Circuit 5
Off Isolation
67
dB typ
R
L
= 50
, C
L
= 5 pF, f = 10 MHz
87
dB typ
R
L
= 50
, C
L
= 5 pF, f = 1 MHz,
Test Circuit 6
Channel-to-Channel Crosstalk
62
dB typ
R
L
= 50
, C
L
= 5 pF, f = 10 MHz
82
dB typ
R
L
= 50
, C
L
= 5 pF, f = 1 MHz,
Test Circuit 7
Bandwidth 3 dB
200
MHz typ
R
L
= 50
, C
L
= 5 pF, Test Circuit 8
C
S
(OFF)
7
pF typ
C
D
, C
S
(ON)
27
pF typ
POWER REQUIREMENTS
V
DD
= 5.5 V
Digital Inputs = 0 V or 5 V
I
DD
0.001
A typ
1.0
A max
NOTES
1
Temperature ranges are as follows: B Version, 40
C to +85C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
(V
DD
= 5 V 10%, GND = 0 V. All specifications 40 C to +85 C,
unless otherwise
noted.)
3
REV. 0
ADG749
B Version
40 C to
Parameter
25 C
+85 C
Unit
Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range
0 V to V
DD
V
On Resistance (R
ON
)
6
7
typ
V
S
= 0 V to V
DD
, I
S
= 10 mA,
10
max
Test Circuit 1
On Resistance Match Between
Channels (
R
ON
)
0.1
typ
V
S
= 0 V to V
DD
, I
S
= 10 mA
0.8
max
On-Resistance Flatness (R
FLAT(ON)
)
2.5
typ
V
S
= 0 V to V
DD
, I
S
= 10 mA
LEAKAGE CURRENTS
2
V
DD
= 3.3 V
Source OFF Leakage I
S
(OFF)
0.01
nA typ
V
S
= 3 V/1 V, V
D
= 1 V/3 V,
0.25
0.35
nA max
Test Circuit 2
Channel ON Leakage I
D
, I
S
(ON)
0.01
nA typ
V
S
= V
D
= 1 V, or V
S
= V
D
= 3 V,
0.25
0.35
nA max
Test Circuit 3
DIGITAL INPUTS
Input High Voltage, V
INH
2.0
V min
Input Low Voltage, V
INL
0.4
V max
Input Current
I
INL
or I
INH
0.005
A typ
V
IN
= V
INL
or V
INH
0.1
A max
DYNAMIC CHARACTERISTICS
2
t
ON
16
ns typ
R
L
= 300
, C
L
= 35 pF
24
ns max
V
S
= 2 V, Test Circuit 4
t
OFF
4
ns typ
R
L
= 300
, C
L
= 35 pF
7
ns max
V
S
= 2 V, Test Circuit 4
Break-Before-Make Time Delay, t
D
8
ns typ
R
L
= 300
, C
L
= 35 pF
1
ns min
V
S1
= V
S2
= 2 V, Test Circuit 5
Off Isolation
67
dB typ
R
L
= 50
, C
L
= 5 pF, f = 10 MHz
87
dB typ
R
L
= 50
, C
L
= 5 pF, f = 1 MHz,
Test Circuit 6
Channel-to-Channel Crosstalk
62
dB typ
R
L
= 50
, C
L
= 5 pF, f = 10 MHz
82
dB typ
R
L
= 50
, C
L
= 5 pF, f = 1 MHz,
Test Circuit 7
Bandwidth 3 dB
200
MHz typ
R
L
= 50
, C
L
= 5 pF, Test Circuit 8
C
S
(OFF)
7
pF typ
C
D
, C
S
(ON)
27
pF typ
POWER REQUIREMENTS
V
DD
= 3.3 V
Digital Inputs = 0 V or 3 V
I
DD
0.001
A typ
1.0
A max
NOTES
1
Temperature ranges are as follows: B Version, 40
C to +85C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
(V
DD
= 3 V 10%, GND = 0 V. All specifications 40 C to +85 C,
unless otherwise noted.)
SPECIFICATIONS
1
ADG749
4
REV. 0
ORDERING GUIDE
Model
Temperature Range
Package Description
Package Option
Branding Information
*
ADG749BKS
40
C to +85C
SC70 (Plastic Surface Mount)
KS-6
SHB
*Brand = Brand on these packages is limited to three characters due to space constraints.
PIN CONFIGURATION
6-Lead SC70
TOP VIEW
(Not to Scale)
6
5
4
1
2
3
IN
V
DD
GND
S2
D
S1
ADG749
Table I. Truth Table
ADG749 IN
Switch S1
Switch S2
0
ON
OFF
1
OFF
ON
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADG749 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
ABSOLUTE MAXIMUM RATINGS
1
(T
A
= 25
C unless otherwise noted)
V
DD
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to +7 V
Analog, Digital Inputs
2
. . . . . . . . . . 0.3 V to V
DD
+ 0.3 V or
30 mA, Whichever Occurs First
Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA
(Pulsed at 1 ms, 10% Duty Cycle max)
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . 30 mA
Operating Temperature Range
Industrial (B Version) . . . . . . . . . . . . . . . . . 40
C to +85C
Storage Temperature Range . . . . . . . . . . . . . 65
C to +150C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150
C
SC70 Package, Power Dissipation . . . . . . . . . . . . . . . . 315 mW
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 332
C/W
JC
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 120
C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . . 215
C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220
C
ESD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5 kV
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability. Only one absolute
maximum rating may be applied at any one time.
2
Overvoltages at IN, S or D will be clamped by internal diodes. Current should be
limited to the maximum ratings given.
TERMINOLOGY
V
DD
Most Positive Power Supply Potential.
GND
Ground (0 V) Reference.
S
Source Terminal. May be an input or output.
D
Drain Terminal. May be an input or output.
IN
Logic Control Input.
R
ON
Ohmic resistance between D and S.
R
ON
On resistance match between any two channels
i.e., R
ON
max R
ON
min.
R
FLAT(ON)
Flatness is defined as the difference between the
maximum and minimum value of on resistance as
measured over the specified analog signal range.
I
S
(OFF)
Source Leakage Current with the switch "OFF."
I
D
, I
S
(ON)
Channel Leakage Current with the switch "ON."
V
D
(V
S
)
Analog Voltage on Terminals D, S.
C
S
(OFF)
"OFF" Switch Source Capacitance.
C
D
(OFF)
"OFF" Switch Drain Capacitance.
C
D
, C
S
(ON) "ON" Switch Capacitance.
t
ON
Delay between applying the digital control input
and the output switching on.
t
OFF
Delay between applying the digital control input
and the output switching off.
t
D
"OFF" time or "ON" time measured between the
90% points of both switches, when switching
from one address state to another.
Crosstalk
A measure of unwanted signal that is coupled
through from one channel to another as a result
of parasitic capacitance.
Off Isolation A measure of unwanted signal coupling through
an "OFF" switch.
Bandwidth
The frequency at which the output is attenuated
by 3 dBs.
On Response The frequency response of the "ON" switch.
On Loss
The voltage drop across the "ON" switch seen on
the On Response vs. Frequency plot as how many
dBs the signal is away from 0 dB at very low
frequencies.
ADG749
5
REV. 0
V
D
OR V
S
DRAIN OR SOURCE VOLTAGE V
5.0
0
0
5.0
0.5
R
ON
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
4.5
4.0
3.5
3.0
2.5
2.0
V
DD
= 2.7V
V
DD
= 3.0V
V
DD
= 4.5V
V
DD
= 5.0V
1.5
1.0
0.5
T
A
= 25 C
6.0
5.5
TPC 1. On Resistance as a Function of V
D
(V
S
) Single
Supplies
V
D
OR V
S
DRAIN OR SOURCE VOLTAGE V
5.0
0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
5.5
6.0
0
3.0
0.5
R
ON
1.0
1.5
2.0
2.5
V
DD
= 3V
+85 C
+25 C
40 C
TPC 2. On Resistance as a Function of V
D
(V
S
) for
Different Temperatures V
DD
= 3 V
V
D
OR V
S
DRAIN OR SOURCE VOLTAGE V
0
0
5.0
0.5
R
ON
1.0
1.5
2.0
2.5
3.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
3.5
4.0
4.5
V
DD
= 5V
5.0
4.5
4.0
+85 C
40 C
+25 C
6.0
5.5
TPC 3. On Resistance as a Function of V
D
(V
S
) for
Different Temperatures V
DD
= 5 V
Typical Performance Characteristics
FREQUENCY Hz
1n
10
I
SUPPLY
A
100
1k
10k
100k
1M
10M
100M
10n
100n
1
10
100
1m
10m
1
V
DD
= 5V
TPC 4. Supply Current vs. Input Switching Frequency
FREQUENCY Hz
120
OFF ISOLATION
dB
10k
100k
1M
10M
100M
110
100
90
130
80
70
60
50
40
30
V
DD
= 5V, 3V
0
TPC 5. Off Isolation vs. Frequency
FREQUENCY Hz
30
10k
CROSSTALK
dB
40
50
60
70
80
90
100
110
120
130
100k
1M
10M
100M
0
V
DD
= 5V, 3V
TPC 6. Crosstalk vs. Frequency
ADG749
6
REV. 0
I
DS
V1
S
D
V
S
R
ON
= V1/I
DS
Test Circuit 1. On Resistance
Test Circuits
S
D
V
S
A
A
V
D
I
S
(OFF)
I
D
(OFF)
Test Circuit 2. Off Leakage
S
D
V
S
A
V
D
I
D
(ON)
Test Circuit 3. On Leakage
0.1 F
V
DD
V
S
IN
S
D
V
DD
GND
R
L
300
C
L
35pF
V
OUT
50%
50%
90%
90%
V
IN
V
OUT
t
ON
t
OFF
Test Circuit 4. Switching Times
0.1 F
V
DD
V
S1
IN
S1
D
V
DD
GND
R
L2
300
C
L2
35pF
V
OUT
S2
V
S2
D2
V
IN
50%
50%
V
IN
V
OUT
t
D
t
D
50%
50%
0V
0V
Test Circuit 5. Break-Before-Make Time Delay, t
D
S2
S1
0.1 F
V
DD
IN
D
V
DD
GND
R
L
50
V
OUT
V
IN
V
S
Test Circuit 6. Off Isolation
V
OUT
CHANNEL-TO-CHANNEL
CROSSTALK = 20 LOG |V
S
/V
OUT
|
S2
S1
0.1 F
V
DD
IN
D
V
DD
GND
R
L
50
V
S
Test Circuit 7. Channel-to-Channel
Crosstalk
S2
S1
0.1 F
V
DD
IN
D
V
DD
GND
R
L
50
V
OUT
V
IN
V
S
Test Circuit 8. Bandwidth
V
DD
= 5V
FREQUENCY Hz
0
10M
10k
ON RESPONSE
dB
4
2
100k
1M
100M
6
TPC 7. On Response vs. Frequency
ADG749
7
REV. 0
APPLICATIONS INFORMATION
The ADG749 belongs to Analog Devices' new family of
CMOS switches. This series of general purpose switches have
improved switching times, lower on resistance, higher band-
widths, low power consumption and low leakage currents.
ADG749 Supply Voltages
Functionality of the ADG749 extends from 1.8 V to 5.5 V single
supply, which makes it ideal for battery powered instruments,
where important design parameters are power efficiency and
performance.
It is important to note that the supply voltage effects the input
signal range, the on resistance and the switching times of the
part. By taking a look at the typical performance characteristics
and the specifications, the effects of the power supplies can be
clearly seen.
For V
DD
= 1.8 V operation, R
ON
is typically 40
over the tem-
perature range.
On Response vs. Frequency
Figure 1 illustrates the parasitic components that affect the ac
performance of CMOS switches (the switch is shown surrounded
by a box). Additional external capacitances will further degrade
some performance. These capacitances affect feedthrough,
crosstalk and system bandwidth.
C
DS
S
V
IN
R
ON
C
D
C
LOAD
R
LOAD
D
V
OUT
Figure 1. Switch Represented by Equivalent Parasitic
Components
The transfer function that describes the equivalent diagram of
the switch (Figure 1) is of the form (A)s shown below.
A(s)
= R
T
s(R
ON
C
DS
)
+1
s(R
T
R
ON
C
T
)
+1
where:
R
T
= R
LOAD
/(R
LOAD
+ R
ON
)
C
T
= C
LOAD
+ C
D
+ C
DS
The signal transfer characteristic is dependent on the switch
channel capacitance, C
DS
. This capacitance creates a frequency
zero in the numerator of the transfer function A(s). Because the
switch on resistance is small, this zero usually occurs at high
frequencies. The bandwidth is a function of the switch output
capacitance combined with C
DS
and the load capacitance. The
frequency pole corresponding to these capacitances appears in
the denominator of A(s).
The dominant effect of the output capacitance, C
D
, causes the
pole breakpoint frequency to occur first. Therefore, in order to
maximize bandwidth a switch must have a low input and output
capacitance and low on resistance. The On Response vs. Fre-
quency plot for the ADG749 can be seen in TPC 7.
Off Isolation
Off isolation is a measure of the input signal coupled through an
off switch to the switch output. The capacitance, C
DS
, couples
the input signal to the output load, when the switch is off as
shown in Figure 2.
C
DS
S
V
IN
C
D
C
LOAD
R
LOAD
D
V
OUT
Figure 2. Off Isolation Is Affected by External Load Resis-
tance and Capacitance
The larger the value of C
DS
, larger values of feedthrough will be
produced. The typical performance characteristic graph of TPC
5 illustrates the drop in off isolation as a function of frequency.
From dc to roughly 200 kHz, the switch shows better than
95 dB isolation. Up to frequencies of 10 MHz, the off isolation
remains better than 67 dB. As the frequency increases, more and
more of the input signal is coupled through to the output. Off
isolation can be maximized by choosing a switch with the small-
est C
DS
as possible. The values of load resistance and capacitance
affect off isolation also, as they contribute to the coefficients of the
poles and zeros in the transfer function of the switch when open.
A(s)
=
s( R
LOAD
C
DS
)
s( R
LOAD
) (C
LOAD
+ C
D
+ C
DS
)
+1
ADG749
8
REV. 0
C020752.510/00 (rev. 0)
PRINTED IN U.S.A.
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
6-Lead Plastic Surface Mount Package (SC70)
(KS-6)
0.007 (0.18)
0.004 (0.10)
0.012 (0.30)
0.004 (0.10)
8
0
0.012 (0.30)
0.006 (0.15)
0.004 (0.10)
0.000 (0.00)
0.039 (1.00)
0.031 (0.80)
SEATING
PLANE
0.043 (1.10)
0.031 (0.80)
3
5
4
2
6
1
0.087 (2.20)
0.071 (1.80)
PIN 1
0.094 (2.40)
0.071 (1.80)
0.026 (0.65) BSC
0.053 (1.35)
0.045 (1.15)
0.051 (1.30)
BSC
Document Outline
- Specifications
- Pinout
- Package drawings
- Ordering Guide
- Features
- Applications
- Product Description
- Absolute Maximum Ratings
- Functional Block Diagram
- Typical Characteristics
- PRODUCT HIGHLIGHTS
- TERMINOLOGY
- APPLICATIONS INFORMATION
- DIAGRAMS
- Test Circuit 1. On Resistance
- Test Circuit 2. Off Leakage
- Test Circuit 3. On Leakage
- Test Circuit 4. Switching Times
- Test Circuit 5. Break-Before-Make Time Delay, tD
- Test Circuit 6. Off Isolation
- Test Circuit 7. Channel-to-Channel Crosstalk
- Test Circuit 8. Bandwidth
- Switch Represented by Equivalent Parasitic Components
- Off Isolation Is Affected by External Load Resistance and Capacitance
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