REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
ADG751
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
Analog Devices, Inc., 1999
CMOS, Low Voltage
RF/Video, SPST Switch
FUNCTIONAL BLOCK DIAGRAM
D
IN
S
ADG751
SWITCH SHOWN FOR A LOGIC "1" INPUT
FEATURES
High Off Isolation 75 dB at 100 MHz
3 dB Signal Bandwidth 300 MHz
+1.8 V to +5.5 V Single Supply
Low On-Resistance (15 )
Fast Switching Times
t
ON
Typically 9 ns
t
OFF
Typically 3 ns
Typical Power Consumption <0.01 W
TTL/CMOS Compatible
APPLICATIONS
Audio and Video Switching
RF Switching
Networking Applications
Battery Powered Systems
Communication Systems
Relay Replacement
Sample-and-Hold Systems
GENERAL DESCRIPTION
The ADG751 is a low voltage SPST (single pole, single throw)
switch. It is constructed in a T-switch configuration, which
results in excellent Off Isolation while maintaining good fre-
quency response in the ON condition.
High off isolation and wide signal bandwidth make this part
suitable for switching RF and video signals. Low power con-
sumption and operating supply range of +1.8 V to +5.5 V make
it ideal for battery powered, portable instruments.
The ADG751 is designed on a submicron process that provides
low power dissipation yet gives high switching speed and low on
resistance. This part is a fully bidirectional switch and can handle
signals up to and including the supply rails.
The ADG751 is available in 6-lead SOT-23 and 8-lead
SOIC
packages.
PRODUCT HIGHLIGHTS
1. High Off Isolation 75 dB at 100 MHz.
2. 3 dB Signal Bandwidth 300 MHz.
3. Low On-Resistance (15
).
4. Low Power Consumption, typically <0.01
W.
5. Tiny 6-lead SOT-23 and 8-lead
SOIC packages.
REV. 0
2
ADG751SPECIFICATIONS
(V
DD
= +5 V
10%, GND = 0 V, unless otherwise noted.)
B Grade
A Grade
40 C to
40 C to
Parameter
+25 C
+85 C
+25 C
+85 C
Units
Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range
0 V to V
DD
0 V to V
DD
V
On-Resistance (R
ON
)
28
15
typ
V
S
= 0 V to V
DD
, I
DS
= 10 mA;
35
40
18
20
max
Test Circuit 1
On-Resistance Flatness (R
FLAT(ON)
)
3
2
typ
V
S
= 0 V to 2.5 V, I
DS
= 10 mA
5
3
max
V
DD
= 4.5 V
LEAKAGE CURRENTS
V
DD
= +5.5 V
Source OFF Leakage I
S
(OFF)
0.01
0.01
nA typ
V
D
= 4.5 V/1 V, V
S
= 1 V/4.5 V;
0.25
3.0
0.25
3.0
nA max
Test Circuit 2
Drain OFF Leakage I
D
(OFF)
0.01
0.01
nA typ
V
D
= 4.5 V/1 V, V
S
= 1 V/4.5 V;
0.25
3.0
0.25
3.0
nA max
Test Circuit 2
Channel ON Leakage I
D
, I
S
(ON)
0.01
0.01
nA typ
V
D
= V
S
= 1 V, or 4.5 V;
0.25
3.0
0.25
3.0
nA max
Test Circuit 3
DIGITAL INPUTS
Input High Voltage, V
INH
2.4
2.4
V min
Input Low Voltage, V
INL
0.8
0.8
V max
Input Current
I
INL
or I
INH
0.001
0.001
A typ
V
IN
= V
INL
or V
INH
0.5
0.5
A max
C
IN
, Digital Input Capacitance
2
2
pF typ
DYNAMIC CHARACTERISTICS
1
t
ON
9
9
ns typ
R
L
= 300
, C
L
= 35 pF;
13
13
ns max
V
S
= 3 V, Test Circuit 4
t
OFF
3
3
ns typ
R
L
= 300
, C
L
= 35 pF;
5
5
ns max
V
S
= 3 V, Test Circuit 4
Charge Injection
1
1
pC typ
V
S
= 1 V, R
S
= 0
, C
L
= 1.0 nF;
Test Circuit 5
Off Isolation
75
65
dB typ
R
L
= 50
, C
L
= 5 pF, f = 100 MHz;
Test Circuit 6
3 dB Bandwidth
180
300
MHz typ R
L
= 50
, C
L
= 5 pF, Test Circuit 7
C
S
(OFF)
4
4
pF typ
C
D
(OFF)
4
4
pF typ
C
D
, C
S
(ON)
26
15
pF typ
POWER REQUIREMENTS
V
DD
= +5.5 V
I
DD
0.001
0.001
A typ
Digital Inputs = 0 V or +5.5 V
0.1
0.5
0.1
0.5
A max
NOTES
1
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
REV. 0
3
ADG751
SPECIFICATIONS
B Grade
A Grade
40 C to
40 C to
Parameter
+25 C
+85 C
+25 C
+85 C
Units
Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range
0 V to V
DD
0 V to V
DD
V
On-Resistance (R
ON
)
60
35
typ
V
S
= 0 V to V
DD
, I
DS
= 10 mA;
90
50
max
Test Circuit 1
LEAKAGE CURRENTS
V
DD
= +3.3 V
Source OFF Leakage I
S
(OFF)
0.01
0.01
nA typ
V
D
= 3 V/1 V, V
S
= 1 V/3 V;
0.25
3.0
0.25
3.0
nA max
Test Circuit 2
Drain OFF Leakage I
D
(OFF)
0.01
0.01
nA typ
V
D
= 1 V/3 V, V
S
= 3 V/1 V;
0.25
3.0
0.25
3.0
nA max
Test Circuit 2
Channel ON Leakage I
D
, I
S
(ON)
0.01
0.01
nA typ
V
D
= V
S
= 1 V, or 3 V;
0.25
3.0
0.25
3.0
nA max
Test Circuit 3
DIGITAL INPUTS
Input High Voltage, V
INH
2.0
2.0
V min
Input Low Voltage, V
INL
0.4
0.4
V max
Input Current
I
INL
or I
INH
0.001
0.001
A typ
V
IN
= V
INL
or V
INH
0.5
0.5
A max
C
IN
, Digital Input Capacitance
2
2
pF typ
DYNAMIC CHARACTERISTICS
1
t
ON
12
12
ns typ
R
L
= 300
, C
L
= 35 pF;
19
19
ns max
V
S
= 2 V, Test Circuit 4
t
OFF
4
4
ns typ
R
L
= 300
, C
L
= 35 pF;
6
6
ns max
V
S
= 2 V, Test Circuit 4
Charge Injection
1
1
pC typ
V
S
= 1 V, R
S
= 0
, C
L
= 1.0 nF;
Test Circuit 5
Off Isolation
75
65
dB typ
R
L
= 50
, C
L
= 5 pF, f = 100 MHz;
Test Circuit 6
3 dB Bandwidth
180
280
MHz typ R
L
= 50
, C
L
= 5 pF, Test Circuit 7
C
S
(OFF)
4
4
pF typ
C
D
(OFF)
4
4
pF typ
C
D
, C
S
(ON)
26
15
pF typ
POWER REQUIREMENTS
V
DD
= +3.3 V
I
DD
0.001
0.001
A typ
Digital Inputs = 0 V or +3.3 V
0.1
0.5
0.1
0.5
A max
NOTES
1
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
(V
DD
= +3 V 10%, GND = 0 V, unless otherwise noted.)
REV. 0
ADG751
4
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADG751 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
ABSOLUTE MAXIMUM RATINGS
1
(T
A
= +25
C unless otherwise noted)
V
DD
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to +6 V
Analog, Digital Inputs
2
. . . . . . . . . . . 0.3 V to V
DD
+0.3 V or
30 mA, Whichever Occurs First
Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . .100 mA
(Pulsed at 1 ms, 10% Duty Cycle Max)
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . 30 mA
Operating Temperature Range
Industrial (A, B Versions) . . . . . . . . . . . . . . 40
C to +85
C
Storage Temperature Range . . . . . . . . . . . . . 65
C to +150
C
Junction Temperature (T
J
Max) . . . . . . . . . . . . . . . . . .+150
C
Power Dissipation . . . . . . . . . . . . . . . . . . . . (T
J
MaxT
A
)/
JA
SOIC Package
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 206
C/W
JC
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 44
C/W
SOT-23 Package
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . 229.6
C/W
JC
Thermal Impedance . . . . . . . . . . . . . . . . . . . . 91.99
C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . +215
C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . +220
C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability. Only one absolute
maximum rating may be applied at any one time.
2
Overvoltages at IN, S or D will be clamped by internal diodes. Current should be
limited to the maximum ratings given.
ORDERING GUIDE
Model
Temperature Range
Brand*
Package Descriptions
Package Options
ADG751BRM
40
C to +85
C
SDB
SOIC
RM-8
ADG751BRT
40
C to +85
C
SDB
SOT-23
RT-6
ADG751ARM
40
C to +85
C
SDA
SOIC
RM-8
ADG751ART
40
C to +85
C
SDA
SOT-23
RT-6
*Brand on these packages is limited to three characters due to space constraints.
REV. 0
ADG751
5
TERMINOLOGY
V
DD
Most positive power supply potential.
GND
Ground (0 V) reference.
S
Source terminal. May be an input or output.
D
Drain terminal. May be an input or output.
IN
Logic control input.
R
ON
Ohmic resistance between D and S.
R
FLAT(ON)
Flatness is defined as the difference between
the maximum and minimum value of on resis-
tance as measured over the specified analog
signal range.
I
S
(OFF)
Source leakage current with the switch "OFF."
I
D
(OFF)
Drain leakage current with the switch "OFF."
I
D
, I
S
(ON)
Channel leakage current with the switch "ON."
V
D
(V
S
)
Analog voltage on terminals D and S.
C
S
(OFF)
"OFF" switch source capacitance.
C
D
(OFF)
"OFF" switch drain capacitance.
C
D
, C
S
(ON)
"ON" switch capacitance.
t
ON
Delay between applying the digital control
input and the output switching on. See Test
Circuit 4.
t
OFF
Delay between applying the digital control
input and the output switching off.
Off Isolation
A measure of unwanted signal coupling
through an "OFF" switch.
Charge
A measure of the glitch impulse transferred from
Injection
the digital input to the analog output during
switching.
Bandwidth
The frequency at which the output is attenu-
ated by 3 dBs.
On Response
The frequency response of the "ON" switch.
Insertion Loss
Loss due to the ON resistance of the switch.
V
INL
Maximum input voltage for Logic "0."
V
INH
Minimum input voltage for Logic "1."
I
INL
(I
INH
)
Input current of the digital input.
I
DD
Positive supply current.
Table I. Truth Table
ADG751 IN
Switch Condition
0
ON
1
OFF
PIN CONFIGURATIONS
8-Lead SOIC
(RM-8)
1
2
3
4
8
7
6
5
TOP VIEW
(Not to Scale)
NC = NO CONNECT
ADG751
NC
NC
NC
D
V
DD
S
GND
IN
6-Lead SOT-23
(RT-6)
1
2
3
6
5
4
TOP VIEW
(Not to Scale)
NC = NO CONNECT
ADG751
IN
D
V
DD
S
NC
GND
REV. 0
ADG751
6
V
D
OR V
S
DRAIN SOURCE VOLTAGE Volts
35
5
0
1
R
ON
2
3
4
5
30
25
20
15
10
V
DD
= +5.5V
T
A
= +25 C
V
DD
= +2.7V
V
DD
= +3.3V
V
DD
= +4.5V
Figure 1. On Resistance as a Function of V
D
(V
S
) Single
Supplies (A Grade)
V
D
OR V
S
DRAIN SOURCE VOLTAGE Volts
35
5
0
0.5
R
ON
1.0
1.5
2.0
2.5
30
25
20
15
10
40 C
3.0
+25 C
+125 C
+85 C
V
DD
= +3V
Figure 2. On Resistance as a Function of V
D
(V
S
) for
Different Temperatures V
DD
= 3 V (A Grade)
V
DD
= +5V
V
D
OR V
S
DRAIN SOURCE VOLTAGE Volts
35
5
0
1
R
ON
2
3
30
25
20
15
10
40 C
5
+25 C
+125 C
+85 C
4
0
Figure 3. On Resistance as a Function of V
D
(V
S
) for
Different Temperatures V
DD
= 5 V (A Grade)
V
D
OR V
S
DRAIN SOURCE VOLTAGE Volts
45
15
0
1.0
R
ON
2.0
3.0
40
35
30
25
20
4.0
5.0
5.4
V
DD
= +2.7V
V
DD
= +3.3V
V
DD
= +4.5V
V
DD
= +5.5V
T
A
= +25 C
50
55
60
65
Figure 4. On Resistance as a Function of V
D
(V
S
) Single
Supplies (B Grade)
V
D
OR V
S
DRAIN SOURCE VOLTAGE Volts
45
15
0
0.4
R
ON
1.2
3.0
40
35
30
25
20
50
55
60
65
V
DD
= +3V
0.8
1.6
2.0
2.4
2.8
40 C
+25 C
+85 C
+125 C
Figure 5. On Resistance as a Function of V
D
(V
S
) for
Different Temperatures V
DD
= 3 V (B Grade)
V
D
OR V
S
DRAIN SOURCE VOLTAGE Volts
20
0
R
ON
5.0
15
10
5
0
25
V
DD
= +5V
2.0
40 C
+25 C
+85 C
+125 C
1.0
4.0
3.0
50
45
40
35
30
55
60
65
Figure 6. On Resistance as a Function of V
D
(V
S
) for
Different Temperatures V
DD
= 5 V (B Grade)
Typical Performance Characteristics
REV. 0
ADG751
7
FREQUENCY MHz
0
1
10
BANDWIDTH dB
5
10
T
A
= +25 C
100
300
Figure 7. On Response vs. Frequency (A Grade)
FREQUENCY MHz
0
1
100
BANDWIDTH dB
5
10
10
300
T
A
= +25 C
Figure 8. On Response vs. Frequency (B Grade)
FREQUENCY MHz
0
1
10
OFF ISOLATION dB
100
25
50
75
100
125
300
A GRADE
B GRADE
T
A
= +25 C
Figure 9. Off Isolation vs. Frequency for Both Grades
FREQUENCY Hz
10n
0.1
I
DD
Amps
1k
10k
100n
10
1
1m
10m
100k
100M
10M
B GRADE
A GRADE
V
DD
= +5V
T
A
= +25 C
Figure 10. Supply Current vs. Input Switching Frequency
SOURCE VOLTAGE Volts
0
Q
INJ
pC
5.0
10
2.0
1.0
4.0
3.0
8
6
4
2
0
2
4
6
V
DD
= +5V
T
A
= +25 C
V
DD
= +3V
Figure 11. Charge Injection vs. Source/Drain Voltage
REV. 0
ADG751
8
GENERAL DESCRIPTION
The ADG751 is an SPST switch constructed using switches in a
T configuration to obtain high "OFF" isolation while maintain-
ing good frequency response in the "ON" condition.
Figure 12 shows the T-switch configuration. While the switch is
in the OFF state, the shunt switch is closed and the two series
switches are open. The closed shunt switch provides a signal
path to ground for any of the unwanted signals that find their
way through the off capacitances of the series' MOS devices.
This results in improved isolation between the input and output
than with an ordinary series switch. When the switch is in the
ON condition, the shunt switch is open and the signal path is
through the two series switches which are now closed.
D
IN
S
SERIES
SHUNT
Figure 12. Basic T-Switch Configuration
LAYOUT CONSIDERATIONS
Where accurate high frequency operation is important, careful
consideration should be given to the printed circuit board layout
and to grounding. Wire wrap boards, prototype boards and
sockets are not recommended because of their high parasitic
inductance and capacitance. The part should be soldered di-
rectly to a printed circuit board. A ground plane should cover all
unused areas of the component side of the board to provide a
low impedance path to ground. Removing the ground planes
from the area around the part reduces stray capacitance.
Good decoupling is important in achieving optimum perfor-
mance. V
DD
should be decoupled with a 0.1
F surface mount
capacitor to ground mounted as close as possible to the device
itself.
REV. 0
ADG751
9
V
S
IN
GND
R
L
300
C
L
35pF
V
OUT
V
DD
0.1 F
90%
90%
50%
50%
V
IN
V
OUT
V
S
t
OFF
t
ON
V
DD
S
D
Test Circuit 4. Switching Times
Q
INJ
= C
L
V
OUT
ON
OFF
V
S
IN
GND
C
L
1.0nF
V
OUT
V
DD
V
DD
S
D
R
S
V
IN
V
OUT
V
OUT
Test Circuit 5. Charge Injection
S
D
V
S
R
ON
= V1/I
DS
I
DS
V1
Test Circuit 1. On Resistance
S
D
V
S
A
A
V
D
I
S
(OFF)
I
D
(OFF)
Test Circuit 2. Off Leakage
S
D
A
V
D
I
D
(ON)
NC
NC = NO CONNECT
Test Circuit 3. On Leakage
Test Circuits
V
S
V
OUT
50
NETWORK
ANALYZER
NETWORK
ANALYZER
R
L
50
IN
GND
V
DD
V
DD
V
IN
S
D
0.1 F
50
OFF
ISOLATION
=
20
LOG
V
OUT
V
S
Test Circuit 6. Off Isolation
V
S
V
OUT
50
NETWORK
ANALYZER
NETWORK
ANALYZER
R
L
50
IN
GND
V
DD
V
DD
V
IN
S
D
0.1 F
INSERTION
LOSS
=
20
LOG
V
OUT
WITH
SWITCH
V
OUT
WITHOUT
SWITCH
Test Circuit 7. Bandwidth
REV. 0
ADG751
10
8-Lead SOIC
(RM-8)
0.011 (0.28)
0.003 (0.08)
0.028 (0.71)
0.016 (0.41)
33
27
0.120 (3.05)
0.112 (2.84)
8
5
4
1
0.122 (3.10)
0.114 (2.90)
0.199 (5.05)
0.187 (4.75)
PIN 1
0.0256 (0.65) BSC
0.122 (3.10)
0.114 (2.90)
SEATING
PLANE
0.006 (0.15)
0.002 (0.05)
0.018 (0.46)
0.008 (0.20)
0.043 (1.09)
0.037 (0.94)
0.120 (3.05)
0.112 (2.84)
6-Lead SOT-23
(RT-6)
0.122 (3.10)
0.106 (2.70)
PIN 1
0.118 (3.00)
0.098 (2.50)
0.075 (1.90)
BSC
0.037 (0.95) BSC
1
3
4
5
6
2
0.071 (1.80)
0.059 (1.50)
0.009 (0.23)
0.003 (0.08)
0.022 (0.55)
0.014 (0.35)
10
0
0.020 (0.50)
0.010 (0.25)
0.006 (0.15)
0.000 (0.00)
0.051 (1.30)
0.035 (0.90)
SEATING
PLANE
0.057 (1.45)
0.035 (0.90)
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
C356984/99
PRINTED IN U.S.A.
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