REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
ADP3303A
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
Analog Devices, Inc., 1999
High Accuracy anyCAPTM Adjustable
200 mA Low Dropout Linear Regulator
FUNCTIONAL BLOCK DIAGRAM
Q2
THERMAL
PROTECTION
g
m
Q1
CC
BANDGAP
REF
DRIVER
ADP3303A
OUT
IN
ERR
SD
GND
FB
ADP3303A
ERR
OUT
IN
FB
R1
C2
1 F
V
OUT
= +5V
ON
OFF
SD
GND
C1
0.47 F
V
IN
R2
R3
330k
E
OUT
SD
Figure 1. Typical Application Circuit
FEATURES
High Accuracy Over Line and Load:
0.8% @ +25 C, 1.4% Over Temperature
Ultralow Dropout Voltage: 150 mV Typical @ 200 mA
Requires Only C
O
= 1 F for Stability
anyCAP = Stable with All Types of Capacitors
(Including MLCC)
Current and Thermal Limiting
Low Noise
Dropout Detector
Low Shutdown Current: 1 A
3.2 V to 12 V Supply Range
Adjustable 2.2 V to 10 V Output Range
20 C to +85 C Ambient Temperature Range
Thermally Enhanced TSSOP-14 Package
APPLICATIONS
Cellular Telephones
Notebook, Palmtop Computers
Battery Powered Systems
Portable Instruments
Post Regulator for Switching Supplies
Bar Code Scanners
GENERAL DESCRIPTION
The ADP3303A is a member of the ADP330x family of preci-
sion low dropout anyCAP voltage regulators. The ADP3303A
stands out from conventional LDOs with a novel architecture,
an enhanced process and a new package. Its patented design
requires only a 1
F output capacitor for stability. This device is
insensitive to output capacitor ESR (Equivalent Series Resis-
tance), and is stable with any good quality capacitor, including
ceramic types (MLCC) for space restricted applications. The
ADP3303A achieves exceptional accuracy of
0.8% at room
temperature and
1.4% overall accuracy over temperature, line
and load variations. The dropout voltage of the ADP3303A is
only 150 mV (typical) at 200 mA.
In addition to the new architecture and process, ADI's new
proprietary thermally enhanced package (Thermal Coastline)
can handle 1 W of power dissipation without an external heat
sink or large copper surface on the PC board. This keeps PC
board real estate to a minimum and makes the ADP3303A very
attractive for use in portable equipment.
The ADP3303A operates over an input voltage range of 3.2 V
to 12 V and delivers a load current in excess of 200 mA. The
output voltage can be adjusted from 2.2 V to 10 V using an
external resistor divider. It also features an error flag that signals
when the device is about to lose regulation or when the short
circuit or thermal overload protection is activated. Other fea-
tures include shutdown and optional noise reduction capabilities.
anyCAP is a trademark of Analog Devices Inc.
2
REV. A
(@ T
A
= 20 C to +85 C, V
IN
= 7 V, C
IN
= 0.47 F, C
OUT
= 1 F, unless otherwise
noted)
1
ADP3303ASPECIFICATIONS
Parameter
Symbol
Conditions
Min
Typ
Max
Units
OUTPUT VOLTAGE
2, 3, 4
V
OUT
V
IN
= Nom V
OUT
+0.5 V to +12 V
ACCURACY
I
L
= 1.0 mA to 200 mA
T
A
= +25
C
0.8
+0.8
%
V
IN
= Nom V
OUT
+0.5 V to +12 V
I
L
= 1.0 mA to 200 mA
1.4
+1.4
%
LINE REGULATION
V
O
V
IN
= Nom V
OUT
+0.5 V to +12 V
V
IN
T
A
= +25
C
0.01
mV/V
LOAD REGULATION
V
O
I
L
= 1.0 mA to 200 mA
I
L
T
A
= +25
C
0.005
mV/mA
GROUND CURRENT
5
I
GND
I
L
= 200 mA
2.0
4
mA
I
L
= 1.0 mA
0.35
0.6
mA
GROUND CURRENT
5
I
GND
V
IN
= 2.5 V, V
OUT
= 5.0 V
IN DROPOUT
I
L
= 1.0 mA
1.9
3.0
mA
DROPOUT VOLTAGE
V
DROP
V
OUT
98% of V
O
Nominal
I
L
= 200 mA
0.15
0.4
V
I
L
= 10 mA
0.02
0.07
V
I
L
= 1 mA
0.003
0.03
V
SHUTDOWN THRESHOLD
V
THSD
ON
2.0
0.9
V
OFF
0.9
0.3
V
SHUTDOWN PIN
I
SDIN
0 V < V
SD
5 V
1
A
INPUT
CURRENT
5
V
V
SD
12 V @ V
IN
= 12 V
22
A
GROUND CURRENT IN
5
I
Q
V
SD
= 0, V
IN
= 12 V
SHUTDOWN MODE
T
A
= +25
C
1
A
V
SD
= 0 V, V
IN
= 12 V
T
A
= +85
C
5
A
OUTPUT CURRENT IN
I
OSD
T
A
= +25
C @ V
IN
= 12 V
2.5
A
SHUTDOWN MODE
T
A
= +85
C @ V
IN
= 12 V
4
A
ERROR PIN OUTPUT
LEAKAGE
I
EL
V
EO
= 5 V
13
A
ERROR PIN OUTPUT
"LOW" VOLTAGE
V
EOL
I
SINK
= 400
A
0.15
0.3
V
PEAK LOAD CURRENT
I
LDPK
V
IN
= Nom V
OUT
+ 1 V
300
mA
OUTPUT NOISE
V
NOISE
f = 10 Hz100 kHz
@ 5 V OUTPUT
C
NR
= 0
100
V
rms
C
NR
= 10 nF, C
L
= 10
F
30
V
rms
NOTES
1
Ambient temperature of +85
C corresponds to a typical junction temperature of +125
C under typical full load test conditions. The formula for Nom V
OUT
is found
in the Output Voltage Selection section.
2
Accuracy guaranteed using external trim pots.
3
For 2.7 V output, the minimum V
IN
is 3.2 V.
4
Guaranteed by design and characterization.
5
Ground currents include the current through R1, R2.
Specifications subject to change without notice.
ADP3303A
3
REV. A
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADP3303A features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
PIN FUNCTION DESCRIPTIONS
Pin
Mnemonic
Function
13
NC
No Connect.
4 & 5
OUT
Output of the Regulator. Bypass to
ground with a 1
F or larger capacitor.
Pins 4 and 5 must be connected
together for proper operation.
6
FB
Feedback. Connect to an external
resistor divider that sets the output
voltage.
7
GND
Ground.
8
SD
Active Low Shutdown Pin. Connect to
ground to disable the regulator output.
When shutdown is not used, this pin
should be connected to the input pin.
9
ERR
Open Collector Output that goes low to
indicate that the output is about to go
out of regulation.
10 & 11 IN
Regulator Input. Pins 10 and 11 must
be connected together for proper
operation.
1214
NC
No Connect.
PIN CONFIGURATION
ADP3303A
TOP VIEW
(Not to Scale)
NC
NC = NO CONNECT
NC
NC
OUT
OUT
FB
GND
NC
NC
NC
IN
IN
ERR
SD
ABSOLUTE MAXIMUM RATINGS*
Input Supply Voltage . . . . . . . . . . . . . . . . . . . 0.3 V to +16 V
Shutdown Input Voltage . . . . . . . . . . . . . . . . 0.3 V to +16 V
Error Flag Output Voltage . . . . . . . . . . . . . . . 0.3 V to +16 V
Noise Bypass Pin Voltage . . . . . . . . . . . . . . . . 0.3 V to +5 V
Power Dissipation . . . . . . . . . . . . . . . . . . . Internally Limited
Operating Ambient Temperature Range . . . 55
C to +125
C
Operation Junction Temperature Range . . . 55
C to +125
C
JA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
C/W
Storage Temperature Range . . . . . . . . . . . . 65
C to +150
C
Lead Temperature Range (Soldering 10 sec) . . . . . . . +300
C
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . +215
C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . +220
C
*This is a stress rating only; operation beyond these limits can cause the device to
be permanently damaged.
Other Members of anyCAP Family
1
Output
Package
Model
Current
Options
2
Comments
ADP3300
50 mA
SOT-23-6
High Accuracy
ADP3301
100 mA
SO-8
High Accuracy
ADP3302
100 mA
SO-8
Dual Output
ADP3307
100 mA
SOT-23-6
High Accuracy
ADP3308
50 mA
SOT-23-5
High Accuracy
ADP3309
100 mA
SOT-23-5
High Accuracy
NOTES
1
See individual data sheets for detailed ordering information.
2
SO = Small Outline, SOT = Surface Mount Outline.
ORDERING GUIDE
Model
Voltage Output
Package Description
Package Option
ADP3303AARU-Reel
ADJ
Thin Shrink Small Outline Package (TSSOP)
TSSOP-14
NOTES
All devices operate over the ambient temperature range of 20
C to +85
C.
Contact the factory for the availability of other output voltage options.
WARNING!
ESD SENSITIVE DEVICE
ADP3303A
4
REV. A
Typical Performance Characteristics
INPUT VOLTAGE Volts
OUTPUT VOLTAGE Volts
3.5 4
16
5
6
7
8
9 10 11 12 13 14 15
V
OUT
= +3.3V
I
L
= 0mA
I
L
= 10mA
I
L
= 200mA
I
L
= 100mA
3.30025
3.29950
3.29850
3.30000
3.29975
3.29925
3.29900
3.29875
Figure 2. Line Regulation: Output
Voltage vs. Supply Voltage
OUTPUT LOAD mA
GROUND CURRENT
A
1600
800
200
0
20
200
40 60 80 100 120 140 160 180
1400
1200
600
400
1000
I
L
= 0 TO 200mA
1800
2000
Figure 5. Quiescent Current vs. Load
Current
OUTPUT LOAD mA
0
20
200
40
60 80 100 120 140 160 180
180
160
0
80
60
40
20
140
100
120
INPUT-OUTPUT VOLTAGE mV
Figure 8. Dropout Voltage vs. Output
Current
OUTPUT LOAD mA
OUTPUT VOLTAGE Volts
3.30025
3.29950
3.29875
0
20
200
40
60 80 100 120 140 160 180
3.30000
3.29975
3.29925
3.29900
V
IN
= +7V
V
OUT
= +3.3V
Figure 3. Output Voltage vs. Load
Current
TEMPERATURE C
OUTPUT VOLTAGE %
0.2
0.4
45 25
135
5
15
35
75
95
115
55
0.1
0.0
0.1
0.2
0.3
I
L
= 0mA
Figure 6. Output Voltage Variation
% vs. Temperature
INPUT VOLTAGE Volts
5
0
0
3
0
4
3
2
4
2
1
3
2
1
1
INPUT-OUTPUT VOLTAGE Volts
R
L
= 16.5
V
OUT
= +3.3V
Figure 9. Power-Up/Power-Down
INPUT VOLTAGE Volts
GROUND CURRENT
A
2.0
1.6
0
0
2
4
6
8
12
14
16
10
1.2
0.8
0.4
V
OUT
= +3.3V
I
L
= 0mA
Figure 4. Quiescent Current vs.
Supply Voltage
\
TEMPERATURE C
GROUND CURRENT
A
3000
2000
0
25
5
135
15
35
55
75
95
115
1500
1000
500
V
IN
= +7V
I
L
= 200mA
I
L
= 0mA
2500
I
L
= 100mA
Figure 7. Quiescent Current vs.
Temperature
TIME s
0
0
100
200
2.0
V
SD
= V
IN
OR +3V
C
L
= 1 F
R
L
= 16.5
V
OUT
= +3.3V
1.0
3.0
4.0
5.0
6.0
7.0
8.0
20
INPUT-OUTPUT VOLTAGE Volts
40 60
80
120 140 160 180
V
IN
V
OUT
Figure 10. Power-Up Transient
ADP3303A
5
REV. A
TIME s
5.02
4.99
0
20
200
40
60 80 100 120 140 160 180
5.01
5.00
7.0
4.98
7.5
Volts
25 , 1 F LOAD
V
IN
V
OUT
= +5V
Figure 11. Line Transient Response
TIME s
Volts
3.310
3.305
0
200
1000
400
600
800
3.290
200
10
3.300
3.295
mA
V
OUT
= +3.3V
I (V
OUT
)
V
OUT
C
L
= 10 F
Figure 14. Load Transient for
10 mA to 200 mA Pulse
TIME s
Volts
4
1
0
50
10
20
30
40
3
2
0
0
5
V
OUT
V
SD
C = 1 F
R = 16.5 ON +3.3V OUTPUT
Figure 17. Turn Off
TIME s
5.02
4.99
0
40
400
80 120 160 200 240 280 320 360
5.01
5.00
7.0
4.98
7.5
Volts
5k , 1 F LOAD
V
IN
V
OUT
= +5V
Figure 12. Line Transient Response
Volts
TIME sec
3.5
0
0
5
1
2
3
4
0
300
100
400
200
+3.3V
mA
V
OUT
I
OUT
V
IN
= +7V
Figure 15. Short Circuit Current
FREQUENCY Hz
RIPPLE REJECTION dB
0
100
10
100
10M
1k
10k
100k
1M
10
60
70
80
90
20
30
50
40
a. 1 F, R
L
= 33k
b. 1 F, R
L
= 16.5
c. 10 F, R
L
= 33k
d. 10 F, R
L
= 16.5
b d
a c
b
d
a
c
V
OUT
= +3.3V
Figure 18. Power Supply Ripple
Rejection
TIME s
Volts
3.310
3.305
0
200
1000
400
600
800
3.290
200
10
3.300
3.295
mA
V
OUT
= +3.3V
I (V
OUT
)
V
OUT
C
L
= 1 F
Figure 13. Load Transient for 10 mA
to 200 mA Pulse
TIME s
Volts
4
0
40
200
80
120
160
1
0
5
0
3
2
3
C
L
= 1 F, R
L
= 3.3k
C
L
= 10 F, R
L
= 3.3k
C
L
= 10 F, R
L
= 16.5
+3.3V
V
OUT
SD
V
IN
= +7V
Figure 16. Turn On
FREQUENCY Hz
VOLTAGE NOISE SPECTRAL DENSITY
V/
Hz
10
1.0
0.01
100
1k
100k
10k
0.1
0.47 F BYPASS
PIN 7, 8 TO PIN3
V
OUT
= 3.3V, C
L
= 1 F,
I
L
= 1mA, C
NR
= 0
V
OUT
= 5V, C
L
= 1 F,
I
L
= 1mA, C
NR
= 0
V
OUT
= 2.2-5.0V, C
L
= 10 F,
I
L
= 1mA, C
NR
= 10nF
Figure 19. Output Noise Density
ADP3303A
6
REV. A
THEORY OF OPERATION
The new anyCAP LDO ADP3303A uses a single control loop
for regulation and reference functions. The output voltage is
sensed by a resistive voltage divider consisting of R1 and R2,
which is varied to provide the available output voltage options.
Feedback is taken from this network by way of a series diode
(D1) and a second resistor divider (R3 and R4) to the input of
an amplifier.
g
m
PTAT
V
OS
R4
R3
D1
R1
ATTENUATION
(V
BANDGAP
/V
OUT
)
R2
(a)
COMPENSATION
CAPACITOR
NONINVERTING
WIDEBAND
DRIVER
Q1
INPUT
C
LOAD
OUTPUT
ADP3303A
R
LOAD
PTAT
CURRENT
GND
Figure 20. Functional Block Diagram
A very high gain error amplifier is used to control this loop. The
amplifier is constructed in such a way that at equilibrium it
produces a large, temperature proportional input "offset voltage"
that is repeatable and very well controlled. The temperature-
proportional offset voltage is combined with the complementary
diode voltage to form a "virtual bandgap" voltage, implicit in
the network, although it never appears explicitly in the circuit.
Ultimately, this patented design makes it possible to control the
loop with only one amplifier. This technique also improves the
noise characteristics of the amplifier by providing more flexibil-
ity on the trade-off of noise sources that leads to a low noise
design.
The R1, R2 divider is chosen in the same ratio as the bandgap
voltage to the output voltage. Although the R1, R2 resistor
divider is loaded by the diode D1, and a second divider consist-
ing of R3 and R4, the values are chosen to produce a tempera-
ture stable output. This unique arrangement specifically corrects
for the loading of the divider so that the error resulting from
base current loading in conventional circuits is avoided.
The patented amplifier controls a new and unique noninverting
driver that drives the pass transistor, Q1. The use of this special
noninverting driver enables the frequency compensation to
include the load capacitor in a pole splitting arrangement to
achieve reduced sensitivity to the value, type and ESR of the
load capacitance.
Most LDOs place strict requirements on the range of ESR val-
ues for the output capacitor because they are difficult to sta-
bilize due to the uncertainty of load capacitance and resistance.
Moreover, the ESR value, required to keep conventional LDOs
stable, changes depending on load and temperature. These ESR
limitations make designing with LDOs more difficult because
of their unclear specifications and extreme variations over
temperature.
This is no longer true with the ADP3303A anyCAP LDO. It
can be used with virtually any capacitor, with no constraint on
the minimum ESR. The innovative design allows the circuit to
be stable with just a small 1
F capacitor on the output. Addi-
tional advantages of the pole splitting scheme include superior line
noise rejection and very high regulator gain, which leads to excel-
lent line and load regulation. An impressive
1.4% accuracy is
guaranteed over line, load and temperature.
Additional features of the circuit include current limit, thermal
shutdown and noise reduction. Compared to standard solutions
that give warning after the output has lost regulation, the
ADP3303A provides improved system performance by enabling
the ERR Pin to give warning before the device loses regulation.
As the chip's temperature rises above 165
C, the circuit acti-
vates a soft thermal shutdown, indicated by a signal low on the
ERR Pin, to reduce the current to a safe level.
APPLICATION INFORMATION
The ADP3303A is very easy to use. The only external compo-
nent required for stability is a small 1
F bypass capacitor on the
output. If the shutdown feature is not used, the shutdown pin
(Pin 8) should be tied to the input pin.
CAPACITOR SELECTION
Bypass Capacitor (C1): connecting a 0.47
F capacitor from the
IN pins (Pins 10 and 11) to ground greatly improves its line
transient response and reduces the circuit's sensitivity to PC
board layout. A larger capacitor could be used if line transients
of longer duration are expected.
Output Capacitor (C2): as will all members of the anyCAP low
dropout regulator family, the ADP3303A is stable with any type
of output capacitor down to zero ESR. A small 1
F output
capacitor is required for stability. Larger capacitors with low
ESR are recommended for improved load transient response.
For space limited applications, Multilayer Ceramic Capacitors
(MLCC) are a good choice. For low temperature operations
OS-CON capacitors offer better performance.
Noise Reduction Capacitor (CNR): to reduce the ADP3303A's
low output noise by 6 dB10 dB, a noise gain limiting capacitor
can be connected between the feedback (FB) pin (Pin 6) and
the OUT pins as shown in Figure 21. Low leakage capacitors
in the 100 pF500 pF range provide the best performance.
Larger capacitors will slow down the output transient response.
CNR is not needed in low noise applications where fast load
transients are not expected.
ADP3303A
8
7
6
9
ERR
OUT
IN
4
5
11
10
FB
R1
C
NR
V
OUT
= +5V
SD
GND
C1
V
IN
R2
R3
330k
1 F
Figure 21. Noise Reduction Circuit
OUTPUT VOLTAGE SELECTION
The ADP3303A is characterized by having the output voltage
divider placed externally. The output voltage will be divided by
R1 and R2 and fed back to the FB pin.
In order to have the lowest possible sensitivity of output voltage
versus any temperature variation, it is important that the parallel
resistance of R1 and R2 is always 44 k
.
ADP3303A
7
REV. A
The proper formula to compute R1 and R2 is:
R
k
V
R
k
V
SEL
SEL
1
44
1 189
2
44
1
1 189
=
=
-
.
,
.
Where
V
SEL
is the desired output voltage.
The output voltage can be selected from 2.2 V to 10 V. R1 is
connected from the OUT pin to the FB pin and R2 is connected
from the FB pin to GND. As an example, the Feedback Resistor
Selection Table shows the feedback resistor values for 3 V and
5 V output voltages.
Table I. Feedback Resistor Selection Table
R1
R2
V
OUT
(1% Resistor)
(1% Resistor)
3 V
110 k
73.2 k
5 V
187 k
57.6 k
OUTPUT CURRENT LIMITING
Short circuit protection is provided by limiting the pass transis-
tors base drive current. Maximum output current is limited to
200 mA.
THERMAL OVERLOAD PROTECTION
The ADP3303A is protected against damage due to excessive
power dissipation by its thermal overload protection circuit,
which limits the die temperature to a maximum of 165
C.
Under extreme conditions (i.e., high ambient temperature and
power dissipation), where die temperature starts to rise above
165
C, the output current is reduced until the die temperature
has dropped to a safe level. The output current is restored when
the die temperature is reduced.
Current and thermal limit protections are intended to protect
the device against accidental overload conditions. For normal
operation, device power dissipation should be externally limited
so that junction temperatures will not exceed 125
C.
CALCULATING JUNCTION TEMPERATURE
Device power dissipation is calculated as follows:
P
D
= (
V
IN
V
OUT
)
I
LOAD
+ (V
IN
)
I
GND
Where
I
LOAD
and
I
GND
are load current and ground current,
V
IN
and
V
OUT
are input and output voltages, respectively.
Assuming
I
LOAD
= 200 mA,
I
GND
= 4 mA,
V
IN
= 5.5 V and
V
OUT
= 3.0 V, device power dissipation is:
P
D
= (5.5 V 3.0 V ) 0.2 + 5.5
0.004
= 0.522 W
The proprietary thermal coastline TSSOP-14 package of the
ADP3303A, in conjunction with the recommended PCB layout
shown in Figure 21, yields a thermal resistance of 96
C/W. As a
result, the die temperature rise for the example circuit is:
T = T
J
T
A
=
P
D
J
A
= 0.522
96 = 50.1
C
If the maximum ambient temperature is 50
C, this yields a
maximum junction temperature of T
JMAX
= 100.1
C, which is
below the 125
C maximum operating junction temperature
rating.
PRINTED CIRCUIT BOARD LAYOUT CONSIDERATION
The rate at which heat is transferred is directly proportional to
the temperature differential between the die and PC board.
Once heat is transferred to the PC board, it should be dissipated
to the air or other medium.
Surface mount components rely on the conductive traces or
pads to transfer heat away from the device. Appropriate PC
board layout technique should be used to remove heat from
immediate vicinity of the package.
The following general guidelines will be helpful when designing
a board layout:
1. PC board traces with larger cross section areas will remove
more heat. For optimum results, use PC's with thicker cop-
per and or wider traces.
2. Increase the surface area exposed to open air so heat can be
removed by convection or forced air flow.
3. Do not solder mask or silk screen the heat dissipating traces.
Black anodizing will significantly improve heat reduction by
means of increased radiation.
Figure 22 shows the recommended board layout for the
ADP3303A. Although it is not critical, make sure R1 is con-
nected right at the pin or the point you want to regulate in order
to realize a proper kelvin connection. This will improve overall
precision and stability. The same consideration is valid for the
R2 connection to the ground pin, but a short connection is
strongly suggested. No other components can be connected to
the FB pin except an optional 10 nF100 nF capacitor (C
NR
) in
parallel to R1 that serves as a noise reduction capacitor.
SHUTDOWN MODE
Applying a TTL high signal to the shutdown pin, or tying it to
the input pin, will turn the output ON. Pulling the shutdown
pin down to 0.3 V or below, or tying it to ground, will turn the
output OFF. In shutdown mode, quiescent current is reduced
to less than 1
A.
INPUTOUTPUT DROPOUT VOLTAGE AND DROPOUT
DETECTOR
The ADP3303A maintains a regulated output with an input
voltage as low as 150 mV above the nominal output voltage.
Input voltage falling below this level will generate an error signal
indicating that the error amplifier output is reaching its satu-
rated state and will not be able to drive the pass transistor any
harder. Lowering the input voltage any further will result in
output voltage reduction and loss of regulation.
The input voltage threshold which generates the error output
signal depends on the load current. At the rated output current,
it is slightly lower than the nominal output voltage plus the
dropout voltage. However, the threshold is much lower at
lighter loads.
APPLICATION CIRCUITS
Crossover Switch
The circuit in Figure 23 shows that two ADP3303As can be
used to form a mixed supply voltage system. The output
switches between two different levels selected by an external
digital input. Output voltages can be any combination of volt-
ages from the Ordering Guide.
ADP3303A
8
REV. A
C3328a27/99
PRINTED IN U.S.A.
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
14-Lead Thin Shrink Small Outline Package (TSSOP)
(RU-14)
14
8
7
1
0.201 (5.10)
0.193 (4.90)
0.256 (6.50)
0.246 (6.25)
0.177 (4.50)
0.169 (4.30)
PIN 1
SEATING
PLANE
0.006 (0.15)
0.002 (0.05)
0.0118 (0.30)
0.0075 (0.19)
0.0256
(0.65)
BSC
0.0433
(1.10)
MAX
0.0079 (0.20)
0.0035 (0.090)
0.028 (0.70)
0.020 (0.50)
8
0
D1
1N5817
C2
100 F
10V
L1
6.8 H
R1
120
ADP3303A
IN
SD
OUT
GND
C3
2.2 F
3.3V @ 160mA
C1
100 F
10V
ADP3000-ADJ
I
LIM
V
IN
SW1
GND
SW2
FB
V
IN
= 2.5V TO 3.5V
R2
30.1k
1%
Q1
2N3906
Q2
2N3906
R4
274k
R3
124k
1%
FB
R5
121k
R6
68.1k
Figure 25. Constant Dropout Post Regulator
BOTTOM OF THE BOARD
10mm
10mm
10mm
TOP OF THE BOARD
DRAWINGS NOT TO SCALE
Figure 22. ADP3303A (TSSOP-14) Recommended Board
Layout
ADP3303A
OUT
IN
GND
OUTPUT SELECT
5V
0V
C1
1.0 F
C2
1.0 F
V
OUT
= 5V/3V
V
IN
= 5.5V TO 12V
SD
187k
57.6k
FB
110k
73.2k
ADP3303A
OUT
IN
GND
SD
FB
Figure 23. Crossover Switch
V
IN
= 6V TO 8V
V
OUT
= 5V @ 1A
MJE253*
C2
10 F
C1
47 F
R1
50
*AAVOD531002 HEAT SINK IS USED
IN
OUT
ERR
GND
SD
ADP3303A
FB
187k
57.6k
Figure 24. High Output Current Linear Regulator
Higher Output Current
The ADP3303A can source up to 200 mA without any heatsink
or pass transistor. If higher current is needed, an appropriate
pass transistor can be used, as in Figure 24, to increase the
output current to 1 A.
Constant Dropout Post Regulator
The circuit in Figure 25 provides high precision with low drop-
out for any regulated output voltage. It significantly reduces the
ripple from a switching regulator while providing a constant
dropout voltage, which limits the power dissipation of the LDO
to 60 mW. The ADP3000 used in this circuit is a switching
regulator in the step-up configuration.
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