REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
ADP3303
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
Analog Devices, Inc., 1998
High Accuracy anyCAPTM
200 mA Low Dropout Linear Regulator
FUNCTIONAL BLOCK DIAGRAM
Q2
THERMAL
PROTECTION
g
m
Q1
CC
BANDGAP
REF
DRIVER
R1
R2
ADP3303
OUT
IN
ERR
SD
GND
ADP3303-5.0
5
4
6
3
NR
OUT
IN
1
2
7
8
ERR
330k
E
OUT
C2
0.47 F
V
OUT
= +5V
ON
OFF
SD
C1
0.47 F
V
IN
SD
GND
Figure 1. Typical Application Circuit
FEATURES
High Accuracy Over Line and Load 0.8% @ at +25 C,
1.4% Over Temperature
Ultralow Dropout Voltage: 180 mV (Typ) @ 200 mA
Requires Only C
O
= 0.47 F for Stability
anyCAP = Stable with All Types of Capacitors
(Including MLCC)
3.2 V to 12 V Supply Range
Current and Thermal Limiting
Low Noise
Dropout Detector
Low Shutdown Current: < 1 A
Thermally Enhanced SO-8 Package
Excellent Line and Load Regulation Performance
APPLICATIONS
Cellular Telephones
Notebook, Palmtop Computers
Battery Powered Systems
Portable Instruments
Post Regulator for Switching Supplies
Bar Code Scanners
GENERAL DESCRIPTION
The ADP3303 is a member of the ADP330x family of preci-
sion low dropout anyCAP voltage regulators. The ADP3303
stands out from the conventional LDOs with a novel architec-
ture, an enhanced process and a new package. Its patented
design requires only a 0.47
F output capacitor for stability.
This device is insensitive to capacitor Equivalent Series Resis-
tance (ESR) and is stable with any good quality capacitor, in-
cluding ceramic types (MLCC) for space restricted applications.
The ADP3303 achieves exceptional accuracy of
0.8% at room
temperature and
1.4% overall accuracy over temperature, line
and load regulations. The dropout voltage of the ADP3303 is
only 180 mV (typical) at 200 mA.
In addition to the new architecture and process, ADI's new
proprietary thermally enhanced package (Thermal Coastline)
can handle 1 W of power dissipation without external heatsink
or large copper surface on the PC board. This keeps PC board
real estate to a minimum and makes the ADP3303 very attrac-
tive for use in portable equipment.
The ADP3303 operates with a wide input voltage range from
3.2 V to 12 V and delivers a load current in excess of 200 mA.
It features an error flag that signals when the device is about to
lose regulation or when the short circuit or thermal overload
protection is activated. Other features include shutdown and
optional noise reduction capabilities. The ADP330x anyCAP
LDO family offers a wide range of output voltages and output
current levels:
ADP3300 (50 mA, SOT-23)
ADP3301 (100 mA)
ADP3302 (100 mA, Dual Output)
ADP3307 (100 mA, SOT-23-6)
ADP3308 (50 mA, SOT-23-5)
ADP3309 (100 mA, SOT-23-5)
anyCAP is a trademark of Analog Devices Inc.
2
REV. A
(@ T
A
= 20 C to +85 C, V
IN
= 7 V, C
IN
= 0.47 F, C
OUT
= 0.47 F, unless
otherwise noted)
1
ADP3303-xxSPECIFICATIONS
Parameter
Symbol
Conditions
Min
Typ
Max
Units
OUTPUT VOLTAGE
V
OUT
V
IN
= V
OUTNOM
+0.5 V to 12 V
ACCURACY
I
L
= 0.1 mA to 200 mA
T
A
= +25
C
0.8
+0.8
%
V
IN
= V
OUTNOM
+0.5 V to 12 V
I
L
= 0.1 mA to 200 mA
1.4
+1.4
%
LINE REGULATION
V
O
V
IN
= V
OUTNOM
+0.5 V to 12 V
V
IN
T
A
= +25
C
0.01
mV/V
LOAD REGULATION
V
O
I
L
= 0.1 mA to 200 mA
I
L
T
A
= +25
C
0.013
mV/mA
GROUND CURRENT
I
GND
I
L
= 200 mA
1.5
4
mA
I
L
= 0.1 mA
0.25
0.4
mA
GROUND CURRENT
I
GND
V
IN
= 2.5 V
IN DROPOUT
I
L
= 0.1 mA
1.12
2.5
mA
DROPOUT VOLTAGE
V
DROP
V
OUT
= 98% of V
OUTNOM
I
L
= 200 mA
0.18
0.4
V
I
L
= 10 mA
0.02
0.07
V
I
L
= 1 mA
0.003
0.03
V
SHUTDOWN THRESHOLD
V
THSD
ON
2.0
V
OFF
0.3
V
SHUTDOWN PIN
I
SDIN
0 < V
SD
< 5 V
1
A
INPUT
CURRENT
5
V
SD
12 V @ V
IN
= 12 V
22
A
GROUND CURRENT IN
I
Q
V
SD
= 0, V
IN
= 12 V
SHUTDOWN MODE
T
A
= +25
C
1
A
V
SD
= 0, V
IN
= 12 V
T
A
= +85
C
5
A
OUTPUT CURRENT IN
I
OSD
T
A
= +25
C @ V
IN
= 12 V
2.5
A
SHUTDOWN MODE
T
A
= +85
C @ V
IN
= 12 V
4
A
ERROR PIN OUTPUT
LEAKAGE
I
EL
V
EO
= 5 V
13
A
ERROR PIN OUTPUT
"LOW" VOLTAGE
V
EOL
I
SINK
= 400
A
0.15
0.3
V
PEAK LOAD CURRENT
I
LDPK
V
IN
= V
OUTNOM
+ 1 V
300
mA
OUTPUT NOISE
V
NOISE
f = 10 Hz100 kHz
@ 5 V OUTPUT
C
NR
= 0
100
V
rms
C
NR
= 10 nF, C
L
= 10
F
30
V
rms
NOTES
1
Ambient temperature of +85
C corresponds to a typical junction temperature of +125
C under typical full load test conditions.
Specifications subject to change without notice.
ADP3303
3
REV. A
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADP3303 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
PIN FUNCTION DESCRIPTIONS
Pin
Mnemonic
Function
1 & 2
OUT
Output of the Regulator. Bypass to
ground with a 0.47
F or larger
capacitor. Pins 1 and 2 must be con-
nected together for proper operation.
3
NR
Noise Reduction Pin. Used for reduc-
tion of the output noise. (See text for
details.) No connection if not used.
4
GND
Ground Pin.
5
SD
Active Low Shutdown Pin. Connect to
ground to disable the regulator output.
When shutdown is not used, this pin
should be connected to the input pin.
6
ERR
Open Collector Output. Goes low to
indicate that the output is about to go
out of regulation.
7 & 8
IN
Regulator Input. Pins 7 and 8 must
be connected together for proper
operation.
PIN CONFIGURATION
1
2
3
4
8
7
6
5
TOP VIEW
(Not to Scale)
OUT
OUT
NR
GND
IN
IN
ERR
SD
ADP3303
ABSOLUTE MAXIMUM RATINGS*
Input Supply Voltage . . . . . . . . . . . . . . . . . . . 0.3 V to +16 V
Shutdown Input Voltage . . . . . . . . . . . . . . . . 0.3 V to +16 V
Error Flag Output Voltage . . . . . . . . . . . . . . . 0.3 V to +16 V
Noise Bypass Pin Voltage . . . . . . . . . . . . . . . . 0.3 V to +5 V
Power Dissipation . . . . . . . . . . . . . . . . . . . Internally Limited
Operating Ambient Temperature Range . . . . 20
C to +85
C
Operating Junction Temperature Range . . . 20
C to +125
C
JA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
C/W
JC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
C/W
Storage Temperature Range . . . . . . . . . . . . 65
C to +150
C
Lead Temperature Range (Soldering 10 sec) . . . . . . . +300
C
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . +215
C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . +220
C
*This is a stress rating only; operation beyond these limits can cause the device to
be permanently damaged.
ORDERING GUIDE
Output
Package
Model
Voltage
Option*
ADP3303AR-2.7
2.7 V
SO-8
ADP3303AR-3
3.0 V
SO-8
ADP3303AR-3.2
3.2 V
SO-8
ADP3303AR-3.3
3.3 V
SO-8
ADP3303AR-5
5.0 V
SO-8
Contact the factory for the availability of other output voltage options.
*SO = Small Outline.
Other Members of anyCAP Family
1
Output
Package
Model
Current
Options
2
Comments
ADP3300
50 mA
SOT-23-6
High Accuracy
ADP3301
100 mA
SO-8
High Accuracy
ADP3302
100 mA
SO-8
Dual Output
ADP3307
100 mA
SOT-23-6
Small Size
ADP3308
50 mA
SOT-23-5
Improved LP2980
ADP3309
100 mA
SOT-23-5
Improved MIC5205
NOTES
1
See individual data sheets for detailed ordering information.
2
SO = Small Outline, SOT = Surface Mount.
WARNING!
ESD SENSITIVE DEVICE
ADP3303
4
REV. A
Typical Performance Characteristics
INPUT VOLTAGE Volts
OUTPUT VOLTAGE Volts
3.3005
3.2985
3.2970
3.3 4
16
5
6
7
8
9 10 11 12 13 14 15
3.3000
3.2995
3.2980
3.2975
3.2990
V
OUT
= 3.3V
I
L
= 0mA
I
L
= 10mA
I
L
= 200mA
I
L
= 100mA
Figure 2. Line Regulation: Output
Voltage vs. Supply Voltage
OUTPUT LOAD mA
GROUND CURRENT
A
1600
800
200
0
20
200
40
60
80 100 120 140 160 180
1400
1200
600
400
1000
I
L
= 0 TO 200mA
Figure 5. Quiescent Current vs. Load
Current
OUTPUT LOAD mA
0
20
200
40
60
80 100 120 140 160 180
180
160
0
80
60
40
20
140
100
120
INPUT-OUTPUT VOLTAGE mV
Figure 8. Dropout Voltage vs. Output
Current
OUTPUT LOAD mA
OUTPUT VOLTAGE Volts
3.2005
3.1990
3.1975
0
20
200
40
60
80 100 120 140 160 180
3.2000
3.1995
3.1985
3.1980
V
IN
= 7V
V
OUT
= 3.2V
Figure 3. Output Voltage vs. Load
Current
TEMPERATURE C
OUTPUT VOLTAGE %
0.2
0.4
45 25
135
5
15
35
75
95
115
55
0.1
0.0
0.1
0.2
0.3
I
L
= 0mA
Figure 6. Output Voltage Variation
% vs. Temperature
INPUT VOLTAGE Volts
5
0
0
3
0
4
3
2
4
2
1
3
2
1
1
INPUT-OUTPUT VOLTAGE Volts
R
L
= 16.5
V
OUT
= 3.3V
Figure 9. Power-Up/Power-Down
INPUT VOLTAGE Volts
1.0
0.8
0
0
2
4
6
8
12
14
16
10
0.6
0.4
0.2
V
OUT
= 3.3V
I
L
= 0mA
GROUND CURRENT
A
Figure 4. Quiescent Current vs.
Supply Voltage
TEMPERATURE C
GROUND CURRENT
A
2500
2000
0
25
5
135
15
35
55
75
95
115
1500
1000
500
V
IN
= 7V
I
L
= 200mA
I
L
= 0mA
Figure 7. Quiescent Current vs.
Temperature
TIME s
0
0
100
200
2.0
V
SD
= V
IN
OR 3V
C
L
= 0.47 F
R
L
= 16.5
V
OUT
= 3.3V
1.0
3.0
4.0
5.0
6.0
7.0
8.0
20
INPUT-OUTPUT VOLTAGE Volts
40
60
80
120 140 160 180
V
IN
V
OUT
Figure 10. Power-Up Transient
ADP3303
5
REV. A
TIME s
5.02
4.99
0
20
200
40
60
80 100 120 140 160 180
5.01
5.00
7.0
4.98
7.5
Volts
25 , 0.47 F LOAD
V
IN
V
OUT
= 5V
Figure 11. Line Transient Response
TIME s
Volts
3.310
3.305
0
200
1000
400
600
800
3.290
200
10
3.300
3.295
mA
V
OUT
= 3.3V
I(V
OUT
)
V
OUT
C
L
= 10 F
Figure 14. Load Transient for
10 mA to 200 mA Pulse
TIME s
Volts
4
1
0
25
5
10
15
20
3
2
0
0
5
V
OUT
V
SD
C = 0.47 F
R = 16.5 ON 3.3V OUTPUT
Figure 17. Turn Off
TIME s
5.02
4.99
0
40
400
80 120 160 200 240 280 320 360
5.01
5.00
7.0
4.98
7.5
Volts
5k , 0.47 F LOAD
V
IN
V
OUT
= 5V
Figure 12. Line Transient Response
Volts
TIME sec
3.5
0
0
5
1
2
3
4
0
300
100
400
200
3.3V
mA
V
OUT
I
OUT
V
IN
= 7V
Figure 15. Short Circuit Current
FREQUENCY Hz
RIPPLE REJECTION dB
0
100
10
100
10M
1k
10k
100k
1M
10
60
70
80
90
20
30
50
40
a. 0.47 F, R
L
= 33k
b. 0.47 F, R
L
= 16.5
c. 10 F, R
L
= 33k
d. 10 F, R
L
= 16.5
b d
a c
b
d
a
c
V
OUT
= 3.3V
Figure 18. Power Supply Ripple
Rejection
TIME s
Volts
3.310
3.305
0
200
1000
400
600
800
3.290
200
10
3.300
3.295
mA
V
OUT
= 3.3V
I(V
OUT
)
V
OUT
C
L
= 0.47 F
Figure 13. Load Transient for 10 mA
to 200 mA Pulse
TIME s
Volts
4
0
40
200
80
120
160
1
0
5
0
3
2
3
C
L
= 0.47 F, R
L
= 3.3k
C
L
= 10 F, R
L
= 3.3k
C
L
= 10 F, R
L
= 16.5
3.3V
V
OUT
SD
V
IN
= 7V
Figure 16. Turn On
FREQUENCY Hz
VOLTAGE NOISE SPECTRAL DENSITY
V/ Hz
10
1
0.01
100
1k
100k
10k
0.1
0.47 F BYPASS
PIN 7, 8 TO PIN 3
VOUT = 3.3V, C
L
= 0.47 F,
I
L
= 1mA, C
NR
= 0
VOUT = 5V, C
L
= 0.47 F,
I
L
= 1mA, C
NR
= 0
VOUT = 2.7-5.0V, C
L
= 10 F,
I
L
= 1mA, C
NR
= 10nF
Figure 19. Output Noise Density
ADP3303
6
REV. A
THEORY OF OPERATION
The new anyCAP LDO ADP3303 uses a single control loop for
regulation and reference functions. The output voltage is sensed
by a resistive voltage divider consisting of R1 and R2, which is
varied to provide the available output voltage options. Feedback
is taken from this network by way of a series diode (D1) and a
second resistor divider (R3 and R4) to the input of an amplifier.
g
m
PTAT
V
OS
R4
R3
D1
R1
ATTENUATION
(V
BANDGAP
/V
OUT
)
R2
(a)
COMPENSATION
CAPACITOR
NONINVERTING
WIDEBAND
DRIVER
Q1
IN
C
LOAD
OUT
ADP3303
R
LOAD
PTAT
CURRENT
GND
Figure 20. Functional Block Diagram
A very high gain error amplifier is used to control this loop. The
amplifier is constructed in such a way that at equilibrium it
produces a large, temperature proportional input "offset voltage"
that is repeatable and very well controlled. The temperature-
proportional offset voltage is combined with the complementary
diode voltage to form a "virtual bandgap" voltage, implicit in
the network, although it never appears explicitly in the circuit.
Ultimately, this patented design makes it possible to control the
loop with only one amplifier. This technique also improves the
noise characteristics of the amplifier by providing more flexibil-
ity on the tradeoff of noise sources that leads to a low noise
design.
The R1, R2 divider is chosen in the same ratio as the bandgap
voltage to the output voltage. Although the R1, R2 resistor
divider is loaded by the diode D1, and a second divider consist-
ing of R3 and R4, the values are chosen to produce a tempera-
ture stable output. This unique arrangement specifically corrects
for the loading of the divider so that the error resulting from
base current loading in conventional circuits is avoided.
The patented amplifier controls a new and unique noninverting
driver that drives the pass transistor, Q1. The use of this special
noninverting driver enables the frequency compensation to
include the load capacitor in a pole splitting arrangement to
achieve reduced sensitivity to the value, type and ESR of the
load capacitance.
Most LDOs place strict requirements on the range of ESR val-
ues for the output capacitor because they are difficult to sta-
bilize due to the uncertainty of load capacitance and resistance.
Moreover, the ESR value, required to keep conventional LDOs
stable, changes depending on load and temperature. These ESR
limitations make designing with LDOs more difficult because
of their unclear specifications and extreme variations over
temperature.
This is no longer true with the ADP3303 anyCAP LDO. It can
be used with virtually any capacitor, with no constraint on the
minimum ESR. The innovative design allows the circuit to be
stable with just a small 0.47
F capacitor on the output. Addi-
tional advantages of the pole splitting scheme include superior line
noise rejection and very high regulator gain, which leads to excel-
lent line and load regulation. An impressive
1.4% accuracy is
guaranteed over line, load and temperature.
Additional features of the circuit include current limit, thermal
shutdown and noise reduction. Compared to standard solutions
that give warning after the output has lost regulation, the
ADP3303 provides improved system performance by enabling the
ERR Pin to give warning before the device loses regulation.
As the chip's temperature rises above 165
C, the circuit acti-
vates a soft thermal shutdown, indicated by a signal low on the
ERR Pin, to reduce the current to a safe level.
To reduce the noise gain of the loop, the node of the main di-
vider network (a) is made available at the noise reduction (NR)
pin, which can be bypassed with a small capacitor (10 nF100 nF).
APPLICATION INFORMATION
Capacitor Selection
Output Capacitors: as with any micropower device, output
transient response is a function of the output capacitance. The
ADP3303 is stable with a wide range of capacitor values, types
and ESR. A capacitor as low as 0.47
F is all that is needed for
stability; larger capacitors can be used if high output current
surges are anticipated. The ADP3303 is stable with extremely
low ESR capacitors (ESR
0), such as Multilayer Ceramic
Capacitors (MLCC) or OSCON.
Input Bypass Capacitor: an input bypass capacitor is not
required; for applications where the input source is high imped-
ance or far from the input pins, a bypass capacitor is recom-
mended. Connecting a 0.47
F capacitor from the input pins to
ground reduces the circuit's sensitivity to PC board layout. If a
larger value output capacitor is used, then a larger value input
capacitor is also recommended.
Noise Reduction
A noise reduction capacitor (C
NR
) can be used to further reduce
the noise by 6 dB10 dB (Figure 21). Low leakage capacitors in
the 10 nF100 nF range provide the best performance. Since
the noise reduction pin (NR) is internally connected to a high
impedance node, any connection to this node should be carefully
done to avoid noise pickup from external sources. The pad
connected to this pin should be as small as possible. Long PC
board traces are not recommended.
IN
OUT
ERR
GND
ADP3303-5.0
NR
+
6
7
8
1
2
3
4
5
ON
OFF
+
SD
C
NR
10nF
C2
10 F
R1
330k
E
OUT
C1
1 F
V
OUT
= 5V
V
IN
SD
Figure 21. Noise Reduction Circuit
ADP3303
7
REV. A
Thermal Overload Protection
The ADP3303 is protected against damage due to excessive
power dissipation by its thermal overload protection circuit,
which limits the die temperature to a maximum of 165
C.
Under extreme conditions (i.e., high ambient temperature and
power dissipation), where die temperature starts to rise above
165
C, the output current is reduced until the die temperature
has dropped to a safe level. The output current is restored when
the die temperature is reduced.
Current and thermal limit protections are intended to protect
the device against accidental overload conditions. For normal
operation, device power dissipation should be externally limited
so that junction temperatures will not exceed 125
C.
Calculating Junction Temperature
Device power dissipation is calculated as follows:
P
D
= (V
IN
V
OUT
) I
LOAD
+ (V
IN
) I
GND
Where I
LOAD
and I
GND
are load current and ground current, V
IN
and V
OUT
are input and output voltages, respectively.
Assuming I
LOAD
= 200 mA, I
GND
= 2 mA, V
IN
= 7 V and
V
OUT
= 5.0 V, device power dissipation is:
P
D
= (7 V 5 V ) 200 mA + (7 V ) 2 mA = 414 mW
The proprietary package used in ADP3303 has a thermal
resistance of 96
C/W, significantly lower than a standard 8-lead
SOIC package at 170
C/W.
Junction temperature above ambient temperature will be ap-
proximately equal to:
0.414 W
96
C/W = 39.7
C
To limit the maximum junction temperature to 125
C, maxi-
mum ambient temperature must be lower than:
T
AMAX
= 125
C 40
C = 85
C
Printed Circuit Board Layout Consideration
All surface mount packages rely on the traces of the PC board to
conduct heat away from the package.
In standard packages, the dominant component of the heat
resistance path is the plastic between the die attach pad and the
individual leads. In typical thermally enhanced packages, one or
more of the leads are fused to the die attach pad, significantly
decreasing this component. To make the improvement mean-
ingful, however, a significant copper area on the PCB must be
attached to these fused pins.
The patented thermal coastline lead frame design of the
ADP3303 (Figure 22) uniformly minimizes the value of the
dominant portion of the thermal resistance. It ensures that heat
is conducted away by all pins of the package. This yields a very
low, 96
C/W, thermal resistance for an SO-8 package, without
any special board layout requirements, relying on the normal
traces connected to the leads. The thermal resistance can be
decreased by approximately an additional 10% by attaching a
few square cm of copper area to the IN pin of the ADP3303.
It is not recommended to use solder mask or silkscreen on the
PCB traces adjacent to the ADP3303's pins since it will increase
the junction to ambient thermal resistance of the package.
COPPER PADDLE
1
2
3
4
8
7
6
5
COPPER
LEAD-FRAME
Figure 22. Thermal Coastline
Error Flag Dropout Detector
The ADP3303 will maintain its output voltage over a wide
range of load, input voltage and temperature conditions. If, for
example, the output is about to lose regulation by reducing the
supply voltage below the combined regulated output and drop-
out voltages, the ERR flag will be activated. The ERR output is
an open collector, which will be driven low.
Once set, the ERR flag's hysteresis will keep the output low
until a small margin of operating range is restored either by
raising the supply voltage or reducing the load.
Shutdown Mode
Applying a TTL high signal to the shutdown (SD) pin, or tying
it to the input pin, will turn the output ON. Pulling SD down to
0.3 V or below, or tying it to ground, will turn the output OFF.
In shutdown mode, quiescent current is reduced to much less
than 1
A.
APPLICATION CIRCUITS
Crossover Switch
The circuit in Figure 23 shows that two ADP3303s can be used
to form a mixed supply voltage system. The output switches
between two different levels selected by an external digital input.
Output voltages can be any combination of voltages from the
Ordering Guide.
ADP3303
8
REV. A
C2984a112/98
PRINTED IN U.S.A.
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Lead Small Outline IC
(SO-8)
0.1968 (5.00)
0.1890 (4.80)
8
5
4
1
0.2440 (6.20)
0.2284 (5.80)
PIN 1
0.1574 (4.00)
0.1497 (3.80)
0.0688 (1.75)
0.0532 (1.35)
SEATING
PLANE
0.0098 (0.25)
0.0040 (0.10)
0.0192 (0.49)
0.0138 (0.35)
0.0500
(1.27)
BSC
0.0098 (0.25)
0.0075 (0.19)
0.0500 (1.27)
0.0160 (0.41)
8
0
0.0196 (0.50)
0.0099 (0.25)
x 45
ADP3303-5.0
OUT
IN
GND
OUTPUT SELECT
5V
0V
C1
1.0 F
ADP3303-3.3
OUT
IN
GND
C2
0.47 F
V
OUT
= 5V/3.3V
V
IN
= 5.5V TO 12V
SD
SD
Figure 23. Crossover Switch
Higher Output Current
The ADP3303 can source up to 200 mA without any heatsink
or pass transistor. If higher current is needed, an appropriate
pass transistor can be used, as in Figure 24, to increase the
output current to 1 A.
V
IN
= 6V TO 8V
V
OUT
= 5V @ 1A
MJE253*
C2
10 F
C1
47 F
R1
50
*AAVID531002 HEATSINK IS USED
IN
OUT
ERR
GND
SD
ADP3303-5
Figure 24. High Output Current Linear Regulator
Constant Dropout Post Regulator
The circuit in Figure 25 provides high precision with low drop-
out for any regulated output voltage. It significantly reduces the
ripple from a switching regulator while providing a constant
dropout voltage, which limits the power dissipation of the LDO
to 60 mW. The ADP3000 used in this circuit is a switching
regulator in the step-up configuration.
D1
1N5817
C2
100 F
10V
L1
6.8 H
R1
120
ADP3303-3.3
IN
SD
OUT
GND
C3
2.2 F
3.3V @ 160mA
C1
100 F
10V
ADP3000-ADJ
I
LIM
V
IN
SW1
GND
SW2
FB
V
IN
= 2.5V TO 3.5V
R2
30.1k
1%
Q1
2N3906
Q2
2N3906
R4
274k
R3
124k
1%
Figure 25. Constant Dropout Post Regulator
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