PIN CONFIGURATIONS
8-Lead Narrow Body SO
(R Suffix)
1
2
3
4
8
7
6
5
TOP VIEW
(Not to Scale)
ADR293
V
OUT
V
IN
GND
NC
NC
NC
NC
NC
NC = NO CONNECT
8-Lead TSSOP
(RU Suffix)
1
2
3
4
8
7
6
5
TOP VIEW
(Not to Scale)
ADR293
V
OUT
V
IN
GND
NC
NC
NC
NC
NC
NC = NO CONNECT
3-Lead TO-92
(T9 Suffix)
PIN 1
V
IN
PIN 2
GND
PIN 3
V
OUT
BOTTOM VIEW
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
Low Noise Micropower
Precision Voltage Reference
ADR293
FEATURES
Voltage Output 5.0 V
6.0 V to 15 V Supply Range
Supply Current 15 A Max
Initial Accuracy 3 mV Max
Temperature Coefficient 8 ppm/ C Max
Low Noise 15 V pp Typ (0.1 Hz to 10 Hz)
High Output Current 5 mA Min
Temperature Range 40 C to 125 C
REF02/REF19x Pinout
APPLICATIONS
Portable Instrumentation
Precision Reference for 5 V Systems
A/D and D/A Converter Reference
Solar Powered Applications
Loop-Current Powered Instruments
GENERAL DESCRIPTION
The ADR293 is a low noise, micropower precision voltage
reference that utilizes an XFET
TM
(eXtra implanted junction
FET)
reference circuit. The new XFET architecture offers sig-
nificant performance improvements over traditional bandgap
and Zener-based references. Improvements include: one quarter
the voltage noise output of bandgap references operating at the
same current, very low and ultralinear temperature drift, low
thermal hysteresis and excellent long-term stability.
The ADR293 is a series voltage reference providing stable and
accurate output voltage from a 6.0 V supply. Quiescent current
is only 15
A max, making this device ideal for battery powered
instrumentation. Three electrical grades are available offering
initial output accuracy of
3 mV,
6 mV, and
10 mV. Tem-
perature coefficients for the three grades are 8 ppm/
C, 15 ppm/
C
and 25 ppm/
C max. Line regulation and load regulation are typi-
cally 30 ppm/V and 30 ppm/mA, maintaining the reference's over-
all high performance.
The ADR293 is specified over the extended industrial tempera-
ture range of 40
C to +125
C. This device is available in the
8-lead SOIC, 8-lead TSSOP and the TO-92 package.
XFET is a trademark of Analog Devices, Inc.
Part Number
Nominal Output Voltage (V)
ADR290
2.048
ADR291
2.500
ADR292
4.096
ADR293
5.000
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
Analog Devices, Inc., 1998
ADR293SPECIFICATIONS
ELECTRICAL SPECIFICATIONS
Parameter
Symbol
Conditions
Min
Typ
Max
Units
INITIAL ACCURACY
"E" Grade
V
O
I
OUT
= 0 mA
4.997
5.000 5.003
V
"F" Grade
4.994
5.006
V
"G" Grade
4.990
5.010
V
LINE REGULATION
"E/F" Grades
V
O
/
V
IN
6.0 V to 15 V, I
OUT
= 0 mA
30
100
ppm/V
"G" Grade
40
150
ppm/V
LOAD REGULATION
"E/F" Grades
V
O
/
I
LOAD
V
S
= 6.0 V, 0 mA to 5 mA
30
100
ppm/mA
"G" Grade
40
150
ppm/mA
LONG TERM STABILITY
V
O
1000 hrs @ +25
C, V
S
= +15 V
0.2
ppm
NOISE VOLTAGE
e
N
0.1 Hz to 10 Hz
15
V p-p
WIDEBAND NOISE DENSITY
e
N
at 1 kHz
640
nV/
Hz
ELECTRICAL SPECIFICATIONS
Parameter
Symbol
Conditions
Min
Typ
Max
Units
TEMPERATURE COEFFICIENT
"E" Grade
TCV
O
/
C
I
OUT
= 0 mA
3
8
ppm/
C
"F" Grade
5
15
ppm/
C
"G" Grade
10
25
ppm/
C
LINE REGULATION
"E/F" Grades
V
O
/
V
IN
6.0 V to 15 V, I
OUT
= 0 mA
35
150
ppm/V
"G" Grade
50
200
ppm/V
LOAD REGULATION
"E/F" Grades
V
O
/
I
LOAD
V
S
= 6.0 V, 0 mA to 5 mA
20
150
ppm/mA
"G" Grade
30
200
ppm/mA
ELECTRICAL SPECIFICATIONS
Parameter
Symbol
Conditions
Min
Typ
Max
Units
TEMPERATURE COEFFICIENT
"E" Grade
TCV
O
/
C
I
OUT
= 0 mA
3
10
ppm/
C
"F" Grade
5
20
ppm/
C
"G" Grade
10
30
ppm/
C
LINE REGULATION
"E/F" Grades
V
O
/
V
IN
6.0 V to 15 V, I
OUT
= 0 mA
40
200
ppm/V
"G" Grade
70
250
ppm/V
LOAD REGULATION
"E/F" Grades
V
O
/
I
LOAD
V
S
= 6.0 V, 0 mA to 5 mA
20
200
ppm/mA
"G" Grade
30
300
ppm/mA
SUPPLY CURRENT
@ +25
C
11
15
A
15
20
A
THERMAL HYSTERESIS
TO-92
160
ppm
SO-8
72
ppm
TSSOP-8
157
ppm
Specifications subject to change without notice.
(V
S
= 6.0 V, T
A
= 25 C unless otherwise noted)
(V
S
= 6.0 V, T
A
= 40 C
T
A
125 C unless otherwise noted)
(V
S
= 6.0 V, T
A
= 25 C
T
A
85 C unless otherwise noted)
REV. 0
2
ADR293
REV. 0
3
WAFER TEST LIMITS
Parameter
Symbol
Conditions
Limits
Units
INITIAL ACCURACY
V
O
I
OUT
= 0 mA
4.990/5.010
V
LINE REGULATION
V
O
/
V
IN
6.0 V < V
IN
< 15 V, I
OUT
= 0 mA
150
ppm/V
LOAD REGULATION
V
O
/
I
LOAD
0 mA to 5 mA
150
ppm/mA
SUPPLY CURRENT
No load
15
A
NOTES
Electrical tests are performed as wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed
for standard product dice. Consult factory to negotiate specifications based on dice lot qualification through sample lot assembly and testing.
Specifications subject to change without notice.
DICE CHARACTERISTICS
Die Size 0.074 0.052 inch, 3848 sq. mils
(1.88 1.32 mm, 2.48 sq. mm)
Transistor Count: 52
(V
S
= 6.0 V, T
A
= 25 C unless otherwise noted)
V
IN
4
3
2
1
V
OUT(SENSE)
V
OUT(FORCE)
GND
ADR293
REV. 0
4
ABSOLUTE MAXIMUM RATINGS
1
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
18 V
Output Short-Circuit Duration . . . . . . . . . . . . . . . . . Indefinite
Storage Temperature Range
T9, R, RU Package . . . . . . . . . . . . . . . . .
65
C to 150
C
Operating Temperature Range . . . . . . . . . .
40
C to 125
C
Junction Temperature Range
T9, R, RU Package . . . . . . . . . . . . . . . . .
65
C to 125
C
Lead Temperature (Soldering, 60 sec) . . . . . . . . . . . .
300
C
NOTE
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the ADR293 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
Package Type
JA
1
JC
Units
8-Lead SOIC (R)
158
43
C/W
3-Lead TO-92 (T9)
162
120
C/W
8-Lead TSSOP (RU)
240
43
C/W
NOTE
1
JA
is specified for worst case conditions, i.e.,
JA
is specified for device in socket
for PDIP, and
JA
is specified for a device soldered in circuit board for SOIC
packages.
ORDERING GUIDE
Model
Temperature Range
Package Type
Package Options
ADR293ER, ADR293FR, ADR293GR
40
C to 125
C
8-Lead SOIC
R-8
ADR293ER-REEL, ADR293FR-REEL, ADR293GR-REEL
40
C to 125
C
8-Lead SOIC
R-8
ADR293ER-REEL7, ADR293FR-REEL7, ADR293GR-REEL7
40
C to 125
C
8-Lead SOIC
R-8
ADR293GT9
40
C to 125
C
3-Lead TO-92
T9
ADR293GT9-REEL
40
C to 125
C
3-Lead TO-92
T9
ADR293GRU-REEL
40
C to 125
C
8-Lead TSSOP
RU-8
ADR293GRU-REEL7
40
C to 125
C
8-Lead TSSOP
RU-8
ADR293GBC
25
C
DICE
ADR293
REV. 0
5
TEMPERATURE C
5.006
4.994
50
125
25
OUTPUT VOLTAGE V
0
25
50
75
100
5.004
5.002
5.000
4.998
4.996
V
S
= 6.0V
3 TYPICAL PARTS
Figure 1. V
OUT
vs. Temperature
INPUT VOLTAGE V
16
0
0
16
2
SUPPLY CURRENT
A
4
6
8
10
12
14
12
8
6
4
2
10
T
A
= +125 C
T
A
= +25 C
T
A
= 40 C
14
Figure 2. Supply Current vs. Input Voltage
TEMPERATURE C
16
14
6
50
125
25
SUPPLY CURRENT
A
0
25
50
75
100
12
10
8
V
S
= 6.0V
Figure 3. Supply Current vs. Temperature
TEMPERATURE C
100
80
0
50
125
25
LINE REGULATION ppm/V
0
25
50
75
100
60
40
20
V
S
= 6.0V TO 15V
I
OUT
= 0mA
Figure 4. Line Regulation vs. Temperature
TEMPERATURE C
100
80
0
50
125
25
LINE REGULATION ppm/V
0
25
50
75
100
60
40
20
V
S
= 6.0V TO 9.0V
I
OUT
= 0mA
Figure 5. Line Regulation vs. Temperature
LOAD CURRENT mA
0.7
0
0
5.0
0.5
DIFFERENTIAL VOLTAGE V
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
0.6
0.5
0.4
0.3
0.2
0.1
T
A
= +25 C
T
A
=
40 C
T
A
= +125 C
Figure 6. Minimum Input-Output Voltage Differential vs.
Load Current
Typical Performance Characteristics
ADR293
REV. 0
6
TEMPERATURE C
200
160
0
50
125
25
LOAD REGULATION ppm/mA
0
25
50
75
100
120
80
40
V
S
= 6.0V
I
OUT
= 1mA
I
OUT
= 5mA
Figure 7. Load Regulation vs. Temperature
SOURCING LOAD CURRENT mA
0
4
0
10
1
V
OUT
FROM NOMINAL mV
3
1
T
A
= +25 C
T
A
= +125 C
T
A
= 40 C
2
1
2
Figure 8.
V
OUT
from Nominal vs. Load Current
VOLTAGE NOISE DENSITY nV/ Hz
FREQUENCY Hz
1200
0
10
1000
100
200
1000
400
600
800
V
IN
= 15V
T
A
= 25 C
Figure 9. Voltage Noise Density
FREQUENCY Hz
120
60
0
10
1000
100
RIPPLE REJECTION dB
20
100
80
V
S
= 6.0V
40
Figure 10. Ripple Rejection vs. Frequency
40
30
20
10
0
FREQUENCY Hz
50
10
100
OUTPUT IMPEDANCE
1k
10k
V
S
= 6.0V
I
L
= 0mA
Figure 11. Output Impedance vs. Frequency
1s
10 V p-p
Figure 12. 0.1 Hz to 10 Hz Noise
ADR293
REV. 0
7
50 s
5V/DIV
2V/DIV
I
L
= 5mA
Figure 13. Turn-On Time
50 s
2V/DIV
5V/DIV
I
L
= 5mA
Figure 14. Turn-Off Time
I
L
= 5mA
1ms
Figure 15. Load Transient
1ms
I
L
= 5mA
C
L
= 1nF
Figure 16. Load Transient
I
L
= 5mA
C
L
= 100nF
1ms
Figure 17. Load Transient
ADR293
REV. 0
8
Device Power Dissipation Considerations
The ADR293 is guaranteed to deliver load currents to 5 mA
with an input voltage that ranges from 5.5 V to 15 V. When this
device is used in applications with large input voltages, care
should be exercised to avoid exceeding the published specifica-
tions for maximum power dissipation or junction temperature
that could result in premature device failure. The following
formula should be used to calculate a device's maximum junc-
tion temperature or dissipation:
P
T
T
D
A
A
=
-
J
J
In this equation, T
J
and T
A
are the junction and ambient tem-
peratures, respectively, P
D
is the device power dissipation, and
JA
is the device package thermal resistance.
Basic Voltage Reference Connections
References, in general, require a bypass capacitor connected
from the V
OUT
pin to the GND pin. The circuit in Figure 19
illustrates the basic configuration for the ADR293. Note that
the decoupling capacitors are not required for circuit stability.
ADR293
1
2
3
4
8
7
6
5
NC
NC
NC
NC
NC
OUTPUT
0.1 F
10 F
0.1 F
+
INPUT
NC = NO CONNECT
Figure 19. Basic Voltage Reference Configuration
Noise Performance
The noise generated by the ADR293 is typically less than
15
Vp-p over the 0.1 Hz to 10 Hz band. The noise measure-
ment is made with a bandpass filter made of a 2-pole high-pass
filter with a corner frequency at 0.1 Hz and a 2-pole low-pass
filter with a corner frequency at 10 Hz.
Turn-On Time
Upon application of power (cold start), the time required for the
output voltage to reach its final value within a specified error
band is defined as the turn-on settling time. Two components
normally associated with this are; the time for the active circuits
to settle, and the time for the thermal gradients on the chip to
stabilize. Figure 13 shows the typical turn-on time for the
ADR293.
THEORY OF OPERATION
The ADR293 uses a new reference generation technique known
as XFET,
which yields a reference with low noise, low supply
current and very low thermal hysteresis.
The core of the XFET reference consists of two junction field-
effect transistors one of which has an extra channel implant to
raise its pinch-off voltage. By running the two JFETS at the
same drain current, the difference in pinch-off voltage can be
amplified and used to form a highly stable voltage reference.
The intrinsic reference voltage is around 0.5 V with a negative
temperature coefficient of about 120 ppm/K. This slope is
essentially locked to the dielectric constant of silicon and can be
closely compensated by adding a correction term generated in
the same fashion as the proportional-to-temperature (PTAT)
term used to compensate bandgap references. The big advan-
tage over a bandgap reference is that the intrinsic temperature
coefficient is some thirty times lower (therefore less correction is
needed) and this results in much lower noise since most of the
noise of a bandgap reference comes from the temperature com-
pensation circuitry.
The simplified schematic below shows the basic topology of the
ADR293. The temperature correction term is provided by a
current source with value designed to be proportional to abso-
lute temperature. The general equation is:
V
V
R
R
R
R
I
R
OUT
P
PTAT
=
+
+
+
( )( )
1
2
3
1
3
where
V
P
is the difference in pinch-off voltage between the two
FETs and I
PTAT
is the positive temperature coefficient correction
current.
The process used for the XFET reference also features vertical
NPN and PNP transistors, the latter of which are used as output
devices to provide a very low drop-out voltage.
R1
R3
R2
R1
R3
I
1
I
1
I
PTAT
V
OUT
R1
R2
R3
V
P
*
EXTRA CHANNEL IMPLANT
*
V
OUT
V
P
I
PTAT
GND
V
IN
Figure 18. Simplified Schematic
ADR293
REV. 0
9
APPLICATIONS
A Negative Precision Reference without Precision Resistors
In many current-output CMOS DAC applications where the
output signal voltage must be of the same polarity as the refer-
ence voltage, it is often required to reconfigure a current-
switching DAC into a voltage-switching DAC through the use
of a 1.25 V reference, an op amp and a pair of resistors. Using
a current-switching DAC directly requires the need for an
additional operational amplifier at the output to reinvert the
signal. A negative voltage reference is then desirable from the
point that an additional operational amplifier is not required
for either reinversion (current-switching mode) or amplifica-
tion (voltage-switching mode) of the DAC output voltage. In
general, any positive voltage reference can be converted into a
negative voltage reference through the use of an operational
amplifier and a pair of matched resistors in an inverting configu-
ration. The disadvantage to that approach is that the largest single
source of error in the circuit is the relative matching of the resis-
tors used.
The circuit illustrated in Figure 20 avoids the need for tightly
matched resistors with the use of an active integrator circuit.
In this circuit, the output of the voltage reference provides the
input drive for the integrator. The integrator, to maintain circuit
equilibrium, adjusts its output to establish the proper relation-
ship between the reference's V
OUT
and GND. One caveat with
this approach should be mentioned: although rail-to-rail output
amplifiers work best in the application, these operational ampli-
fiers require a finite amount (mV) of headroom when required
to provide any load current. The choice for the circuit's negative
supply should take this issue into account.
ADR293
1 F
4
6
2
V
IN
GND
V
OUT
100k
1 F
V
REF
A
1
5V
+5V
100
1k
A
1
= 1/2 OP291,
1/2 OP295
Figure 20. A Negative Precision Voltage Reference Uses
No Precision Resistors
A Precision Current Source
Many times in low power applications, the need arises for a preci-
sion current source that can operate on low supply voltages. As
shown in Figure 21, the ADR293 is configured as a precision
current source. The circuit configuration illustrated is a floating
current source with a grounded load. The reference's output
voltage is bootstrapped across R
SET
, which sets the output current
into the load. With this configuration, circuit precision is main-
tained for load currents in the range from the reference's supply
current, typically 15
A to approximately 5 mA.
ADR293
4
6
2
V
IN
GND
V
OUT
R
L
1 F
I
OUT
P
1
R
1
R
SET
I
SY
ADJUST
Figure 21. A Precision Current Source
ADR293
REV. 0
10
Kelvin Connections
In many portable instrumentation applications where PC board
cost and area go hand-in-hand, circuit interconnects are very often
of dimensionally minimum width. These narrow lines can cause
large voltage drops if the voltage reference is required to provide
load currents to various functions. In fact, a circuit's interconnects
can exhibit a typical line resistance of 0.45 mW/square (1 oz. Cu,
for example). Force and sense connections also referred to as
Kelvin connections, offer a convenient method of eliminating the
effects of voltage drops in circuit wires. Load currents flowing
through wiring resistance produce an error (V
ERROR
= R I
L
) at
the load. However, the Kelvin connection of Figure 22 overcomes
the problem by including the wiring resistance within the forcing
loop of the op amp. Since the op amp senses the load voltage, op
amp loop control forces the output to compensate for the wiring
error and to produce the correct voltage at the load.
ADR293
4
6
2
V
IN
GND
V
OUT
100k
R
LW
1 F
A
1
+V
OUT
SENSE
+V
OUT
FORCE
R
LW
V
IN
R
L
A
1
= 1/2 OP295
Figure 22. Advantage of Kelvin Connection
Voltage Regulator For Portable Equipment
The ADR293 is ideal for providing a stable, low cost and low
power reference voltage in portable equipment power supplies.
Figure 23 shows how the ADR293 can be used in a voltage
regulator that not only has low output noise (as compared to
switch mode design) and low power, but also a very fast recovery
after current surges. Some precautions should be taken in the
selection of the output capacitors. Too high an ESR (effective
series resistance) could endanger the stability of the circuit. A
solid tantalum capacitor, 16 V or higher, and an aluminum elec-
trolytic capacitor, 10 V or higher, are recommended for C1 and
C2, respectively. Also, the path from the ground side of C1 and
C2 to the ground side of R1 should be kept as short as possible.
2
3
6
7
2
4
4
V
IN
GND
ADR293
R1
402k
1%
R2
402k
1%
OP-20
+
+
C1
68 F
TANT
C2
1000 F
ELECT
+5V, 100mA
IRF9530
R3
510k
CHARGER
INPUT
+
LEAD-ACID
BATTERY
6V
V
OUT
6
0.1 F
Figure 23. Voltage Regulator for Portable Equipment
ADR293
REV. 0
11
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Lead Narrow Body SO
(R-8)
8
5
4
1
0.1968 (5.00)
0.1890 (4.80)
0.1574 (4.00)
0.1497 (3.80)
0.2440 (6.20)
0.2284 (5.80)
PIN 1
SEATING
PLANE
0.0098 (0.25)
0.0040 (0.10)
0.0192 (0.49)
0.0138 (0.35)
0.102 (2.59)
0.094 (2.39)
0.0500
(1.27)
BSC
0.0098 (0.25)
0.0075 (0.19)
0.0500 (1.27)
0.0160 (0.41)
8
0
0.0196 (0.50)
0.0099 (0.25)
x 45
8-Lead TSSOP
(RU-8)
8
5
4
1
0.122 (3.10)
0.114 (2.90)
0.256 (6.50)
0.246 (6.25)
0.177 (4.50)
0.169 (4.30)
PIN 1
0.0256 (0.65)
BSC
SEATING
PLANE
0.006 (0.15)
0.002 (0.05)
0.0118 (0.30)
0.0075 (0.19)
0.0433
(1.10)
MAX
0.0079 (0.20)
0.0035 (0.090)
0.028 (0.70)
0.020 (0.50)
8
0
3-Lead TO-92
(T9 Suffix)
0.105 (2.66)
0.080 (2.42)
0.105 (2.66)
0.080 (2.42)
0.165 (4.19)
0.125 (3.94)
SQUARE
0.019 (0.482)
0.016 (0.407)
0.105 (2.66)
0.095 (2.42)
0.055 (1.39)
0.045 (1.15)
SEATING
PLANE
0.500
(12.70)
MIN
0.205 (5.20)
0.175 (4.96)
0.210 (5.33)
0.170 (4.38)
1
2
3
BOTTOM VIEW
0.135
(3.43)
MIN
0.050
(1.27)
MAX
C334786/98
PRINTED IN U.S.A.
PDF 
ZIP