OP183/OP283
REV. B
GENERAL DESCRIPTION
The OP183 is a single-supply, 5 MHz bandwidth amplifier with
slew rates of 10 V/
s. The OP283 is a dual version. Both can
operate from voltages as low as 3 volts and up to 36 volts. This
combination of slew rate and bandwidth yields excellent single-
supply ac performance making them ideally suited for telecom and
multimedia audio applications.
In addition to its ac characteristics, the OP183 family provides
good dc performance with guaranteed 1 mV offset. Noise is a
respectable 10 nV/
Hz. Supply current is only 1.2 mA per amplifier.
These amplifiers are well suited for single-supply applications that
require moderate bandwidths even when used in high gain configu-
rations. This makes them useful in filters and instrumentation.
Their output drive capability and very wide full power bandwidth
make them a good choice for multimedia headphone drivers or
microphone input amplifiers.
The OP183 and OP283 are available in 8-pin plastic DIP and SO-8
surface mount packages. They are specified over the extended
industrial (40
C to +85
C) temperature range.
One Technology Way, P.O. Box 9106, Norwood. MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
a
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
5 MHz Single-Supply
Operational Amplifiers
PIN CONNECTIONS
FEATURES
Single-Supply +3 Volts to +36 Volts
Wide Bandwidth 5 MHz
Low Offset Voltage <1 mV
High Slew Rate 10 V/ s
Low Noise 10 nV/
Hz
Unity-Gain Stable
Input and Output Range Includes GND
No Phase Reversal
APPLICATIONS
Multimedia
Telecom
ADC Buffers
Wide Band Filters
Microphone Preamplifiers
8-Lead Narrow-Body SO
(S Suffix)
8-Lead Epoxy DIP
(P Suffix)
1
2
3
4
8
7
6
5
TOP VIEW
(Not to Scale)
OP183
NULL
IN
+IN
V
NC = NO CONNECT
NC
V+
OUT
NULL
1
2
3
4
8
7
6
5
OP183
8-Lead Narrow-Body SO
(S Suffix)
8-Lead Epoxy DIP
(P Suffix)
1
2
3
4
8
7
6
5
TOP VIEW
(Not to Scale)
OP283
OUTA
INA
+INA
V
V+
OUTB
INB
+INB
1
2
3
4
8
7
6
5
OP283
REV. B
ELECTRICAL CHARACTERISTICS
(@ V
S
= +5.0 V, T
A
= +25 C unless otherwise noted)
OP183/OP283SPECIFICATIONS
Parameter
Symbol
Conditions
Min
Typ
Max
Units
INPUT CHARACTERISTICS
Offset Voltage
V
OS
V
CM
= 2.5 V, V
OUT
= 2.5 V,
0.025
1.0
mV
40
C
T
A
+85
C
1.25
mV
Input Bias Current
I
B
V
CM
= 2.5 V, V
OUT
= 2.5 V,
350
600
nA
40
C
T
A
+85
C
430
750
nA
Input Offset Current
I
OS
V
CM
= 2.5 V, V
OUT
= 2.5 V,
nA
40
C
T
A
+85
C
11
50
nA
Input Voltage Range
0
+3.5
V
Common-Mode Rejection Ratio
CMRR
V
CM
= 0 to 3.5 V
40
C
T
A
+85
C
70
104
dB
Large Signal Voltage Gain
A
VO
R
L
= 2 k
, 0.2
V
O
3.8 V
100
V/mV
Offset Voltage Drift
V
OS
/
T
4
V/
C
Bias Current Drift
I
B
/
T
1.6
nA/
C
OUTPUT CHARACTERISTICS
Output Voltage High
V
OH
R
L
= 2 k
to GND
+4.0
4.22
V
Output Voltage Low
V
OL
R
L
= 2 k
to GND
50
75
mV
Short Circuit Limit
I
SC
Source
25
mA
Sink
30
mA
POWER SUPPLY
Power Supply Rejection Ratio
PSRR
V
S
= +4 V to +6 V,
40
C
T
A
+85
C
70
104
dB
Supply Current/Amplifier
I
SY
V
O
= 2.5 V,
40
C
T
A
+85
C
1.2
1.5
mA
Supply Voltage Range
V
S
+3
18
V
DYNAMIC PERFORMANCE
Slew Rate
SR
R
L
= 2 k
5
10
V/
s
Full-Power Bandwidth
BWp
1% Distortion
>50
kHz
Settling Time
t
S
To 0.01%
1.5
s
Gain Bandwidth Product
GBP
5
MHz
Phase Margin
m
46
Degrees
NOISE PERFORMANCE
Voltage Noise
e
n
p-p
0.1 Hz to 10 Hz
2
V p-p
Voltage Noise Density
e
n
f = 1 kHz, V
CM
= 2.5 V
10
nV/
Hz
Current Noise Density
i
n
0.4
pA/
Hz
2
(@ V
S
= +3.0 V, T
A
= +25 C unless otherwise noted)
ELECTRICAL CHARACTERISTICS
Parameter
Symbol
Conditions
Min
Typ
Max
Units
INPUT CHARACTERISTICS
Offset Voltage
V
OS
V
CM
= 1.5 V, V
OUT
= 1.5 V,
0.3
1.0
mV
40
C
T
A
+85
C
1.25
mV
Input Bias Current
I
B
V
CM
= 1.5 V, V
OUT
= 1.5 V,
350
600
nA
40
C
T
A
+85
C
750
nA
Input Offset Current
I
OS
V
CM
= 1.5 V, V
OUT
= 1.5 V,
nA
40
C
T
A
+85
C
11
50
nA
Input Voltage Range
0
+1.5
V
Common-Mode Rejection Ratio
CMRR
V
CM
= 0 V to 1.5 V,
40
C
T
A
+85
C
70
103
dB
Large Signal Voltage Gain
A
VO
R
L
= 2 k
, 0.2
V
O
1.8 V
100
260
V/mV
OUTPUT CHARACTERISTICS
Output Voltage High
V
OH
R
L
= 2 k
to GND
+2.0
2.25
V
Output Voltage Low
V
OL
R
L
= 2 k
to GND
90
125
mV
Short Circuit Limit
I
SC
Source
25
mA
Sink
30
mA
POWER SUPPLY
Power Supply Rejection Ratio
PSRR
V
S
= +2.5 V to +3.5 V,
40
C
T
A
+85
C
60
113
dB
Supply Current/Amplifier
I
SY
40
C
T
A
+85
C, V
O
= 1.5 V
1.2
1.5
mA
DYNAMIC PERFORMANCE
Gain Bandwidth Product
GBP
5
MHz
NOISE PERFORMANCE
Voltage Noise Density
e
n
f = 1 kHz, V
CM
= 1.5 V
10
nV/
Hz
REV.B
ELECTRICAL CHARACTERISTICS
Parameter
Symbol
Conditions
Min
Typ
Max
Units
INPUT CHARACTERISTICS
Offset Voltage
V
OS
0.01
1.0
mV
40
C
T
A
+85
C
1.25
mV
Input Bias Current
I
B
300
600
nA
40
C
T
A
+85
C
400
750
nA
Input Offset Current
I
OS
40
T
A
+85
C
11
50
nA
Input Voltage Range
15
+13.5
V
Common-Mode Rejection Ratio
CMRR
V
CM
= 15 V to +13.5 V,
40
C
T
A
+85
C
70
86
dB
Large Signal Voltage Gain
A
VO
R
L
= 2 k
100
1000
V/mV
Offset Voltage Drift
V
OS
/
T
3
V/
C
Bias Current Drift
I
B
/
T
1.6
nA/
C
Long Term Offset Voltage
V
OS
Note 1
1.5
mV
OUTPUT CHARACTERISTICS
Output Voltage High
V
OH
R
L
= 2 k
to GND, 40
C
T
A
+85
C
+13.9 14.1
V
Output Voltage Low
V
OL
R
L
= 2 k
to GND, 40
C
T
A
+85
C
14.05
13.9
V
Short-Circuit Limit
I
SC
Source
30
mA
Sink
50
mA
Open -Loop Output Impedance
Z
OUT
f = 1 MHz, A
V
= +1
15
POWER SUPPLY
Power Supply Rejection Ratio
PSRR
V
S
=
2.5 V to
18 V,
40
C
T
A
+85
C
70
112
dB
Supply Current/Amplifier
I
SY
V
S
=
18 V, V
O
= 0 V,
40
C
T
A
+85
C
1.2
1.75
mA
Supply Voltage Range
V
S
+3
18
V
DYNAMIC PERFORMANCE
Slew Rate
SR
R
L
= 2 k
10
15
V/
s
Full-Power Bandwidth
BW
p
1% Distortion
50
kHz
Settling Time
t
S
To 0.01%
1.5
s
Gain Bandwidth Product
GBP
5
MHz
Phase Margin
m
56
degrees
NOISE PERFORMANCE
Voltage Noise
e
n p-p
0.1 Hz to 10 Hz
2
V p-p
Voltage Noise Density
e
n
f = 1 kHz
10
nV/
Hz
Current Noise Density
i
n
0.4
pA/
Hz
NOTES
1
Long term offset voltage is guaranteed by a 1000 hour life test performed on three independent lots at +125
C, with an LTPD of 1.3.
Specifications subject to change without notice.
(@ V
S
= 15.0 V, T
A
= +25 C unless otherwise noted)
WAFER TEST LIMITS
Parameter
Symbol
Conditions
Limit
Units
Offset Voltage
V
OS
V
S
=
15 V, V
O
= 0 V
1.0
mV max
Input Bias Current
I
B
V
CM
= 2.5 V
600
nA max
Input Offset Current
I
OS
V
CM
= 2.5 V
50
nA max
Common-Mode Rejection
CMRR
V
CM
= 0 V to 3.5 V
70
dB min
Power Supply Rejection Ratio
PSRR
V =
2.5 V to
18 V
70
dB min
Large Signal Voltage Gain
A
VO
R
L
= 2 k
, 0.2
V
O
3.8 V
100
V/mV min
Output Voltage High
V
OH
R
L
= 2 k
4.0
V min
Output Voltage Low
V
OL
R
L
= 2 k
75
mV max
Supply Current/Amplifier
I
SY
V
S
=
15 V, V
O
= 0 V, R
L
=
1.5
mA max
NOTE
Electrical tests and wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard
product dice. Consult factory to negotiate specifications based on dice lot qualifications through sample lot assembly and testing.
(@ V
S
= +5.0 V, T
A
= +25 C unless otherwise noted)
OP183/OP283
3
REV. B
ABSOLUTE MAXIMUM RATINGS
1
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
18 V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
18 V
Differential Input Voltage
2
. . . . . . . . . . . . . . . . . . . . . . . . . . .
7 V
Output Short-Circuit Duration to GND . . . . . . . . . . . . Indefinite
Storage Temperature Range
P, S Package . . . . . . . . . . . . . . . . . . . . . . . . . . 65
C to +150
C
Operating Temperature Range
OP183/OP283G . . . . . . . . . . . . . . . . . . . . . . . . 40
C to +85
C
Junction Temperature Range
P, S Package . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
C to +150
C
Lead Temperature Range (Soldering 60 Sec) . . . . . . . . . . +300
C
Package Type
JA
3
JC
Units
8-Pin Plastic DIP (P)
103
43
C/W
8-Pin SOIC (S)
158
43
C/W
NOTES
1
Absolute maximum ratings apply to both DICE and packaged parts, unless
otherwise noted.
2
For supply voltages less than
7 V, the absolute maximum input voltage is equal
to the supply voltage. Maximum input current should not exceed 2 mA.
3
JA
is specified for the worst case conditions, i.e.,
JA
is specified for device in socket
for P-DIP packages;
JA
is specified for device soldered in circuit board for SOIC
packages.
OP183/OP283
DICE CHARACTERISTICS
OP183 Die Size 0.058 X 0.063 Inch, 3,717 Sq. Mils
Substrate (Die Backside) Is Connected to V.
Transistor Count, 30.
V+
OUT
NULL
NULL
IN
IN+
V
OP283 Die Size 0.063 X 0.092 Inch, 5,796 Sq. Mils
Substrate (Die Backside) Is Connected to V.
Transistor Count, 55.
V+ OUTB
INB
OUTA
INA
V
+INB
+INA
ORDERING GUIDE
Temperature
Package
Package
Model
Range
Description
Option
OP183GP
40
C to +85
C
8-Pin Plastic DIP
N-8
OP183GS
40
C to +85
C
8-Pin SOIC
SO-8
OP283GP
40
C to +85
C
8-Pin Plastic DIP
N-8
OP283GS
40
C to +85
C
8-Pin SOIC
SO-8
4
REV.B
Typical CharacteristicsOP183/OP283
80
0
20
10
40
30
50
60
70
+600
+400
+200
0
200
400
600
INPUT OFFSET VOLTAGE V
QUANTITY
V
S
= +5V
300X
OP AMPS
Figure 1. OP183 Input Offset Voltage
Distribution @ +5 V
160
0
40
20
80
60
100
120
140
+600
+400
+200
0
200
400
600
INPUT OFFSET VOLTAGE V
QUANTITY
V
S
= 15V
590X
OP AMPS
Figure 4. OP283 Input Offset Voltage
Distribution @
15 V
200
0
16
60
20
2
40
0
120
80
100
140
160
180
14
8
10
4
6
12
TCV
OS
V/C
QUANTITY Amplifiers
40C
T
A
+85C
590X OP AMPS
PLASTIC PACKAGE
Figure 2. OP183 Input Offset Voltage
Distribution @
15 V
Figure 3. OP283 Input Offset Voltage
Distribution @ +5 V
160
0
40
20
80
60
100
120
140
+600
+400
+200
0
200
400
600
INPUT OFFSET VOLTAGE V
QUANTITY
V
S
= +5V
590X
OP AMPS
Figure 5. OP183 Input Offset Voltage
Drift (TCV
OS
) Distribution @ +5 V
Figure 6. OP183 Input Offset Voltage
Drift (TCV
OS
) Distribution @
15 V
TCV
OS
V/C
QUANTITY Amplifiers
160
0
12
40
20
2
0
80
60
100
120
140
10
8
6
4
40C
T
A
+85C
300X OP AMPS
PLASTIC PACKAGE
3
1
0
1k
10k
10M
1M
100k
2
FREQUENCY Hz
MAXIMUM OUTPUT SWING Volts
p-p
T
A
= +25C
R
L
= 2k
V
S
= +3V
80
0
20
10
40
30
50
60
70
+600
+400
+200
0
200
400
600
INPUT OFFSET VOLTAGE V
QUANTITY
V
S
= 15V
300X
OP AMPS
TCV
OS
V/C
QUANTITY Amplifiers
160
0
12
40
20
2
0
80
60
100
120
140
10
8
6
4
40C
T
A
+85C
300X OP AMPS
PLASTIC PACKAGE
200
0
16
60
20
2
40
0
120
80
100
140
160
180
14
8
10
4
6
12
TCV
OS
V/C
QUANTITY Amplifiers
40C
T
A
+85C
590X OP AMPS
PLASTIC PACKAGE
Figure 7. OP283 Input Offset Voltage
Drift (TCV
OS
) Distribution @ +5 V
Figure 8. OP283 Input Offset Voltage
Drift (TCV
OS
) Distribution @
15 V
Figure 9. OP183/OP283 Maximum
Output Swing vs. Frequency @ +3 V
5
REV. B
5
2
0
1k
10k
10M
1M
100k
1
3
4
FREQUENCY Hz
MAXIMUM OUTPUT SWING Volts
p-p
T
A
= +25C
R
L
= 2k
V
S
= +5V
Figure 12. Output Voltage vs. Sink
& Source Current
Figure 10. OP183/OP283 Maximum
Output Swing vs. Frequency @ +5 V
1k
10k
10M
1M
100k
30
15
0
10
5
20
25
FREQUENCY Hz
MAXIMUM OUTPUT SWING Volts
p-p
T
A
= +25C
R
L
= 2k
V
S
= 15V
1
10m
1m
1
10
10m
1m
100
100m
LOAD CURRENT Amps
OUTPUT VOLTAGE
TO RAIL Volts
SINK
SOURCE
600
0
13.5
300
100
10
200
15
500
400
10
5
0
5
T
A
= +25C
V
S
= 15V
COMMON-MODE VOLTAGE Volts
INPUT BIAS CURRENT nA
500
0
125
300
100
50
200
75
400
100
75
50
25
0
25
TEMPERATURE C
INPUT BIAS CURRENT nA
V
S
= 15V
&
V
S
= +5V
V
S
= +3V
1.50
0
125
0.75
0.25
50
0.50
75
1.25
1.00
100
75
50
25
0
25
TEMPERATURE C
SUPPLY CURRENT\AMPLIFIER mA
V
S
= 18V
R
L
=
V
S
= +3V
R
L
=
V
S
= +5V
R
L
=
1.50
0
20
0.75
0.25
2.5
0.50
0
1.25
1.00
17.5
15
12.5
10
7.5
5
SUPPLY VOLTAGE Volts
SUPPLY CURRENT\AMPLIFIER mA
T
A
= +25C
Figure 17. Short-Circuit Current vs.
Temperature @ +5 V
60
0
125
30
10
50
20
75
50
40
100
75
50
25
0
25
TEMPERATURE C
SHORT CIRCUIT CURRENT mA
I
SC
+I
SC
60
0
125
30
10
50
20
75
50
40
100
75
50
25
0
25
TEMPERATURE C
SHORT CIRCUIT CURRENT mA
I
SC
+I
SC
Figure 11. OP183/OP283 Maximum
Output Swing vs. Frequency @
15 V
Figure 15. Supply Current per
Amplifier vs. Temperature
Figure 14. Input Bias Current vs.
Temperature
Figure 13. Input Bias Current vs.
Common-Mode Voltage
Figure 16. Supply Current per
Amplifier vs. Supply Voltage
Figure 18. Short-Circuit Current vs.
Temperature @
15 V
6
OP183/OP283Typical Characteristics
REV.B
OP183/OP283
140
100
0
100
1k
1M
100k
10k
120
60
20
40
80
FREQUENCY Hz
COMMON-MODE REJECTION dB
T
A
= +25C
V
S
= 15V
Figure 21. Open-Loop Gain and Phase
vs. Frequency @ +3 V
Figure 19. Common-Mode Rejection
vs. Frequency
140
100
0
100
1k
1M
100k
10k
120
60
20
40
80
FREQUENCY Hz
POWER SUPPLY REJECTION dB
+PSRR
PSRR
T
A
= +25C
V
S
= 15V
Figure 20. Power Supply Rejection
vs. Frequency
90
40
10
1k
10k
10M
1M
100k
50
70
80
0
10
30
60
20
FREQUENCY Hz
GAIN dB
T
A
= +25C
V
S
= +5V
R
L
= 10k
GAIN
PHASE
PHASE
MARGIN
= 46
45
0
45
90
PHASE Degrees
135
Figure 22. Open-Loop Gain and Phase
vs. Frequency @ +5 V
1000
0
125
300
100
50
200
75
600
400
500
700
800
900
100
25
50
25
0
75
TEMPERATURE C
OPEN-LOOP GAIN V/mV
V
S
= +5V
R
L
= 2k
V
S
= 15V
OR
V
S
= +3V
R
L
= 2k
90
40
10
1k
10k
10M
1M
100k
50
70
80
0
10
30
60
20
FREQUENCY Hz
GAIN dB
T
A
= +25C
V
S
= 15V
R
L
= 10k
GAIN
PHASE
PHASE
MARGIN
= 56
45
0
45
90
PHASE Degrees
135
Figure 23. Open-Loop Gain and Phase
vs. Frequency @
15 V
50
30
20
1k
10k
10M
1M
100k
40
10
10
0
20
FREQUENCY Hz
CLOSED-LOOP GAIN dB
A
V
= +100
A
V
= +10
A
V
= +1
T
A
= +25C
V
S
= 15V
10
100
10k
30
15
0
10
5
20
25
1k
FREQUENCY Hz
VOLTAGE NOISE DENSITY nV/ Hz
T
A
= +25C
V
S
= 15V
OR
V
S
= +3V, +15V
25
0
125
15
5
50
10
75
20
100
75
50
25
0
25
TEMPERATURE C
SLEW RATE V/s
V
S
= 15V
R
L
= 2k
SLEW RATE
V
S
= 5V
R
L
= 2k
SLEW RATE
Figure 27. Voltage Noise Density
vs. Frequency
Figure 24. Open-Loop Gain vs.
Temperature
Figure 25. Closed-Loop Gain vs.
Frequency
Figure 26. Slew Rate vs. Temperature
90
40
10
1k
10k
10M
1M
100k
50
70
80
0
10
30
60
20
FREQUENCY Hz
GAIN dB
T
A
= +25C
V
S
= +3V
R
L
= 10k
GAIN
PHASE
PHASE
MARGIN
= 43
45
0
45
90
PHASE Degrees
135
7
REV. B
OP183/OP283Typical Characteristics
10
100
10k
1k
6.0
3.0
0
2.0
1.0
4.0
5.0
FREQUENCY Hz
CURRENT NOISE DENSITY pA/ Hz
T
A
= +25C
V
S
= 15V
OR
V
S
= +3\+5V
Figure 30. Small Signal Overshoot
vs. Load Capacitance
100
50
0
100
1k
1M
100k
10k
60
70
80
90
10
20
30
40
FREQUENCY Hz
IMPEDANCE
T
A
= +25C
V
S
= 15V
A
V
= +10
A
V
= +1
Figure 29. Closed-Loop Output
Impedance vs. Frequency
Figure 32. Small Signal Performance
@
15 V
Figure 31. Large Signal Performance
@
15 V
Figure 33. 0.1 Hz to 10 Hz Noise
@
2.5 V
600
1k
2k
5k
10
NO LOAD
FREQUENCY Hz
D
I
S
T
OR
T
I
ON
%
OP283
V
S
= 2.5V
A
V
= +1 RF = 0
V
IN
= 1V
RM S
80kHz LOW PASS FILTER
Figure 35. THD + Noise vs. Frequency for Various Loads
Figure 34. 0.1 Hz to 10 Hz Noise
@
15 V
80
0
300
20
10
100
0
40
30
50
60
70
200
CAPACITANCE pF
SMALL SIGNAL OVERSHOOT %
NEGATIVE
EDGE
POSITIVE
EDGE
T
A
= +25C
V
S
= 15V
R
L
= 2k
Figure 28. Current Noise Density
vs. Frequency
90
100
10
0%
5V
1
S
90
100
10
0%
50mV
200nS
90
100
10
0%
1S
5mV
90
100
10
0%
1S
5mV
8
REV.B
OP183/OP283
APPLICATIONS
OP183 Offset Adjust
Figure 36 shows how the OP183's offset voltage can be adjusted by
connecting a potentiometer between Pins 1 and 5, and connecting
the wiper to V
EE
. The recommended value for the potentiometer is
10 k
. This will give an adjustment range of approximately
1 mV.
If larger adjustment span is desired, a 50 k
potentiometer will
yield a range of
2.5 mV.
Figure 37. Direct Access Arrangement
+5 Volt Only Stereo DAC for Multimedia
The OP283's low noise and single supply capability are ideally
suited for stereo DAC audio reproduction or sound synthesis
applications such as multimedia systems. Figure 38 shows an 18-bit
stereo DAC output setup that is powered from a single +5 volt
supply. The low noise preserves the 18-bit dynamic range of the
AD1868. For DACs that operate on dual supplies, the OP283 can
also be powered from the same supplies.
Figure 38. +5 Volt Only 18-Bit Stereo DAC
Low Voltage Headphone Amplifiers
Figure 39 shows a stereo headphone output amplifier for the
AD1849 16-bit SoundPort
Stereo Codec device. The pseudo-
reference voltage is derived from the common-mode voltage
generated internally by the AD1849, thus providing a convenient
bias for the headphone output amplifiers.
1
7
6
5
4
3
2
V
OS
V
CC
V
EE
OP183
Figure 36. OP183 Offset Adjust
Phase Reversal
The OP183 family is protected against phase reversal as long as
both of the inputs are within the range of the positive supply and
the negative supply minus 0.6 volts. However if there is a possibility
of either input going beyond these limits, then the inputs should be
protected with a series resistor to limit input current to 2 mA.
Direct Access Arrangement
The OP183/OP283 can be used in a single supply Direct Access
Arrangement (DAA) as is shown in Figure 37. This figure shows a
portion of a typical DAA capable of operating from a single +5 volt
supply and it should also work on +3 volt supplies with minor
modifications. Amplifiers A2 and A3 are configured so that the
transmit signal TXA is inverted by A2 and is not inverted by A3.
This arrangement drives the transformer differentially so that the
drive to the transformer is effectively doubled over a single amplifier
arrangement. This application takes advantage of the OP183/283's
ability to drive capacitive loads, and to save power in single supply
applications.
Figure 39. Headphone Output Amplifier for Multimedia
Sound Codec
20k
20k
3.3k
22.1k
20k
20k
OP283
OP283
OP283
750pF
475
0.33F
0.1F
2.5V
REF
0.0047F
0.1F
20k
37.4k
300pF
A1
A2
A3
RXA
TXA
SoundPort is a registered trademark of Analog Devices Inc.
1/2 OP283
+5V
1/2 OP283
5k
OPTIONAL
GAIN
1k
V
REF
1/2 OP283
+5V
V
REF
OPTIONAL
GAIN
1k
5k
29
19
31
10k
10F
LOUT1L
LOUT1R
CMOUT
AD1849
V
REF
10F
10k
L VOLUME
CONTROL
R VOLUME
CONTROL
16
220F
47k
HEADPHONE
LEFT
16
220F
47k
HEADPHONE
RIGHT
47k
47k
8
1
4
3
2
1/2 OP283
7.68k
9.76k
330pF
100pF
7.68k
7
5
6
1/2 OP283
7.68k
9.76k
330pF
100pF
7.68k
LEFT
CHANNEL
OUTPUT
RIGHT
CHANNEL
OUTPUT
220F
220F
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
AD1868
V
L
LL
DL
CK
DR
LR
DGND
VBR
VBL
VOL
AGND
VOR
V
S
+5V SUPPLY
18-BIT
SERIAL
REG.
18-BIT
SERIAL
REG.
V
REF
18-BIT
DAC
18-BIT
DAC
V
REF
9
REV. B
OP183/OP283
Low Noise Microphone Amplifier for Multimedia
The OP183 family is ideally suited as a low noise microphone
preamp for low voltage audio applications. Figure 40 shows a gain
of 100 stereo preamp for the AD1849 16-bit SoundPort Stereo
Codec chip. The common-mode output buffer serves as a "phan-
tom power" driver for the microphones.
bandwidth and is not sensitive to false-ground perturbations. The
simple false-ground circuit shown achieves good rejection of low
frequency interference using standard off-the-shelf components.
Amplifier A3 biases A1 and A2 to the middle of their input
common-mode range. When operating on a +3 V supply, the
center of the OP283's common-mode range is 0.75 V. This notch
filter effectively squelches 60 Hz pickup at a filter Q of 0.75. To
reject 50 Hz interference, simply change the resistors in the twin-T
section (R1 through R5) from 2.67 k
to 3.16 k
.
The filter section uses an OP283 dual op amp in a twin-T configu-
ration whose frequency selectivity is very sensitive to the relative
matching of the capacitors and resistors in the twin-T section.
Mylar is the material of choice for the capacitors, and the relative
matching of the capacitors and resistors determines the filter's pass
band symmetry. Using 1% resistors and 5% capacitors produces
satisfactory results.
A Low Voltage Frequency Synthesizer for Wireless
Transceiver
The OP183's low noise and the low voltage operation capability
serves well for the loop filter of a frequency synthesizer. Figure 42
shows a typical application in a radio transceiver. The phase noise
performance of the synthesizer depends on low noise contribution
from each component in the loop as the noise is amplified by the
frequency division factor of the prescaler.
CRYSTAL
+3V
VARACTER
DIODE
900MHz
REFERENCE
OSCILLATOR
PHASE
DETECTOR
PRESCALER
RF
OUT
V
CONTROL
VCO
OP183
Figure 42. A Low Voltage Frequency Synthesizer for a
Wireless Transceiver
The resistors used in the low-pass filter should be of low to
moderate values to reduce noise contribution due to the input bias
current as well as the resistors themselves. The filter cutoff
frequency should be chosen to optimize the loop constant.
10k
50
20
100
20
50
10k
10k
100
10k
+5V
1/2 OP283
10F
+5V
1/2 OP213
10F
1/2 OP283
15
17 MINL
MINR
19 CMOUT
AD1849
LEFT
ELECTRET
CONDENSER
MIC
INPUT
RIGHT
ELECTRET
CONDENSER
MIC
INPUT
Figure 40. Low Noise Stereo Microphone Amplifier for
Multimedia Sound CODEC
A +3 Volt 50 Hz/60 Hz Active Notch Filter with False Ground
To process ac signals, it may be easier to use a false-ground bias
rather than the negative supply as a reference ground. This would
reject the power-line frequency interference which oftentimes can
obscure low frequency physiological signals, such as heart rates,
blood pressures, EEGs, ECGs, et cetera.
R10
25k
R8
1k
8
1
4
3
2
A1
+3V
C1
1F
R1
2.67k
R3
2.67k
C2
1F
R4
2.67k
1/2 OP283
R6
10k
V
IN
R5
1.33k
(2.67k
2)
C3
2F
(1F
2)
7
6
5
A2
V
O
1/2 OP283
R7
1k
1
3
2
A3
OP183
C5
0.015F
R11
10k
R12
70
0.75V
C6
1F
+3V
C4
1F
A1, A2, AND A3 = 1/2 OP283
Q = 0.75
NOTE: FOR 50Hz APPLICATIONS
CHANGE R1R4 TO 3.1k
AND R5 TO 1.58k
(3.16k
2).
R2
2.67k
R9
75k
Figure 41. +3 Volt Supply 50 Hz/60 Hz Notch Filter with
Pseudo Ground
Figure 41 shows a 50 Hz/60 Hz active notch filter for eliminating
line noise in patient monitoring equipment. It has several kilohertz
10
REV.B
QB9
RB3
QB10
RB4
RB5
Q7
RB6
Q8
QB8
QB7
QB6
Q5
Q6
QB11
R9
QD2
Q12
CC2
CC3
R8
6
CO
QD3
Q11
R7
Q10
4
QB14
QB13
CF1
Q4
QD1
QB12
3
Q2
2
Q1
Q3
R2
R1
5
R11
R4LT
R4AT
R4A
R4B
CC1
R3A
R3AT
R10
1
R3LT
R3B
CB1
QB3
QB1
QB4
QB2
RB1
A
B
RB2
JB1
QB5A
7
Z1
R5
OP183/OP283
Figure 43. OP183 Simplified Schematic
* OP283 SPICE Macro-model
Rev. A, 9/93
*
JCB/ADI
*
* Copyright 1993 by Analog Devices
*
* Refer to "README.DOC" file for License Statement.
* Use of this model indicates your acceptance of the terms and
* provisions in the License Statement.
*
* Node assignments
*
noninverting input
*
| inverting input
*
| | positive supply
*
| | |
negative supply
*
| | |
|
output
*
| | |
|
|
.SUBCKT OP283 2 1 99 50
45
*
* INPUT STAGE AND POLE AT 600 kHz
*
I1
99
8
1E-4
Q1
4
1
6
QP
Q2
5
3
7
QP
CIN
1
2
1.5PF
R1
50
4
1591
R2
50
5
1591
C1
4
5
83.4E-12
R3
6
8
1075
R4
7
8
1075
IOS
1
2
12.5E-9
EOS
3
2
POLY(1) (15,98) 25E-6 1
DC1
2
36
DZ
DC2
1
36
DZ
*
* GAIN STAGE AND DOMINANT POLE AT 10 Hz
*
EREF
98
0
POLY(2) (99,0) (50,0) 0 0.5 0.5
G1
98
9
(4,5) 6.28E-4
R5
9
98
1.59E9
C2
9
98
10E-12
D1
9
10
DX
D2
11
9
DX
E1
10
98
POLY(1) 99 98 -1.35 1.03
V2
50
11
0.63
*
* COMMON MODE STAGE WITH ZERO AT 353 Hz
*
ECM
14
98
POLY(2) (1,98) (2,98) 0 3.5 3.5
R7
14
15
1E6
C4
14
15
3.75E-11
R8
15
98
1
*
*POLE AT 20 MHz
*
GP2
98
31
(9,98) 1E-6
RP2
31
98
1E6
CP2
31
98
7.96E-15
*
*ZERO AT 1.5 MHz
*
EZ1
32
98
(31,98) 1E6
RZ1
32
33
1E6
RZ2
33
98
1
CZ1
32
33
106E-15
*
*POLE AT 10 MHz
*
GP10
98
40
(33,98) 1E-6
RP10
40
98
1E6
CP10
40
98
15.9E-15
*
* OUTPUT STAGE
*
RO1
99
45
140
11
REV. B
PRINTED IN U.S.A.
C1858a32/96
OP183/OP283
RO2
45
50
140
G7
45
99
(99,40)
7.14E-3
G8
50
45
(40,50)
7.14E-3
G9
98
60
(45,40)
7.14E-3
D7
60
61
DX
D8
62
60
DX
V7
61
98
DC 0
V8
98
62
DC 0
GSY
99
50
(99,50)5E-6
FSY
99
50
POLY(2) V7 V8 1.075E-3 1 1
D9
40
41
DX
D10
42
40
DX
V5
41
45
1.2
V6
45
42
1.5
*
* MODELS USED
*
.MODEL DX D
.MODEL DZ D(IS=1E-15 BV=7.0)
.MODEL QP PNP(BF=143)
.ENDS
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Lead Plastic DIP (N-8)
PIN 1
0.280 (7.11)
0.240 (6.10)
4
5
8
1
SEATING
PLANE
0.060 (1.52)
0.015 (0.38)
0.130
(3.30)
MIN
0.210
(5.33)
MAX
0.160 (4.06)
0.115 (2.93)
0.430 (10.92)
0.348 (8.84)
0.022 (0.558)
0.014 (0.356)
0.070 (1.77)
0.045 (1.15)
0.100
(2.54)
BSC
0.325 (8.25)
0.300 (7.62)
0.015 (0.381)
0.008 (0.204)
0.195 (4.95)
0.115 (2.93)
8-Lead Narrow-Body SO (SO-8)
0.0098 (0.25)
0.0075 (0.19)
0.0500 (1.27)
0.0160 (0.41)
8
0
0.0196 (0.50)
0.0099 (0.25)
x 45
PIN 1
0.1574 (4.00)
0.1497 (3.80)
0.2440 (6.20)
0.2284 (5.80)
4
5
1
8
0.0192 (0.49)
0.0138 (0.35)
0.0500
(1.27)
BSC
0.0688 (1.75)
0.0532 (1.35)
0.0098 (0.25)
0.0040 (0.10)
0.1968 (5.00)
0.1890 (4.80)
12
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