VCC
VO
VE
GND
Hermetically Sealed,
Very High Speed,
Logic Gate Optocouplers
Technical Data
Features
Dual Marked with Device
Part Number and DSCC
Standard Microcircuit
Drawing
Manufactured and Tested on
a MIL-PRF-38534 Certified
Line
QML-38534, Class H and K
Three Hermetically Sealed
Package Configurations
Performance Guaranteed
over -55
C to +125
C
High Speed: 40 M bit/s
High Common Mode
Rejection 500 V/
s
Guaranteed
1500 Vdc Withstand Test
Voltage
Active (Totem Pole) Outputs
Three Stage Output Available
High Radiation Immunity
HCPL-2400/30 Function
Compatibility
Reliability Data
Compatible with TTL, STTL,
LSTTL, and HCMOS Logic
Families
Applications
Military and Space
High Reliability Systems
Transportation, Medical, and
Life Critical Systems
Isolation of High Speed
Logic Systems
Each channel contains an AlGaAs
light emitting diode which is
optically coupled to an integrated
high gain photon detector. This
combination results in very high
HCPL-540X*
5962-89570
HCPL-543X
Functional Diagram
Multiple Channel Devices
Available
Single Channel DIP
Input
Enable
Output
On (H)
L
L
Off (L)
L
H
On (H)
H
Z
Off (L)
H
Z
Truth Tables
(Positive Logic)
Multichannel Devices
Input
Output
On (H)
L
Off (L)
H
HCPL-643X
5962-89571
*See matrix for available extensions.
Computer-Peripheral
Interfaces
Switching Power Supplies
Isolated Bus Driver
(Networking Applications)-
(5400/1/K Only)
Pulse Transformer
Replacement
Ground Loop Elimination
Harsh Industrial
Environments
High Speed Disk Drive I/O
Digital Isolation for A/D,
D/A Conversion
Description
These units are single and dual
channel, hermetically sealed
optocouplers. The products are
capable of operation and storage
over the full military temperature
range and can be purchased as
either standard product or with
full MIL-PRF-38534 Class Level
H or K testing or from the
appropriate DSCC Drawing. All
devices are manufactured and
tested on a MIL-PRF-38534
certified line and are included in
the DSCC Qualified Manufac-
turers List, QML-38534 for
Hybrid Microcircuits.
CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to
prevent damage and/or degradation which may be induced by ESD.
The connection of a 0.1
F bypass capacitor between V
CC
and GND is recommended.
2
data rate capability. The detector
has a threshold with hysteresis,
which typically provides 0.25 mA
of differential mode noise
immunity and minimizes the
potential for output signal
chatter. The detector in the single
channel units has a three state
output stage which eliminates the
need for a pull-up resistor and
allows for direct drive of a data
bus.
All units are compatible with TTL,
STTL, LSTTL, and HCMOS logic
families. The 35 ns pulse width
distortion specification guaran-
tees a 10 MBd signaling rate at
+125
C with 35% pulse width
distortion. Figures 13 through 16
show recommended circuits for
reducing pulse width distortion
and optimizing the signal rate of
the product. Package styles for
these parts are 8 pin DIP through
hole (case outlines P), and
leadless ceramic chip carrier
(case outline 2). Devices may be
purchased with a variety of lead
bend and plating options. See
Selection Guide Table for details.
Standard Microcircuit Drawing
(SMD) parts are available for
each package and lead style.
Because the same electrical die
(emitters and detectors) are used
for each channel of each device
listed in this data sheet, absolute
maximum ratings, recommended
operating conditions, electrical
specifications, and performance
characteristics shown in the
figures are similar for all parts.
Occasional exceptions exist due
to package variations and limita-
tions and are as noted. Addition-
ally, the same package assembly
processes and materials are used
in all devices. These similarities
give justification for the use of
data obtained from one part to
represent other part's perform-
ance for die related reliability and
certain limited radiation test
results.
Selection GuidePackage Styles and Lead Configuration Options
Package
8 Pin DIP
8 Pin DIP
20 Pad LCCC
Lead Style
Through Hole
Through Hole
Surface Mount
Channels
1
2
2
Common Channel
None
V
CC
, GND
None
Wiring
Agilent Part # & Options
Commercial
HCPL-5400
HCPL-5430
HCPL-6430
MIL-PRF-38534, Class H
HCPL-5401
HCPL-5431
HCPL-6431
MIL-PRF-38534, Class K
HCPL-540K
HCPL-543K
HCPL-643K
Standard Lead Finish
Gold Plate
Gold Plate
Solder Pads
Solder Dipped
Option #200
Option #200
Butt Cut/Gold Plate
Option #100
Option #100
Gull Wing/Soldered
Option #300
Option #300
Class H SMD Part #
Prescript for all below
5962-
5962-
5962-
Either Gold or Solder
8957001PX
8957101PX
89571022X
Gold Plate
8957001PC
8957101PC
Solder Dipped
8957001PA
8957101PA
89571022A
Butt Cut/Gold Plate
8957001YC
8957101YC
Butt Cut/Soldered
8957001YA
8957101YA
Gull Wing/Soldered
8957001XA
8957101XA
Class K SMD Part #
Prescript for all below
5962-
5962-
5962-
Either Gold of Solder
8957002KPX
8957103KPX
8957104K2X
Gold Plate
8957002KPC
8957103KPC
Solder Dipped
8957002KPA
8957103KPA
8957104K2A
Butt Cut/Gold Plate
8957002KYC
8957103KYC
Butt Cut/Soldered
8957002KYA
8957103KYA
Gull Wing/Soldered
8957002KXA
8957103KXA
3
7
5
6
8
1
2
3
4
V
CC
GND
V
E
V
O
Functional Diagrams
8 Pin DIP
8 Pin DIP
20 Pad LCCC
Through Hole
Through Hole
Surface Mount
1 Channel
2 Channels
2 Channels
Note: All DIP devices have common V
CC
and ground. LCCC (leadless ceramic chip carrier) package has isolated channels with
separate V
CC
and ground connections.
Outline Drawings
20 Terminal LCCC Surface Mount, 2 Channels
8 Pin DIP Through Hole, 1 and 2 Channel
GND1
VO2
19
20
2
3
VO1
8
7
VCC2
VCC1
10
GND2
15
13
12
VCC
7
5
6
8
VO1
GND
1
2
3
4
VO2
8.70 (0.342)
9.10 (0.358)
4.95 (0.195)
5.21 (0.205)
1.78 (0.070)
2.03 (0.080)
1.02 (0.040) (3 PLCS)
4.95 (0.195)
5.21 (0.205)
8.70 (0.342)
9.10 (0.358)
1.78 (0.070)
2.03 (0.080)
0.51 (0.020)
0.64
(0.025)
(20 PLCS)
1.52 (0.060)
2.03 (0.080)
METALLIZED
CASTILLATIONS (20 PLCS)
2.16 (0.085)
TERMINAL 1 IDENTIFIER
NOTE: DIMENSIONS IN MILLIMETERS (INCHES).
SOLDER THICKNESS 0.127 (0.005) MAX.
1.14 (0.045)
1.40 (0.055)
3.81 (0.150)
MIN.
4.32 (0.170)
MAX.
9.40 (0.370)
9.91 (0.390)
0.51 (0.020)
MAX.
2.29 (0.090)
2.79 (0.110)
0.51 (0.020)
MIN.
0.76 (0.030)
1.27 (0.050)
8.13 (0.320)
MAX.
7.36 (0.290)
7.87 (0.310)
0.20 (0.008)
0.33 (0.013)
7.16 (0.282)
7.57 (0.298)
NOTE: DIMENSIONS IN MILLIMETERS (INCHES).
4
Hermetic Optocoupler Options
Option
Description
100
Surface mountable hermetic optocoupler with leads trimmed for butt joint assembly. This
option is available on commercial and hi-rel product in 8 pin DIP (see drawings below for
details).
200
Lead finish is solder dipped rather than gold plated. This option is available on commercial
and hi-rel product in 8 pin DIP. DSCC Drawing part numbers contain provisions for lead
finish. All leadless chip carrier devices are delivered with solder dipped terminals as a
standard feature.
300
Surface mountable hermetic optocoupler with leads cut and bent for gull wing assembly. This
option is available on commercial and hi-rel product in 8 pin DIP (see drawings below for
details). This option has solder dipped leads.
Leadless Device Marking
Leaded Device Marking
1.14 (0.045)
1.40 (0.055)
4.32 (0.170)
MAX.
0.51 (0.020)
MAX.
2.29 (0.090)
2.79 (0.110)
0.51 (0.020)
MIN.
7.36 (0.290)
7.87 (0.310)
0.20 (0.008)
0.33 (0.013)
NOTE: DIMENSIONS IN MILLIMETERS (INCHES).
0.51 (0.020)
MIN.
4.57 (0.180)
MAX.
0.51 (0.020)
MAX.
2.29 (0.090)
2.79 (0.110)
1.40 (0.055)
1.65 (0.065)
9.65 (0.380)
9.91 (0.390)
5 MAX.
4.57 (0.180)
MAX.
0.20 (0.008)
0.33 (0.013)
NOTE: DIMENSIONS IN MILLIMETERS (INCHES).
COMPLIANCE INDICATOR,*
DATE CODE, SUFFIX (IF NEEDED)
A QYYWWZ
XXXXXX
XXXXXXX
XXX XXX
50434
COUNTRY OF MFR.
Agilent CAGE CODE*
Agilent DESIGNATOR
DSCC SMD*
PIN ONE/
ESD IDENT
Agilent P/N
DSCC SMD*
* QUALIFIED PARTS ONLY
COMPLIANCE INDICATOR,*
DATE CODE, SUFFIX (IF NEEDED)
A QYYWWZ
XXXXXX
XXXX
XXXXXX
XXX 50434
DSCC SMD*
Agilent CAGE CODE*
Agilent DESIGNATOR
COUNTRY OF MFR.
Agilent P/N
PIN ONE/
ESD IDENT
DSCC SMD*
* QUALIFIED PARTS ONLY
5
Absolute Maximum Ratings
(No derating required up to +125
C)
Storage Temperature Range, T
S
.................................. -65
C to +150
C
Operating Temperature, T
A
......................................... -55
C to +125
C
Case Temperature, T
C
................................................................ +170
C
Junction Temperature, T
J
.......................................................... +175
C
Lead Solder Temperature .............................................. 260
C for 10 s
Average Forward Current, I
F AVG
(each channel) ........................ 10 mA
Peak Input Current, I
F PK
(each channel) ............................... 20 mA
[1]
Reverse Input Voltage, V
R
(each channel) ....................................... 3 V
Supply Voltage, V
CC
............................................. 0.0 V min., 7.0 V max.
Average Output Current, I
O
............................ -25 mA min., 25 mA max.
(each channel)
Output Voltage, V
O
(each channel) ..................... -0.5 V min., 10 V max.
Output Power Dissipation, P
O
(each channel) ........................... 130 mW
Package Power Dissipation, P
D
(each channel) ......................... 200 mW
Single Channel Product Only
Three State Enable Voltage, V
E
........................... -0.5 V min., 10 V max.
Recommended Operating Conditions
Parameter
Symbol
Min.
Max.
Units
Input Current (High)
I
F(ON)
6
10
mA
Supply Voltage, Output
V
CC
4.75
5.25
V
Input Voltage (Low)
V
F(OFF)
0.7
V
Fan Out (Each Channel)
N
5
TTL Loads
Single Channel Product Only
High Level Enable Voltage
V
EH
2.0
V
CC
V
Low Level Enable Voltage
V
EL
0
0.8
V
Note enable pin 7. An external 0.01
F to 0.1
F bypass capacitor must be connected
between V
CC
and ground for each package type.
ESD Classification
(MIL-STD-883, Method 3015)
HCPL-5400/01/0K ............................................................ (
), Class 2
HCPL-5430/31/3K and HCPL-6430/31/3K ....................... (Dot), Class 3
CATHODE
8 Pin Ceramic DIP Single Channel Schematic
ANODE
V
O
V
E
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