Agilent ATF-53189 Enhancement
Mode
[1]
Pseudomorphic HEMT
in SOT 89 Package
Data Sheet
Features
Single voltage operation
High Linearity and Gain
Low Noise Figure
Excellent uniformity in product
specifications
SOT 89 standard package
Point MTTF > 300 years
[2]
MSL-1 and lead-free
Tape-and-Reel packaging option
available
Specifications
2 GHz, 4.0V, 135 mA (Typ.)
40.0 dBm Output IP3
23.0 dBm Output Power at 1dB gain
compression
0.85 dB Noise Figure
15.5 dB Gain
46% PAE at P1dB
LFOM
[3]
12.7 dB
Applications
Front-end LNA Q1 and Q2, Driver or
Pre-driver Amplifier for Cellular/
PCS and WCDMA wireless
infrastructure
Driver Amplifier for WLAN, WLL/
RLL and MMDS applications
General purpose discrete E-pHEMT
for other high linearity applications
Pin Connections and
Package Marking
Notes:
Package marking provides orientation and
identification:
"3G" = Device Code
"x" = Month code indicates the month of
manufacture.
D = Drain
S = Source
G = Gate
Notes:
1. Enhancement mode technology employs a
single positive V
gs
, eliminating the need of
negative gate voltage associated with
conventional depletion mode devices.
2. Refer to reliability datasheet for detailed
MTTF data.
3. Linearity Figure of Merit (LFOM) is OIP3
divided by DC bias power.
Description
Agilent Technologies's
ATF-53189 is a single-voltage
high linearity, low noise
E-pHEMT FET packaged in a
low cost surface mount SOT89
package. The device is ideal as a
high-linearity, low noise,
medium-power amplifier. Its
operating frequency range is
from 50 MHz to 6 GHz.
ATF-53189 is ideally suited for
Cellular/PCS and WCDMA
wireless infrastructure, WLAN,
WLL and MMDS application, and
general purpose discrete
E-pHEMT amplifiers which
require medium power and high
linearity. All devices are 100% RF
and DC tested.
3GX
Bottom View
D
S
S
G
Top View
G
S
S
D
2
ATF-53189 Absolute Maximum Ratings
[1]
Absolute
Symbol
Parameter
Units
Maximum
V
ds
DrainSource Voltage
[2]
V
7
V
gs
GateSource Voltage
[2]
V
-5 to 1.0
V
gd
Gate Drain Voltage
[2]
V
-5 to 1.0
I
ds
Drain Current
[2]
mA
300
I
gs
Gate Current
mA
20
P
diss
Total Power Dissipation
[3]
W
1.0
P
in max.
RF Input Power
dBm
+24
T
ch
Channel Temperature
C
150
T
stg
Storage Temperature
C
-65 to 150
Notes:
1. Operation of this device above any one of
these parameters may cause permanent
damage.
2. Assuming DC quiescent conditions.
3. Board (package belly) temperature T
B
is 25
C.
Derate 14.30 mW/
C for T
B
> 80
C.
4. Channel-to-board thermal resistance
measured using 150
C Liquid Crystal
Measurement method.
ATF-53189 Electrical Specifications
T
A
= 25
C, DC bias for RF parameters is Vds = 4.0V and Ids = 135 mA unless otherwise specified.
Symbol
Parameters and Test Conditions
Units
Min.
Typ.
Max.
Vgs
Operational Gate Voltage
Vds = 4.0V, Ids = 135 mA
V
--
0.65
--
Vth
Threshold Voltage
Vds = 4.0V, Ids = 8 mA
V
--
0.30
--
Ids
Drain to Source Current
Vds = 4.0V, Vgs = 0V
A
--
3.70
--
Gm
Transconductance
Vds = 4.0V, Gm =
Ids/Vgs;
mmho
--
650
--
Vgs = Vgs1 Vgs2
Vgs1 = 0.6V, Vgs2 = 0.55V
Igss
Gate Leakage Current
Vds = 0V, Vgs = -4V
A
-10.0
-0.34
--
NF
Noise Figure
f = 2 GHz
dB
--
0.85
--
f = 900 MHz
dB
--
0.80
--
G
Gain
[1]
f = 2 GHz
dB
14.0
15.5
17.0
f = 900 MHz
dB
--
17.2
--
OIP3
Output 3
rd
Order Intercept Point
[1]
f = 2 GHz
dBm
36.0
40.0
--
f = 900 MHz
dBm
--
42.0
--
P1dB
Output 1dB Compressed
[1]
f = 2 GHz
dBm
--
23.0
--
f = 900 MHz
dBm
--
21.7
--
PAE
Power Added Efficiency
f = 2 GHz
%
--
46.0
--
f = 900 MHz
%
--
33.8
--
ACLR
Adjacent Channel Leakage
Offset BW = 5 MHz
dBc
--
-54.0
--
Power Ratio
[1,2]
Offset BW = 10 MHz
dBc
--
-64.0
--
Notes:
1. Measurements at 2 GHz obtained using production test board described in Figure 1.
2. ACLR test spec is based on 3GPP TS 25.141 V5.3.1 (2002-06)
- Test Model 1
- Active Channels: PCCPCH + SCH + CPICH + PICH + SCCPCH + 64 DPCH (SF=128)
- Freq = 2140 MHz
- Pin = -8 dBm
- Channel Integrate Bandwidth = 3.84 MHz
Thermal Resistance
[2,4]
ch-b
= 70
C/W
3
Figure 1. Block diagram of the 2 GHz production test board used for NF, Gain, OIP3 , P1dB, PAE
and ACLR measurements. This circuit achieves a trade-off between optimal OIP3, P1dB and
VSWR. Circuit losses have been de-embedded from actual measurements.
Input
Output
Output Matching Circuit
_mag=0.40
_ang=-120.0
Input Matching Circuit
_mag=0.74
_ang=-112.4
DUT
Notes:
1. Distribution data sample size is 500 samples taken from 3 different wafers. Future wafers allocated
to this product may have nominal values anywhere between the upper and lower limits.
2. Measurements are made on production test board, which represents a trade-off between optimal
OIP3, P1dB and VSWR. Circuit losses have been de-embedded from actual measurements.
Product Consistency Distribution Charts
[1,2]
Figure 2. OIP3 @ 2 GHz, 4V, 135 mA.
LSL = 36 dBm, Nominal = 40 dBm.
OIP3 (dBm)
FREQUENCY
36 37 38 39 40 41 42
43 44 45
150
120
90
60
30
0
Stdev=0.86
+3 Std
3 Std
Figure 3. NF @ 2 GHz, 4V, 135 mA.
USL = 1.30 dBm, Nominal = 0.84 dBm.
NF (dBm)
FREQUENCY
.5
.6
.7
.8
.9
1
1.1
150
120
90
60
30
0
Stdev=0.08
+3 Std
3 Std
Figure 4. Gain @ 2 GHz, 4V, 135 mA.
LSL = 14 dBm, Nominal = 15.5 dBm,
USL = 17 dBm.
Gain (dB)
FREQUENCY
14.5
15
15.5
16
16.5
150
120
90
60
30
0
Stdev=0.22
+3 Std
3 Std
Figure 5. P1dB @ 2 GHz, 4V, 135 mA.
Nominal = 23 dBm.
P1dB (dBm)
FREQUENCY
19
20
21
22
23
24
25
26
150
120
90
60
30
0
Stdev=1.14
+3 Std
3 Std
4
Gamma Load and Source at Optimum OIP3 Tuning Conditions
The device's optimum OIP3 measurements were determined using a Maury Load Pull System at 4.0V,
135 mA quiesent bias.
Typical Gammas at Optimum OIP3
[1]
Freq
Gamma Source
Gamma Load
OIP3
Gain
P1dB
PAE
(GHz)
Mag
Ang (deg)
Mag
Ang (deg)
(dBm)
(dB)
(dBm)
(%)
0.9
0.8179
-143.28
0.0721
124.08
42.0
17.2
21.7
33.8
2.0
0.7411
-112.36
0.4080
119.91
41.6
15.6
23.4
44.2
3.9
0.6875
-94.23
0.4478
174.74
41.3
11.2
23.1
41.4
5.8
0.5204
-75.91
0.3525
-120.13
36.9
5.6
22.4
25.7
Note:
1. Typical describes additional product performance information that is not covered by the product warranty.
Figure 6. Typical IV Curve.
Vds (V)
Ids (mA)
0
7
1
2
3
4
5
6
400
350
300
250
200
150
100
50
0
0.5V
0.6V
0.7V
0.8V
0.9V
5
ATF-53189 Typical Performance Curves (at 25
C unless specified otherwise)
Tuned for Optimal OIP3 at Vd = 4.0V, Ids = 135 mA.
Figure 7. OIP3 vs. Ids and Vds at 900 MHz.
Ids (mA)
OIP3 (dBm)
75
180
90
105
120
135
150
165
45
40
35
30
25
20
3V
4V
5V
Figure 8. OIP3 vs. Ids and Vds at 2 GHz.
Ids (mA)
OIP3 (dBm)
75
180
90
105
120
135
150
165
45
40
35
30
25
20
3V
4V
5V
Figure 9. OIP3 vs. Ids and Vds at 3.9 GHz.
Ids (mA)
OIP3 (dBm)
75
180
90
105
120
135
150
165
45
40
35
30
25
20
3V
4V
5V
Figure 10. Small Signal Gain vs. Ids and Vds
at 900 MHz.
Ids (mA)
GAIN (dB)
75
180
90
105
120
135
150
165
19
18
17
16
15
14
13
12
3V
4V
5V
Figure 11. Small Signal Gain vs. Ids and Vds
at 2 GHz.
Ids (mA)
GAIN (dB)
75
180
90
105
120
135
150
165
19
18
17
16
15
14
13
12
3V
4V
5V
Figure 12. Small Signal Gain vs. Ids and Vds
at 3.9 GHz.
Ids (mA)
GAIN (dB)
75
180
90
105
120
135
150
165
14
12
10
8
6
4
2
0
3V
4V
5V
Figure 13. OIP3 vs. Ids and Vds at 5.8 GHz.
Ids (mA)
OIP3 (dBm)
75
180
90
105
120
135
150
165
40
35
30
25
20
3V
4V
5V
Figure 14. Small Signal Gain vs. Ids and Vds
at 5.8 GHz.
Ids (mA)
GAIN (dB)
75
180
90
105
120
135
150
165
8
6
4
2
0
3V
4V
5V
Figure 15. Small Signal Gain/Pout/PAE vs.
Pin at Vds=3V and Freq = 900 MHz.
Pin (dBm)
GAIN (dB) & Pout (dBm)
PAE (%)
-14
10
-10
-6
-2
2
6
30
25
20
15
10
5
0
60
50
40
30
20
10
0
Gain_3V
Pout_3V
PAE_3V
Note:
Bias current for the above charts are quiescent
conditions. Actual level may increase depending
on amount of RF drive.
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