Small Outline, 5 Lead, High
Speed Optocouplers
Technical Data
HCPL-M452
HCPL-M453
Features
Surface Mountable
Very Small, Low Profile
JEDEC Registered
Package Outline
Compatible with Infrared
Vapor Phase Reflow and
Wave Soldering Processes
Very High Common Mode
Transient Immunity:
15000 V/
s at V
CM
= 1500 V
Guaranteed (HCPL-M453)
High Speed: 1 Mb/s
TTL Compatible
Guaranteed AC and DC
Performance over
Temperature: 0
C to 70
C
Open Collector Output
Recognized Under the
Component Program of
U.L. (File No. E55361) for
Dielectric Withstand Proof
Test Voltage of 3750 Vac, 1
Minute
Lead Free Option
CAUTION: The small device geometries inherent to the design of this bipolar component increase the component's
susceptibility to damage from electrostatic discharge (ESD). It is advised that normal static precautions be taken
in handling and assembly of this component to prevent damage and/or degradation which may be induced by
ESD.
The SO-5 JEDEC registered
(MO-155) package outline does
not require "through holes" in a
PCB. This package occupies
approximately one-fourth the
footprint area of the standard
dual-in-line package. The lead
profile is designed to be
compatible with standard
surface mount processes.
These diode-transistor
optocouplers use an insulating
layer between the light emitting
diode and an integrated photon
detector to provide electrical
insulation between input and
output. Separate connections for
the photodiode bias and output
transistor collector increase the
speed up to a hundred times
SO-5 Package
Standard DIP
SO-8 Package
HCPL-M452
HCPL-4502
HCPL-0452
HCPL-M453
HCPL-4503
HCPL-0453
(Note: These devices equivalent to 6N135/6N136 devices but without the base lead.)
Description
These small outline high CMR,
high speed, diode-transistor opto-
couplers are single channel
devices in a five lead miniature
footprint. They are electrically
equivalent to the following Agilent
optocouplers:
2
tions. A standard 16 mA TTL
sink current through the input
LED will provide enough output
current for 1 TTL load and a
5.6 k
pull-up resistor. CTR of
the HCPL-M452 is 19%
minimum at I
F
= 16 mA.
over that of a conventional
photo-transistor coupler by
reducing the base-collector
capacitance.
The HCPL-M452 is designed for
high speed TTL/TTL applica-
The HCPL-M453 is an HCPL-
M452 with increased common
mode transient immunity of
15,000 V/
s minimum at
V
CM
= 1500 V guaranteed.
Applications
Line Receivers -
High common mode transient
immunity (>1000 V/
s) and
low input-output capacitance
(0.6 pF).
High Speed Logic Ground
Isolation - TTL/TTL, TTL/
LTTL, TTL/CMOS, TTL/
LSTTL.
Replace Slow Phototran-
sistor Optocouplers
Replace Pulse
Transformers - Save board
space and weight
Analog Signal Ground
Isolation -
Integrated photon detector
provides improved linearity
over phototransistor type.
Land Pattern Recommendation
DIMENSIONS IN MILLIMETERS AND (INCHES)
Outline Drawing (JEDEC MO-155)
Schematic
IF
SHIELD
6
5
4
GND
VCC
1
3
VO
ICC
VF
IO
ANODE
CATHODE
+
MXXX
XXX
6
5
4
3
1
7.0 0.2
(0.276 0.008)
2.5 0.1
(0.098 0.004)
0.102 0.102
(0.004 0.004)
V
CC
V
OUT
GND
CATHODE
ANODE
4.4 0.1
(0.173 0.004)
1.27
(0.050)
BSC
0.15 0.025
(0.006 0.001)
0.71
(0.028)
MIN.
0.4 0.05
(0.016 0.002)
3.6 0.1*
(0.142 0.004)
DIMENSIONS IN MILLIMETERS (INCHES)
* MAXIMUM MOLD FLASH ON EACH SIDE IS 0.15 mm (0.006)
NOTE: FLOATING LEAD PROTRUSION IS 0.15 mm (6 mils) MAX.
7 MAX.
MAX. LEAD COPLANARITY
= 0.102 (0.004)
8.27
(0.325)
2.0
(0.080)
2.5
(0.10)
1.3
(0.05)
0.64
(0.025)
4.4
(0.17)
3
Absolute Maximum Ratings
(No Derating Required up to 85
C)
Storage Temperature ................................................. -55
C to +125
C
Operating Temperature ............................................. -55
C to +100
C
Average Input Current - I
F
..................................................... 25 mA
[1]
Peak Input Current - I
F
........................................................... 50 mA
[2]
(50% duty cycle, 1 ms pulse width)
Peak Transient Input Current - I
F
.............................................. 1.0 A
(
1
s pulse width, 300 pps)
Reverse Input Voltage - V
R
(Pin3-1) ............................................... 5 V
Input Power Dissipation ........................................................ 45 mW
[3]
Average Output Current - I
O
(Pin 5) ........................................... 8 mA
Peak Output Current ................................................................. 16 mA
Output Voltage - V
O
(Pin 5-4) ........................................ -0.5 V to 20 V
Supply Voltage - V
CC
(Pin 6-4) ....................................... -0.5 V to 30 V
Output Power Dissipation .................................................... 100 mW
[4]
Infrared and Vapor Phase Reflow Temperature .................. see below
Solder Reflow Thermal Profile
Recommended Pb-Free IR Profile
0
TIME (SECONDS)
TEMPERATURE (
C)
200
100
50
150
100
200
250
300
0
30
SEC.
50 SEC.
30
SEC.
160C
140C
150C
PEAK
TEMP.
245C
PEAK
TEMP.
240C
PEAK
TEMP.
230C
SOLDERING
TIME
200C
PREHEATING TIME
150C, 90 + 30 SEC.
2.5C 0.5C/SEC.
3C + 1C/0.5C
TIGHT
TYPICAL
LOOSE
ROOM
TEMPERATURE
PREHEATING RATE 3C + 1C/0.5C/SEC.
REFLOW HEATING RATE 2.5C 0.5C/SEC.
217 C
RAMP-DOWN
6 C/SEC. MAX.
RAMP-UP
3 C/SEC. MAX.
150 - 200 C
260 +0/-5 C
t 25 C to PEAK
60 to 150 SEC.
20-40 SEC.
TIME WITHIN 5 C of ACTUAL
PEAK TEMPERATURE
tp
ts
PREHEAT
60 to 180 SEC.
tL
TL
Tsmax
Tsmin
25
Tp
TIME
TEMPERA
TURE
NOTES:
THE TIME FROM 25 C to PEAK TEMPERATURE = 8 MINUTES MAX.
Tsmax = 200 C, Tsmin = 150 C
4
Electrical Specifications
Over recommended temperature (T
A
= 0
C to 70
C) unless otherwise specified. (See note 11.)
Parameter
Symbol Min. Typ.* Max. Units
Test Conditions
Fig. Note
Current
CTR
20
24
50
%
T
A
= 25
C V
O
= 0.4 V
V
CC
= 4.5 V 1, 2,
5
15
25
V
O
= 0.5 V
4
Logic Low
V
OL
0.1
0.4
V
T
A
= 25
C I
O
= 3.0 mA
0.5
I
O
= 2.4 mA
Logic High
I
OH
0.003
0.5
A
T
A
= 25
C V
O
= V
CC
= 5.5 V
7
0.01
1
T
A
= 25
C V
O
= V
CC
= 15.0 V
50
I
F
= 0 mA
Logic Low
I
CCL
50
200
I
F
= 16 mA, V
O
= Open,
11
Supply
V
CC
= 15 V
Current
Logic High
I
CCH
0.02
1
T
A
= 25
C I
F
= 0 mA, V
O
= Open,
11
2
Input Forward
V
F
1.5
1.7
V
T
A
= 25
C
3
1.8
I
F
= 16 mA
Input Reverse
BV
R
5
I
R
= 10
A
Breakdown
Voltage
Temperature
V
F
/
T
A
-1.6
mV/
C I
F
= 16 mA
Coefficient of
Forward
Voltage
Input
C
IN
60
pF
f = 1 MHz, V
F
= 0
Capacitance
Input-Output
V
ISO
3750
V
RMS
RH
50%, t = 1 min., T
A
= 25
C
6, 7
Insulation
Resistance
R
I-O
10
12
V
I-O
= 500 V
DC
6
(Input-Output)
Capacitance
C
I-O
0.6
pF
f = 1 MHz
6
(Input-Output)
*All typicals at T
A
= 25
C.
Output
Voltage
Supply
Current
I
F
= 16 mA
Voltage
Transfer Ratio
V
CC
= 15.0 V
Output
Current
Insulation Related Specifications
Parameter
Symbol
Value
Units
Conditions
Min External Air Gap
L(IO1)
5
mm
Measured from input terminals
(Clearance)
to output terminals
Min. External Tracking Path
L(IO2)
5
mm
Measured from input terminals
(Creepage)
to output terminals
Min. Internal Plastic Gap
0.08
mm
Through insulation distance
(Clearance)
conductor to conductor
Tracking Resistance
CTI
175
V
DIN IEC 112/VDE 0303 Part 1
Isolation Group (per DIN VDE 0109)
IIIa
Material Group DIN VDE 0109
5
Switching Specifications
Over recommended temperature (T
A
= 0
C to 70
C) V
CC
= 5 V, I
F
= 16 mA unless otherwise specified.
Parameter
Symbol
Device Min. Typ.* Max. Units Test Conditions
Fig. Note
Propagation
t
PHL
0.2
0.8
s
T
A
= 25
C
5, 6,
9
Delay Time
R
L
= 1.9 k
10
to Logic Low
at Output
Propagation
t
PLH
0.6
0.8
T
A
= 25
C
5, 6,
9
Delay Time
R
L
= 1.9 k
10
to Logic High
at Output
Common
|CM
H
|
HCPL-
1
kV/
s V
CM
= 10 V
p-p
11
8, 9
Mode
M452
Transient
Immunity at
HCPL-
15
30
V
CM
= 1500 V
p-p
Logic High
M453
Level Output
Common
|CM
L
|
HCPL-
1
V
CM
= 10 V
p-p
11
8, 9
Mode
M452
Transient
Immunity at
HCPL-
15
30
V
CM
= 1500 V
p-p
Logic Low
M453
Level Output
Bandwidth
BW
3
MHz
R
L
= 100
, See Test Circuit 8, 9
10
All typicals at T
A
= 25
C.
1.0
1.0
Notes:
1. Derate linearly above 85
C free-air temperature at a rate of 0.5 mA/
C.
2. Derate linearly above 85
C free-air temperature at a rate of 1.0 mA/
C.
3. Derate linearly above 85
C free-air temperature at a rate of 1.1 mW/
C.
4. Derate linearly above 85
C free-air temperature at a rate of 2.3 mW/
C.
5. CURRENT TRANSFER RATIO in percent is defined as the ratio of output collector current, I
O
, to the forward LED input
current, I
F
, times 100.
6. Device considered a two terminal device: pins 1 and 3 shorted together, and pins 4, 5 and 6 shorted together.
7. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage
4500 V
RMS
for 1 second
(leakage detection current limit, I
I-O
5
A).
8. Common transient immunity in a Logic High level is the maximum tolerable (positive) dV
CM
/dt on the rising edge of the
common mode pulse, V
CM
, to assure that the output will remain in a Logic High state (i.e., V
O
> 2.0 V). Common mode
transient immunity in a Logic Low level is the maximum tolerable (negative) dV
CM
/dt on the falling edge of the common mode
pulse signal, V
CM
to assure that the output will remain in a Logic Low state (i.e., V
O
< 0.8 V).
9. The 1.9 k
load represents 1 TTL unit load of 1.6 mA and the 5.6 k
pull-up resistor.
10. The frequency at which the ac output voltage is 3 dB below its mid-frequency value.
11. Use of a 0.1
F bypass capacitor connected between pins 4 and 6 is recommended.
I
F
= 0 mA
T
A
= 25
C
R
L
= 1.9 k
I
F
= 16 mA
T
A
= 25
C
R
L
= 1.9 k
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