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Электронный компонент: HMMC-5021

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6-28
2 26.5 GHz GaAs MMIC
Traveling Wave Amplifier
Technical Data
Features
Wide-Frequency Range:
2 - 26.5 GHz
High Gain: 9.5 dB
Gain Flatness: 0.75 dB
Return Loss:
Input: -14 dB
Output: -13 dB
Low-Frequency Operation
Capability: < 2 GHz
Gain Control:
35 dB Dynamic Range
Moderate Power:
20 GHz: P
-1dB
: 18 dBm
P
sat
:
20 dBm
26.5 GHz: P
-1dB
: 15 dBm
P
sat
: 17 dBm
Description
The HMMC-5021/22/26 is a
broadband GaAs MMIC Traveling
Wave Amplifier designed for high
gain and moderate output power
over the full 2 to 26.5 GHz fre-
quency range. Seven MESFET
cascode stages provide a flat gain
response, making the
HMMC-5021/22/26 an ideal
wideband gain block. Optical
lithography is used to produce
gate lengths of
0.4
m. The
HMMC-5021/22/26 incorporates
advanced MBE technology,
Ti-Pt-Au gate metallization,
silicon nitride passivation, and
polyimide for scratch protection.
HMMC-5021 (2-22 GHz)
HMMC-5022 (2-22 GHZ)
HMMC-5026 (2-26.5 GHz)
Absolute Maximum Ratings
Symbol
Parameters/Conditions
Units
Min.
Max.
[1]
V
DD
Positive Drain Voltage
V
8.0
I
DD
Total Drain Current
mA
250
V
G1
First Gate Voltage
V
-5
0
I
G1
First Gate Current
mA
-9
+5
V
G2
[2]
Second Gate Voltage
V
-2.5
+3.5
I
G2
Second Gate Current
mA
-7
P
DC
DC Power Dissipation
watts
2.0
P
in
CW Input Power
dBm
23
T
ch
Operating Channel Temp.
C
+150
T
case
Operating Case Temp.
C
-55
T
STG
Storage Temperature
C
-65
+165
T
max
Maximum Assembly Temp.
C
+300
(for 60 seconds maximum)
Notes:
1. Operation in excess of any one of these conditions may result in permanent
damage to this device. T
A
= 25
C except for T
ch
, T
STG
, and T
max
.
2. Minimum voltage on V
G2
must not violate the following: V
G2
(min) > V
DD
- 9 volts.
Chip Size:
2980 x 770
m (117.3 x 30.3 mils)
Chip Size Tolerance:
10
m (
0.4 mils)
Chip Thickness:
127
15
m (5.0
0.6 mils)
Pad Dimensions:
75 x 75
m (2.95 x 2.95 mils), or larger
5965-5449E
6-29
HMMC-5021/22/26 DC Specifications/Physical Properties,
[1]
applies to all part numbers
Symbol
Parameters and Test Conditions
Units
Min.
Typ.
Max.
I
DSS
Saturated Drain Current
mA
115
180
250
(V
DD
= 7.0 V, V
G1
= 0 V, V
G2
= open circuit)
V
p
First Gate Pinch-off Voltage
(V
DD
= 7.0 V, I
DD
= 16 mA, V
G2
= open circuit)
V
-3.5
-1.5
-0.5
V
G2
Second Gate Self-Bias Voltage
V
2.1
(V
DD
= 7.0 V, V
G1
= 0 V)
I
DSOFF
First Gate Pinch-off Current
(V
G1
)
(V
DD
= 7.0 V, V
G1
= -3.5 V, V
G2
= open circuit)
mA
4
I
DSOFF
Second Gate Pinch-Off Current
(V
G2
)
(V
DD
= 5.0 V, V
G1
= 0 V, V
G2
= -3.5 V)
mA
8
ch-bs
Thermal Resistance
(T
backside
= 25
C)
C/W
36
Note:
1. Measured in wafer form with T
chuck
= 25
C. (Except
ch-bs
.)
HMMC-5021/22/26 RF Specifications,
V
DD
= 7.0 V, I
DD
(Q) = 150 mA, Z
in
= Z
o
= 50
[1]
2.0 22.0 GHz
2.0 26.5 GHz
Symbol
Parameters/Conditions
Units
HMMC-5021
HMMC-5022
HMMC-5026
Typ.
Min.
Typ.
Max.
Min.
Typ.
Max.
BW
Guaranteed Bandwidth
GHz
2-22
2
22
2
26.5
S
21
Small Signal Gain
dB
10
8.0
10
12
7.5
9.5
12
S
21
Small Signal Gain Flatness
dB
0.5
0.5
1.0
0.75
1.0
RL
in(min)
Minimum Input Return Loss
dB
16
10
16
10
14
RL
out(min)
Minimum Output Return Loss
dB
13
10
13
10
13
Isolation
Minimum Reverse Isolation
dB
32
20
32
20
30
P
-1dB
Output Power at 1 dB Gain Comp.
dBm
18
15
18
12
15
P
sat
Saturated Output Power
dBm
20
17
20
14
17
Max. Second Harm. (2 <
o
<20),
H
2(max)
[P
o
(
o
) = 17 dBm or P
-1dB
,
dBc
-25
-25
-20
-25
-20
whichever is less.]
Max. Third Harm. (2 <
o
< 20),
H
3(max)
[P
o
(
o
) = 17 dBm or P
-1dB
,
dBc
-34
-34
-20
-34
-20
whichever is less.]
NF
Noise Figure
dB
8
8
10
Notes:
1. Small-signal data measured in wafer form with T
chuck
= 25
C. Large-signal data measured on individual devices
mounted in an HP83040 Series Modular Microcircuit Package @ T
A
= 25
C.
2. Performance may be extended to lower frequencies through the use of appropriate off-chip circuitry. Upper -3 dB
corner frequency
29.5 GHz.
6-30
Applications
The HMMC-5021/22/26 series of
traveling wave amplifiers are
designed for use as general
purpose wideband gain blocks in
communication systems and
microwave instrumentation. They
are ideally suited for broadband
applications requiring a flat gain
response and excellent port
matches over a 2 to 26.5 GHz
frequency range. Dynamic gain
control and low-frequency
extension capabilities are de-
signed into these devices.
Biasing and Operation
These amplifiers are biased with
a single positive drain supply
(V
DD
) and a single negative gate
supply (V
G1
). The recommended
bias conditions for the
HMMC-5021/22/26 are V
DD
= 7.0V,
I
DD
= 150 mA for best overall
performance. To achieve this
drain current level, V
G1
is typi-
cally biased between -0.2V and
-0.5V. No other bias supplies or
connections to the device are
required for 2 to 26.5 GHz opera-
tion. See Figure 3 for assembly
information.
The auxiliary gate and drain
contacts are used only for low-
frequency performance extension
below
1.0 GHz. When used,
these contacts must be AC
coupled only. (Do not attempt to
apply bias to these pads.)
The second gate (V
G2
) can be
used to obtain 35 dB (typical)
dynamic gain control. For normal
operation, no external bias is
required on this contact and its
self-bias voltage is
+2.1 V.
Applying an external bias
between its open-circuit voltage
and -2.5 volts will adjust the gain
while maintaining a good
input/output port match.
Assembly Techniques
Solder die-attach using a fluxless
AuSu solder preform is the
recommended assembly method.
Gold thermosonic wedge bonding
with 0.7 mil diameter Au wire is
recommended for all bonds. Tool
force should be 22
1 gram, stage
temperature should be 150
2
C,
and ultrasonic power and dura-
tion should be 64
1 dB and
76
8 msec, respectively. The
bonding pad and chip backside
metallization is gold.
For more detailed information
see HP application note #999,
"GaAs MMIC Assembly and
Handling Guidelines."
GaAs MMICs are ESD sensitive.
Proper precautions should be used
when handling these devices.
Figure 1. HMMC-5021/22/26 Schematic.
Aux. Drain
Drain Bias
(V
DD
)
RF Input
Single Stage Shown
Temp
Diode
Sense
Temp
Diode
Force
First Gate
Bias (V
G1
)
Second Gate
Bias (V
G2
)
RF Output
Aux. Gate
Note:
FET gate periphery in microns.
Seven Identical Stages
124
124
6-31
Figure 2. HMMC-5021/22/26 Bonding Pad Locations.
Figure 3. HMMC-5021/22/26 Assembly Diagram.
Note:
Total offset between RF input
and RF output pad is 335
m
(13.2 mils).
Notes:
All dimensions in microns.
Rectangular Pad Dim: 75 x 75
m.
Octagonal Pad Dim: 90
m dia.
All other dimensions
5
m
(unless otherwise noted).
Chip thickness: 127
15
m.
V
DD
V
G1
OUT
IN
1.5 mil dia.Gold Wire
Bond to
15 nF
DC Feedthru
4 nH Inductor
(0.7 mil Gold Wire Bond
with length
150 mils)
0.7 mil dia. Gold Bond Wire
(Length NOT important)
Gold Plated Shim
68 pF Capacitor
Input and Output Thin Film
Circuit with
8 pF
DC Blocking Capacitor
2.0 mil
nom. gap
2.0 mil
nom. gap
Trace Offset
168
m
(6.6 mils)
1.5 mil dia.Gold Wire
Bond to
15 nF DC Feedthru
Bonding Island
Trace Offset
168
m
(6.6 mils)
6-32
HMMC-5021/22/26 Typical Performance
Typical Scattering Parameters
[1]
,
(T
chuck
= 25
C, V
DD
= 7.0 V, I
DD
= 150 mA, Z
in
= Z
out
= 50
Freq.
S
11
S
21
S
12
S
22
GHz
dB
Mag
Ang
dB
Mag
Ang
dB
Mag
Ang
dB
Mag
Ang
2.0
-22.6
0.074
-174.1
-53.1
0.0022 167.3
10.1
3.183
123.6
-28.9
0.036
77.3
3.0
-30.6
0.030
130.4
-51.0
0.0028 120.1
10.0
3.173
102.1
-21.6
0.083
64.1
4.0
-37.8
0.013
-19.8
-48.0
0.0040
95.0
10.2
3.225
78.2
-18.2
0.124
45.4
5.0
-29.4
0.034
-79.9
-46.8
0.0046
67.1
10.3
3.275
53.5
-16.3
0.153
23.4
6.0
-26.6
0.047
-113.8
-44.4
0.0060
36.0
10.4
3.303
28.1
-15.4
0.170
2.5
7.0
-26.6
0.047
-137.0
-44.1
0.0062
1.0
10.4
3.330
2.3
-15.7
0.165
-19.5
8.0
-27.7
0.041
-152.6
-43.4
0.0067
-27.5
10.5
3.331
-23.8
-17.0
0.141
-40.7
9.0
-29.0
0.035
-149.8
-44.3
0.0061
-31.8
10.4
3.312
-50.2
-19.2
0.110
-59.7
10.0
-29.0
0.036
-140.8
-43.0
0.0071
-53.6
10.3
3.282
-76.4
-24.3
0.061
-76.8
11.0
-27.3
0.043
-138.1
-41.6
0.0083
-74.8
10.2
3.253
-102.5
-35.1
0.018
-32.6
12.0
-26.2
0.049
-141.9
-40.0
0.0100
-96.9
10.2
3.227
-128.8
-24.6
0.059
21.0
13.0
-25.8
0.052
-148.5
-38.9
0.0113 -120.9
10.2
3.218
-155.4
-19.7
0.103
2.8
14.0
-26.4
0.048
-143.0
-38.1
0.0125 -145.6
10.1
3.204
177.8
-17.6
0.132
-21.2
15.0
-24.6
0.059
-131.7
-36.6
0.0148 -169.9
10.1
3.197
150.4
-17.0
0.141
-44.8
16.0
-21.6
0.083
-133.7
-35.3
0.0172 160.9
10.0
3.177
122.5
-17.1
0.140
-67.4
17.0
-19.4
0.107
-143.5
-35.0
0.0177 130.6
10.0
3.149
94.4
-18.5
0.119
-91.8
18.0
-18.3
0.121
-158.7
-34.7
0.0184 105.0
9.9
3.138
65.9
-21.8
0.081
-116.0
19.0
-18.7
0.116
-172.6
-33.9
0.0201
80.2
9.9
3.140
36.8
-28.9
0.036
-121.7
20.0
-20.3
0.097
-179.5
-33.3
0.0217
50.7
10.0
3.151
6.6
-28.5
0.038
-57.0
21.0
-21.8
0.082
-168.3
-32.7
0.0233
22.5
10.0
3.150
-24.9
-21.7
0.082
-59.1
22.0
-19.9
0.101
-155.3
-31.7
0.0259
-8.4
9.9
3.126
-57.5
-18.6
0.117
-81.5
23.0
-17.3
0.137
-158.8
-31.4
0.0268
-39.5
9.8
3.076
-91.0
-17.3
0.137
-103.3
24.0
-16.3
0.153
-169.9
-30.7
0.0291
-71.5
9.7
3.045
-125.5
-17.3
0.137
-123.8
25.0
-17.1
0.139
-175.4
-30.0
0.0317 -106.2
9.7
3.045
-162.2
-18.5
0.118
-135.3
26.0
-17.0
0.141
-165.0
-29.2
0.0345 -145.5
9.6
3.027
157.2
-19.4
0.107
-122.5
26.5
-15.7
0.163
-161.1
-29.0
0.0356 -166.7
9.5
2.970
135.4
-17.6
0.132
-114.2
27.0
-14.3
0.192
-162.7
-28.9
0.0357 171.7
9.2
2.876
112.9
-15.3
0.173
-116.0
28.0
-13.2
0.220
-175.7
-28.8
0.0362 126.3
8.5
2.648
65.8
-12.6
0.233
-138.1
29.0
-14.1
0.197
-176.9
-28.6
0.0371
73.0
7.7
2.433
10.3
-15.4
0.170
-144.7
30.0
-11.5
0.266
-171.6
-30.8
0.0287
4.8
4.6
1.689
-61.1
-8.7
0.369
-123.6
Note:
1. Data obtained from on-wafer measurements.
2
6
10
18
14
26
22
30
FREQUENCY (GHz)
V
DD
= 7.0 V, I
DD
= 150 mA
V
DD
= 7.0 V, I
DD
= 150 mA
Figure 4. Typical Gain and Reverse
Isolation vs. Frequency.
12
11
10
9
8
7
6
5
4
3
2
10
20
30
40
50
60
SMALL-SIGNAL GAIN (dB)
REVERSE ISOLATION (dB)
OUTPUT RETURN LOSS (dB)
S
12
S
21
2
6
10
18
14
26
22
30
FREQUENCY (GHz)
Figure 5. Typical Input and Output
Return Loss vs. Frequency.
10
15
20
25
30
35
40
10
15
20
25
30
35
40
INPUT RETURN LOSS (dB)
S
11
S
22