1
Features
Low-voltage and Standard-voltage Operation
2.7 (V
CC
= 2.7V to 5.5V)
1.8 (V
CC
= 1.8V to 5.5V)
Internally Organized 128 x 8 (1K), 256 x 8 (2K), 512 x 8 (4K),
1024 x 8 (8K) or 2048 x 8 (16K)
Two-wire Serial Interface
Schmitt Trigger, Filtered Inputs for Noise Suppression
Bidirectional Data Transfer Protocol
100 kHz (1.8V) and 400 kHz (2.7V, 5V) Compatibility
Write Protect Pin for Hardware Data Protection
8-byte Page (1K, 2K), 16-byte Page (4K, 8K, 16K) Write Modes
Partial Page Writes Allowed
Self-timed Write Cycle (5 ms max)
High-reliability
Endurance: 1 Million Write Cycles
Data Retention: 100 Years
Automotive Grade and Lead-free/Halogen-free Devices Available
8-lead PDIP, 8-lead JEDEC SOIC, 8-lead MAP, 5-lead SOT23,
8-lead TSSOP and 8-ball dBGA2 Packages
Die Sales: Wafer Form, Waffle Pack and Bumped Wafers
Description
The AT24C01A/02/04/08A/16A provides 1024/2048/4096/8192/16384 bits of serial
electrically erasable and programmable read-only memory (EEPROM) organized as
128/256/512/1024/2048 words of 8 bits each. The device is optimized for use in many
industrial and commercial applications where low-power and low-voltage operation
are essential. The AT24C01A/02/04/08A/16A is available in space-saving 8-lead PDIP,
8-lead JEDEC SOIC, 8-lead MAP, 5-lead SOT23 (AT24C01A/AT24C02/AT24C04), 8-
lead TSSOP, and 8-ball dBGA2 packages and is accessed via a Two-wire serial inter-
face. In addition, the entire family is available in 2.7V (2.7V to 5.5V) and 1.8V (1.8V to
5.5V) versions.
Table 1. Pin Configuration
Pin Name
Function
A0 - A2
Address Inputs
SDA
Serial Data
SCL
Serial Clock Input
WP
Write Protect
NC
No Connect
GND
Ground
VCC
Power Supply
Two-wire
Serial EEPROM
1K (128 x 8)
2K (256 x 8)
4K (512 x 8)
8K (1024 x 8)
16K (2048 x 8)
AT24C01A
AT24C02
AT24C04
AT24C08A
AT24C16A
0180VSEEPR8/05
8-lead SOIC
1
2
3
4
8
7
6
5
A0
A1
A2
GND
VCC
WP
SCL
SDA
8-lead PDIP
1
2
3
4
8
7
6
5
A0
A1
A2
GND
VCC
WP
SCL
SDA
8-lead MAP
Bottom View
1
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
A0
A1
A2
GND
5-lead SOT23
1
2
3
5
4
SCL
GND
SDA
WP
VCC
8-ball dBGA2
Bottom View
VCC
WP
SCL
SDA
A0
A1
A2
GND
1
2
3
4
8
7
6
5
8-lead TSSOP
1
2
3
4
8
7
6
5
A0
A1
A2
GND
VCC
WP
SCL
SDA
2
AT24C01A/02/04/08A/16A
0180VSEEPR8/05
Figure 1. Block Diagram
Absolute Maximum Ratings
Operating Temperature..................................55
C to +125
C
*NOTICE:
Stresses beyond those listed under "Absolute
Maximum Ratings" may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
Storage Temperature .....................................65
C to +150
C
Voltage on Any Pin
with Respect to Ground .................................... 1.0V to +7.0V
Maximum Operating Voltage .......................................... 6.25V
DC Output Current........................................................ 5.0 mA
3
AT24C01A/02/04/08A/16A
0180VSEEPR8/05
Pin Description
SERIAL CLOCK (SCL): The SCL input is used to positive edge clock data into each
EEPROM device and negative edge clock data out of each device.
SERIAL DATA (SDA): The SDA pin is bidirectional for serial data transfer. This pin is
open-drain driven and may be wire-ORed with any number of other open-drain or open-
collector devices.
DEVICE/PAGE ADDRESSES (A2, A1, A0): The A2, A1 and A0 pins are device
address inputs that are hard wired for the AT24C01A and the AT24C02. As many as
eight 1K/2K devices may be addressed on a single bus system (device addressing is
discussed in detail under the Device Addressing section).
The AT24C04 uses the A2 and A1 inputs for hard wire addressing and a total of four 4K
devices may be addressed on a single bus system. The A0 pin is a no connect.
The AT24C08A only uses the A2 input for hardwire addressing and a total of two 8K
devices may be addressed on a single bus system. The A0 and A1 pins are no
connects.
The AT24C16A does not use the device address pins, which limits the number of
devices on a single bus to one. The A0, A1 and A2 pins are no connects.
WRITE PROTECT (WP): The AT24C01A/02/04/08A/16A has a Write Protect pin that
provides hardware data protection. The Write Protect pin allows normal Read/Write
operations when connected to ground (GND). When the Write Protect pin is connected
to V
CC
, the write protection feature is enabled and operates as shown in Table 2.
Table 2. Write Protect
Memory Organization
AT24C01A, 1K SERIAL EEPROM: Internally organized with 16 pages of 8 bytes each,
the 1K requires a 7-bit data word address for random word addressing.
AT24C02, 2K SERIAL EEPROM: Internally organized with 32 pages of 8 bytes each,
the 2K requires an 8-bit data word address for random word addressing.
AT24C04, 4K SERIAL EEPROM: Internally organized with 32 pages of 16 bytes each,
the 4K requires a 9-bit data word address for random word addressing.
AT24C08A, 8K SERIAL EEPROM: Internally organized with 64 pages of 16 bytes each,
the 8K requires a 10-bit data word address for random word addressing.
AT24C16A, 16K SERIAL EEPROM: Internally organized with 128 pages of 16 bytes
each, the 16K requires an 11-bit data word address for random word addressing.
WP Pin
Status
Part of the Array Protected
24C01A
24C02
24C04
24C08A
24C16A
At V
CC
Full (1K)
Array
Full (2K)
Array
Full (4K)
Array
Full (8K)
Array
Full (16K)
Array
At GND
Normal Read/Write Operations
4
AT24C01A/02/04/08A/16A
0180VSEEPR8/05
Note:
1. This parameter is characterized and is not 100% tested.
Note:
1. V
IL
min and V
IH
max are reference only and are not tested.
Table 3. Pin Capacitance
(1)
Applicable over recommended operating range from T
A
= 25
C, f = 1.0 MHz, V
CC
= +1.8V
Symbol
Test Condition
Max
Units
Conditions
C
I/O
Input/Output Capacitance (SDA)
8
pF
V
I/O
= 0V
C
IN
Input Capacitance (A
0
, A
1
, A
2
, SCL)
6
pF
V
IN
= 0V
Table 4. DC Characteristics
Applicable over recommended operating range from: T
AI
=
40
C to +85
C, V
CC
= +1.8V to +5.5V, V
CC
= +1.8V to +5.5V
(unless otherwise noted)
Symbol
Parameter
Test Condition
Min
Typ
Max
Units
V
CC1
Supply Voltage
1.8
5.5
V
V
CC2
Supply Voltage
2.7
5.5
V
V
CC3
Supply Voltage
4.5
5.5
V
I
CC
Supply Current V
CC
= 5.0V
READ at 100 kHz
0.4
1.0
mA
I
CC
Supply Current V
CC
= 5.0V
WRITE at 100 kHz
2.0
3.0
mA
I
SB1
Standby Current V
CC
= 1.8V
V
IN
= V
CC
or V
SS
0.6
3.0
A
I
SB2
Standby Current V
CC
= 2.5V
V
IN
= V
CC
or V
SS
1.4
4.0
A
I
SB3
Standby Current V
CC
= 2.7V
V
IN
= V
CC
or V
SS
1.6
4.0
A
I
SB4
Standby Current V
CC
= 5.0V
V
IN
= V
CC
or V
SS
8.0
18.0
A
I
LI
Input Leakage Current
V
IN
= V
CC
or V
SS
0.10
3.0
A
I
LO
Output Leakage Current
V
OUT
= V
CC
or V
SS
0.05
3.0
A
V
IL
Input Low Level
(1)
0.6
V
CC
x 0.3
V
V
IH
Input High Level
(1)
V
CC
x 0.7
V
CC
+ 0.5
V
V
OL2
Output Low Level V
CC
= 3.0V
I
OL
= 2.1 mA
0.4
V
V
OL1
Output Low Level V
CC
= 1.8V
I
OL
= 0.15 mA
0.2
V
5
AT24C01A/02/04/08A/16A
0180VSEEPR8/05
Note:
1. This parameter is characterized.
Table 5. AC Characteristics
Applicable over recommended operating range from T
AI
=
40
C to +85
C, V
CC
= +1.8V to +5.5V, V
CC
= +2.7V to +5.5V,
CL = 1 TTL Gate and 100 pF (unless otherwise noted)
Symbol
Parameter
1.8-volt
2.7, 5.0-volt
Units
Min
Max
Min
Max
f
SCL
Clock Frequency, SCL
100
400
kHz
t
LOW
Clock Pulse Width Low
4.7
1.2
s
t
HIGH
Clock Pulse Width High
4.0
0.6
s
t
I
Noise Suppression Time
(1)
100
50
ns
t
AA
Clock Low to Data Out Valid
0.1
4.5
0.1
0.9
s
t
BUF
Time the bus must be free before
a new transmission can start
(1)
4.7
1.2
s
t
HD.STA
Start Hold Time
4.0
0.6
s
t
SU.STA
Start Setup Time
4.7
0.6
s
t
HD.DAT
Data In Hold Time
0
0
s
t
SU.DAT
Data In Setup Time
200
100
ns
t
R
Inputs Rise Time
(1)
1.0
0.3
s
t
F
Inputs Fall Time
(1)
300
300
ns
t
SU.STO
Stop Setup Time
4.7
0.6
s
t
DH
Data Out Hold Time
100
50
ns
t
WR
Write Cycle Time
5
5
ms
Endurance
(1)
5.0V, 25
C, Byte Mode
1M
1M
Write
Cycles
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