ChipFind - документация

Электронный компонент: AT24C02B-W1.8-11

Скачать:  PDF   ZIP

Document Outline

1
1
2
3
5
4
SCL
GND
SDA
WP
VCC
1
2
3
4
8
7
6
5
A0
A1
A2
GND
VCC
WP
SCL
SDA
1
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
A0
A1
A2
GND
VCC
WP
SCL
SDA
A0
A1
A2
GND
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
A0
A1
A2
GND
VCC
WP
SCL
SDA
1
2
3
4
8
7
6
5
A0
A1
A2
GND
VCC
WP
SCL
SDA
8-lead SOIC
8-ball dBGA2
8-lead Mini-MAP (MLP 2x3)
8-lead PDIP
5-lead SOT23
Bottom View
Bottom View
8-lead TSSOP
Features
Low-voltage and Standard-voltage Operation
1.8 (V
CC
= 1.8V to 5.5V)
Internally Organized 256 x 8 (2K)
Two-wire Serial Interface
Schmitt Trigger, Filtered Inputs for Noise Suppression
Bidirectional Data Transfer Protocol
1 MHz (5V), 400 kHz (1.8V, 2.5V, 2.7V) Compatibility
Write Protect Pin for Hardware Data Protection
8-byte Page (2K) Write Modes
Partial Page Writes Allowed
Self-timed Write Cycle (5 ms max)
High-reliability
Endurance: 1 Million Write Cycles
Data Retention: 100 Years
8-lead PDIP, 8-lead JEDEC SOIC, 8-lead Mini-MAP (MLP 2x3), 5-lead SOT23,
8-lead TSSOP and 8-ball dBGA2 Packages
Lead-free/Halogen-free
Die Sales: Wafer Form, Waffle Pack and Bumped Wafers
Description
The AT24C02B provides 2048 bits of serial electrically erasable and programmable
read-only memory (EEPROM) organized as 256 words of 8 bits each. The device is
optimized for use in many industrial and commercial applications where low-power
and low-voltage operation are essential. The AT24C02B is available in space-saving
8-lead PDIP, 8-lead JEDEC SOIC, 8-lead Mini-MAP (MLP 2x3)
,
5-lead SOT23, 8-lead
TSSOP, and 8-ball dBGA2 packages and is accessed via a Two-wire serial interface.
In addition, the AT24C02B is available in 1.8V (1.8V to 5.5V) version.
Table 1. Pin Configuration
Pin Name
Function
A0 - A2
Address Inputs
SDA
Serial Data
SCL
Serial Clock Input
WP
Write Protect
NC
No Connect
GND
Ground
VCC
Power Supply
Two-wire
Serial EEPROM
2K (256 x 8)
AT24C02B
5126BSEEPR10/05
2
AT24C02B
5126BSEEPR10/05
Figure 1. Block Diagram
Absolute Maximum Ratings
Operating Temperature..................................55
C to +125C
*NOTICE:
Stresses beyond those listed under "Absolute
Maximum Ratings" may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
Storage Temperature .....................................65
C to +150C
Voltage on Any Pin
with Respect to Ground .................................... 1.0V to +7.0V
Maximum Operating Voltage .......................................... 6.25V
DC Output Current........................................................ 5.0 mA
3
AT24C02B
5126BSEEPR10/05
Pin Description
SERIAL CLOCK (SCL): The SCL input is used to positive edge clock data into each
EEPROM device and negative edge clock data out of each device.
SERIAL DATA (SDA): The SDA pin is bidirectional for serial data transfer. This pin is
open-drain driven and may be wire-ORed with any number of other open-drain or open-
collector devices.
DEVICE/PAGE ADDRESSES (A2, A1, A0): The A2, A1 and A0 pins are device
address inputs that are hard wired for the AT24C02B. As many as eight 2K devices may
be addressed on a single bus system (device addressing is discussed in detail under
the Device Addressing section).
WRITE PROTECT (WP): The AT24C02B has a write protect pin that provides hardware
data protection. The write protect pin allows normal read/write operations when con-
nected to ground (GND). When the write protect pin is connected to V
CC
, the write
protection feature is enabled and operates as shown in Table 2.
Table 2. Write Protect
Memory Organization
AT24C02B, 2K SERIAL EEPROM: Internally organized with 32 pages of 8 bytes each,
the 2K requires an 8-bit data word address for random word addressing.
WP Pin
Status
Part of the Array Protected
24C02B
At V
CC
Full (2K) Array
At GND
Normal Read/Write Operations
4
AT24C02B
5126BSEEPR10/05
Note:
1. This parameter is characterized and is not 100% tested.
Note:
1. V
IL
min and V
IH
max are reference only and are not tested.
Table 3. Pin Capacitance
(1)
Applicable over recommended operating range from T
A
= 25
C, f = 1.0 MHz, V
CC
= +1.8V
Symbol
Test Condition
Max
Units
Conditions
C
I/O
Input/Output Capacitance (SDA)
8
pF
V
I/O
= 0V
C
IN
Input Capacitance (A
0
, A
1
, A
2
, SCL)
6
pF
V
IN
= 0V
Table 4. DC Characteristics
Applicable over recommended operating range from: T
AI
=
40
C to +85C, V
CC
= +1.8V to +5.5V, V
CC
= +1.8V to +5.5V
(unless otherwise noted)
Symbol
Parameter
Test Condition
Min
Typ
Max
Units
V
CC1
Supply Voltage
1.8
5.5
V
V
CC2
Supply Voltage
2.5
5.5
V
V
CC3
Supply Voltage
2.7
5.5
V
V
CC4
Supply Voltage
4.5
5.5
V
I
CC
Supply Current V
CC
= 5.0V
READ at 100 kHz
0.4
1.0
mA
I
CC
Supply Current V
CC
= 5.0V
WRITE at 100 kHz
2.0
3.0
mA
I
SB1
Standby Current V
CC
= 1.8V
V
IN
= V
CC
or V
SS
0.6
3.0
A
I
SB2
Standby Current V
CC
= 2.5V
V
IN
= V
CC
or V
SS
1.4
4.0
A
I
SB3
Standby Current V
CC
= 2.7V
V
IN
= V
CC
or V
SS
1.6
4.0
A
I
SB4
Standby Current V
CC
= 5.0V
V
IN
= V
CC
or V
SS
8.0
18.0
A
I
LI
Input Leakage Current
V
IN
= V
CC
or V
SS
0.10
3.0
A
I
LO
Output Leakage Current
V
OUT
= V
CC
or V
SS
0.05
3.0
A
V
IL
Input Low Level
(1)
0.6
V
CC
x 0.3
V
V
IH
Input High Level
(1)
V
CC
x 0.7
V
CC
+ 0.5
V
V
OL2
Output Low Level V
CC
= 3.0V
I
OL
= 2.1 mA
0.4
V
V
OL1
Output Low Level V
CC
= 1.8V
I
OL
= 0.15 mA
0.2
V
5
AT24C02B
5126BSEEPR10/05
Notes:
1. This parameter is ensured by characterization only.
Table 5. AC Characteristics
Applicable over recommended operating range from T
AI
=
40
C to +85C, V
CC
= +1.8V to +5.5V, CL = 1 TTL Gate and
100 pF (unless otherwise noted)
Symbol
Parameter
1.8, 2.5, 2.7
5.0-volt
Units
Min
Max
Min
Max
f
SCL
Clock Frequency, SCL
400
1000
kHz
t
LOW
Clock Pulse Width Low
1.2
0.4
s
t
HIGH
Clock Pulse Width High
0.6
0.4
s
t
I
Noise Suppression Time
50
40
ns
t
AA
Clock Low to Data Out Valid
0.1
0.9
0.05
0.55
s
t
BUF
Time the bus must be free before a new transmission can start
1.2
0.5
s
t
HD.STA
Start Hold Time
0.6
0.25
s
t
SU.STA
Start Setup Time
0.6
0.25
s
t
HD.DAT
Data In Hold Time
0
0
s
t
SU.DAT
Data In Setup Time
100
100
ns
t
R
Inputs Rise Time
(1)
0.3
0.3
s
t
F
Inputs Fall Time
(1)
300
100
ns
t
SU.STO
Stop Setup Time
0.6
.25
s
t
DH
Data Out Hold Time
50
50
ns
t
WR
Write Cycle Time
5
5
ms
Endurance
(1)
5.0V, 25
C, Byte Mode
1M
Write
Cycles