1
Features
Dual-port Nonvolatile Memory - RFID and Serial Interfaces
Two-wire Serial Interface:
Compatible with a Standard AT24C08 Serial EEPROM
Programmable Access Protection to Limit Reads or Writes from Either Port
Lock/Unlock Function, Coil Connection Detection
RFID Interface:
125 kHz Carrier Frequency for Long Range Access
2-Wire Connection to External Coil Antenna and Tuning Capacitor
Multi-tag Management to Handle Several Tags in the Field at Once
12 RFID Commands for Tag Control and Memory Read/Write
ID Write and Lock from RFID Port
Ultra Low Power Single Bit Write - 25 A
Highly-reliable EEPROM Memory
8K bits (1K bytes), Organized as 8 Blocks of 128 Bytes Each
16-byte Page Write, 10 ms Write Time
10 Years Retention, 100K Write Cycle Endurance
-40C to +85C Operation, 2.4V to 5.5V Supply, 8-Lead JEDEC SOIC Package
Description
The AT24RF08C functions as a dual access EEPROM, with both a wired serial port
and a wireless RFID port used to access the memory. Access permissions are set
from the serial interface side to isolate blocks of memory from improper access. The
RFID interface can be powered solely from the attached coil permitting remote reads
and writes of the device when VCC is not applied.
Block Diagram
Pin Configurations
Pin Name
Function
L1
Coil Connection
L2
Coil Connection
PROT
Protection Input
GND
Ground
SDA
Serial Data,Open Drain I/O
SCL
Serial Clock Input
WP
Write Protect Input
VCC
Supply: 2.4V - 5.5V
Asset
Identification
EEPROM
AT24RF08C
Rev. 1072E09/99
8-Pin SOIC
1
2
3
4
8
7
6
5
L1
L2
PROT
GND
VCC
WP
SCL
SDA
AT24RF08C
2
General Overview
The AT24RF08C is intended to be pin compatible with
standard serial EEPROM devices except for pins 1, 2 and
3, which are address pins in the standard part. Other
exceptions to the AT24C08 Serial EEPROM data sheet are
noted in the "Serial EEPROM Exceptions" section later in
this document. Connection of an external coil antenna and
optional tuning capacitor, normally via a two conductor
wire, is all that is required to complete the RFID hardware
requirements.
Throughout this document, the term "reader" is defined as
the base station that communicates with the chip. Under all
expected conditions, it actually serves as both a reader and
writer. The term `tag' is used to indicate the chip when
operating as an RFID transponder with the coil attached.
All bits are sent to or read from the device, most significant
bit first, in a manner consistent with the AT24C08 Serial
E E P R O M . T h e b i t f i e l d s i n t h i s d o c u m e n t a r e
correspondingly listed with the MSB on the left and the LSB
on the right.
EEPROM Organization
The EEPROM memory is broken up into 8 blocks of 1K
bits (128 bytes) each. Within each block, the memory is
physically organized into 8 pages of 128 bits (16 bytes)
each. In some instances, accesses take place on a 32-bit
(4 byte) word basis. In addition to these 8K bits, there are
two more 128-bit pages that are used to store the access
protection and ID information. There are a total of 8448 bits
of EEPROM memory available on the AT24RF08C.
Access protection (both read and write) is organized on a
block basis for blocks 1 through 7 and on a page and block
basis for block 0. Protection information for these blocks
and pages is stored in one of the additional pages of
EEPROM memory that is addressed separately from the
main data storage array. See "Access Protection" on page
3 for more details.
The ID value (see "ID Configuration" on page 7) is located
in the ID page of the EEPROM, the second of the additional
16 byte pages.
Writes from the serial port may include from one to 16
bytes at a time, depending on the protocol followed by the
bus master. Accesses to the EEPROM from the RFID port
are on either a word (32 bits) or page (128 bits) basis only.
All page accesses must be properly aligned to the internal
EEPROM page.
The EEPROM memory offers an endurance of 100,000
write cycles per byte, with 10 year data retention. Writes to
the EEPROM and tamper bit take less than 10 ms to
complete.
Completion time for writes initiated from the RFID port are
different depending on the situation. When external power
is supplied to the chip through the VCC pin, writes to the
EEPROM and tamper bit take less than 11.8 ms when
measured from the last modulation edge before the write to
the first after the write. When powered from the coil pins at
125 KHz, the EEPROM write time will be 5.8 ms and the
tamper write time will be 7.9 ms.
After manufacturing, all EEPROM bits except in the device
revision byte (see "Access Protection" page 5) will be set to
a value of 1 and the tamper bit will be set to 0.
Device Access
The third device address bit in the two wire protocol that is
usually matched to A
2
(pin 3) on a standard AT24C08 serial
E E P R O M is i n t e r n a l l y c o n n e c t e d h i g h , s o d e v i c e
addresses A8 through AF (hex) are used to access the
memory on the chip. The general command encoding used
by the serial port for EEPROM accesses is shown below in
Device Access Examples, where B
2-0
is the block number,
P
2-0
is the page number within the block and A
3-0
is the byte
address within the page. Bits denoted as "x" are ignored by
the device.
The PROT pin is used as a power good signal. When this
pin is low, the serial port is held in reset and all sticky bits
are set to one. When high, activity on the serial bus is
permitted.
Device Access Examples
For Write Operations:
1 0 1 0 1 B
2
B
1
0
B
0
P
2
P
1
P
0
A
3
A
2
A
1
A
0
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
...
For Read Operations:
1 0 1 0 1 X X 1
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
...
AT24RF08C
3
Access Protection
All access protection bits are stored on a separate page of
the EEPROM that is not accessed using the normal
commands of an AT24C08 memory. See the "Access
Protection Page" section on page 5, for more detail on this
information.
The RFID Access (RF) fields in the Access Protection Page
determines whether or not the corresponding block within
the memory can be read or written via the RFID interface. If
an illegal command is attempted, the command will be
aborted. The MSB, if clear, prohibits all accesses from the
RFID port, and the LSB if clear prohibits writes from the
RFID port. The fields are stored in the EEPROM and
organized as follows:
The Protection Bits (PB) fields in the Access Protection
Page determine what type of accesses will be permitted via
the serial port for each of the blocks on the chip. If an illegal
access is attempted, the command will be NACK'ed. The
MSB, if clear, prohibits all accesses to the block, and the
LSB if clear prohibits writes. The fields are stored in the
EEPROM and are organized as follows:
The Tamper Write (TW) bits within the access protection
page control whether or not a write will be permitted into
the corresponding block of memory when the Tamper Bit is
set. If the Tamper Bit is a 1 and the TW bit is a 0, then
writes to that block from the RFID port are not permitted. In
all other cases, writes are permitted according to the RF
field value for that block. The value of this bit does not affect
accesses from the serial port.
Accessed within the Access Pro tection Page is an
individual CMOS Sticky Bit (SB) for each of the 8 blocks on
the device. When the value of the sticky bit is 0, the
Protection Bits (PB) for the corresponding block may not be
changed via the software. These bits are all set to one
when power is initially applied or when the PROT pin is low.
These sticky bits may be written only to a 0 via the serial
interface using the standard serial write operations.
Reading the sticky bits does not affect their state.
Because access permissions are set individually for each
of the blocks, all reads via the serial port will only read
bytes within the block that was specified when the current
a d d re s s w a s l a t c h e d i n t o th e d e v i c e (w i t h a w r i t e
command). The block address bits (B
2
or B
1
) that are sent
with the write command are ignored on a read command.
After the read of the last byte within a block, the internal
serial address wraps around to point at the beginning of
that block. After the write of the last byte in a page, the
internal address is wrapped around to point to the
beginning of that page. If more than 16 bytes are sent to
the device with a write command, the data written to any
overlapping bytes will be corrupted.
If the WP pin is high, all write operations are prohibited
from the serial port, although write commands may be used
to set the address for a subsequent read command.
Block 0 Write Protection Bits
The AT24RF08C provides a mechanism to divide block 0
into eight 128-bit (16 byte) pages that can be individually
protected against writes from either port. These eight write
protection (WP) bits are stored within a byte of the access
protection page and are organized such that the LSB
protects the first 128 bits and so on. If a bit in this byte is set
to a one and the PB
0
field is set to 11, then writes are
permitted on the page corresponding to the WP bit. If the
WP bit is set to a 0 or the PB
0
is any value other than 11,
then writes are not permitted in that page.
The Write Protection hierarchy for serial accesses is shown
on the following page. In this drawing the bits within the
boxes to the left of the arrows are the only thing that
determine whether or not the bit in the box to the right of
the arrow can be written. Read access control is not shown
in this diagram. Addresses listed in this diagram are for the
serial port assuming that the R/W bit in the command byte
is set to 0.
RFID Access Fields (RF)
MSB
LSB
Function
0
0
No accesses permitted from RFID port
0
1
No accesses permitted from RFID port
1
0
Reads only from the RFID port
1
1
No restrictions for RFID accesses
Protection Bits (PB)
MSB
LSB
Function
0
0
No accesses permitted in the block
0
1
No accesses permitted in the block
1
0
Read only, writes cause a NACK
1
1
Read/write - No access constraints for
data within this block
AT24RF08C
4
For example, when SB1 is a 1, the PB1 field can be written
to any value by the system. When the PB1 field is 11, Block
1 can be written by the system. Note that the state of the
SB1 bit does not affect whether or not Block 1 can be
written.
There is no individual page Write Protection for any other
block other than block 0 within the device. Within the
remaining blocks on the chip, access permissions are con-
trolled on a block basis (PB or RF bits) or full chip basis
(WP pin) only.
Write Protection Flow
EEPROM Tamper Latch
There is an additional EEPROM tamper latch that can be
set from the RFID port and reset from the serial port of the
device. Resetting this bit from the serial port takes less
than 10 ms. Setting of this bit from the RFID side when
powered from L1/L2, takes about 7.9 ms but requires less
than 30 A of current. See "RFID Command" on page 8.
Access to this tamper bit from the serial interface is via the
LSB of the tamper byte of the access protection page. See
"Access Protection Page" below. The bit can only be set to
0 via the serial port. Attempts to write it to a value of one
are ignored.
AT24RF08C
5
Access Protection Page
The serial port may be used to read and write the Access
Protection Page (APP) and ID Page using device access
codes of B8 and B9 (hex) instead of the normal value of A8
through AF (hex) that are used to access the rest of the
EEPROM memory. The second byte of write commands
(the word address) should be in the range of 00 through 0f
(hex) for the APP page and 10 through 1F (hex) for the ID
page. This coding is shown below.
Reads and writes to these two pages may take place on a
single byte basis only. Multi-byte operations will be
NACK'ed.
As an example, the bit encoding for a single byte read and
write command are shown below.
The AT24RF08C will acknowledge all device addresses of
B8 or B9 (hex). If the most significant three bits of the word
address are not all 0 (indicating an address outside the
Access Protection and ID pages), the chip will NACK the
access.
Bytes 0 through 7 of the APP contain 8 identical sets of
access control fields (PBx, RFx, TWx and SBx) for each of
the eight blocks of memory on the chip, which operate
according to the table listed in the Access Protection sec-
tion above. When the sticky bit in one of these bytes is set,
that byte can be written by the system. Once a sticky bit is
reset (written to zero) by the software, the byte containing it
can no longer be modified by the software until the next
power cycle. These bytes can always be read by the sys-
tem.
Byte 8 contains another PB field (PB
AP
) as bits 0 and 1 and
an additional sticky bit (SB
AP
) as bit 7. The value of the
PB
AP
bits controls read and write access to the last 7 bytes
(#9-15) of the APP and all 16 bytes of the ID page
according to the encoding listed in the "Access Protection"
section above. The value of the PB
AP
bits can only be
changed (via writes from the serial port) when SB
AP
is high.
This byte can always be read by the system. Bits 0 through
6 of this byte are stored in EEPROM memory and do not
change when the power is cycled or the PROT pin changes
state.
Byte 9 contains the 8 block 0 write protection bits (WP) for
each page within block 0.
Byte 10 is the tamper byte, and the LSB of this byte can be
used to determine if the "set tamper" command had been
executed from the RFID port. This bit can be reset in
software via the serial port by writing a 0 to it.
Byte 10 also contains the coil detection control. This
feature is intended to permit the system to determine if a
coil is connected to the pins. It works by driving a small
current through the coil pins and determining if there is a
low resistance between them. The coil resistance must be
less than R
COIL
for the coil to be properly detected. To
enable this, the Detect Enable (DE) bit should be set to a 1.
After a delay of at least 200 s, the Detect Coil (DC) bit is
then read and a "1" indicates that a coil is present.
Note that the RFID interface may not function properly
when the DE bit is set to a 1, and so the software should
ensure that it is always written to a 0 when the coil
d e te c tio n s e q u e n c e h a s c o m p l e t e d . T h e DE bi t i s
automatically reset to a 0 upon power-up or when PROT is
held low, but is not timed out internally by the device.
When the DE bit is low, the value of the DC bit will default
to a high state. This does not indicate the presence of a
coil, as the state of the DC bit is only valid when the DE bit
is high.
Bytes 11 through 14 are currently reserved and should not
be used by the system. Byte 14 may not be written by the
device (via either interface) at any time.
Access Protection Page Examples
For Write Operations:
1 0 1 1 1 0 0 0
0 0 0 A
4
A
3
A
2
A
1
A
0
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
For Read Operations:
1 0 1 1 1 0 0 1
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
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