1
4-Megabit
(256K x 16 or
512K x 8)
Unregulated
Battery-Voltage
TM
High Speed
OTP EPROM
AT27BV400
Preliminary
Features
Fast Read Access Time - 120 ns
Word-wide or Byte-wide Configurable
Dual Voltage Range Operation
Unregulated Battery Power Supply Range, 2.7V to 3.6V
or Standard 5V
10% Supply Range
4-Megabit Flash and Mask ROM Compatable
Low Power CMOS Operation
20
A Maximum Standby
10 mA Max. Active at 5 MHz for V
CC
= 3.6V
JEDEC Standard Packages
44-Lead PLCC
44-Lead SOIC (SOP)
48-Lead TSOP (12 mm x 20 mm)
High Reliability CMOS Technology
2,000 ESD Protection
200 mA Latchup Immunity
Rapid
TM
Programming Algorithm - 50
s/word (typical)
CMOS and TTL Compatible Inputs and Outputs
JEDEC Standard for LVTTL and LVBO
Integrated Product Identification Code
Commercial and Industrial Temperature Ranges
Description
The AT27BV400 is a high performance low-power, low-voltage 4,194,304-bit one time
programmable read only memory (OTP EPROM) organized as either 256K by 16 or
512K by 8 bits. It requires only one supply in the range of 2.7 to 3.6V in normal read
Rev. 0989A03/98
Pin Configurations
Pin Name
Function
A0 - A17
Addresses
O0 - O15
Outputs
O15/A-1
Output/Address
BYTE/V
PP
Byte Mode/
Program Supply
CE
Chip Enable
OE
Output Enable
NC
No Connect
TSOP
Type 1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
A15
A14
A13
A12
A11
A10
A9
A8
NC
NC
NC
NC
NC
NC
NC
NC
A17
A7
A6
A5
A4
A3
A2
A1
A16
BYTE/VPP
GND
015/A-1
O7
O14
O6
O13
O5
O12
O4
VCC
O11
O3
O10
O2
O9
O1
O8
O0
OE
GND
CE
A0
SOIC (SOP)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
NC
NC
A17
A7
A6
A5
A4
A3
A2
A1
A0
CE
GND
OE
O0
O8
O1
O9
O2
O10
O3
O11
NC
NC
A8
A9
A10
A11
A12
A13
A14
A15
A16
BYTE/VPP
GND
015/A-1
O7
O14
O6
O13
O5
O12
O4
VCC
(continued)
AT27BV400
Preliminary
PLCC
7
8
9
10
11
12
13
14
15
16
17
39
38
37
36
35
34
33
32
31
30
29
A4
A3
A2
A1
A0
CE
GND
OE
O0
O8
O1
A12
A13
A14
A15
A16
BYTE/VPP
GND
O15/A-1
07
O14
O6
6
5
4
3
2
1
44
43
42
41
40
18
19
20
21
22
23
24
25
26
27
28
O9
O2
O10
O3
O11
NC
VCC
O4
O12
O5
O13
A5
A6
A7
A17
NC
GND
NC
A8
A9
A10
A11
AT27BV400
2
mode operation. The by-16 organization makes this part
ideal for portable and hand held 16- and 32-bit micropro-
cessor systems using either regulated or unregulated bat-
tery power.
Atmel's innovative design techniques provide fast speeds
that rival 5V parts while keeping the low power consump-
tion of a 3V supply. At V
CC
= 2.7V, any word can be
accessed in less than 120ns. With a typical power dissipa-
tion of only 10 mW at 5mHZ and V
CC
= 3V, the AT27BV400
consumes less than one fifth the power of a standard 5V
EPROM.
Standby mode supply current is typically less than 1 mA at
3V. The AT27BV40 0 simplifies system d esign an d
stretches battery lifetime even further by eliminating the
need for power supply regulation.
The AT27BV400 can be organized as either word-wide or
byte-wide. The organization is selected via the BYTE/V
PP
pin. When BYTE/V
PP
is asserted high (V
IH
), the word-wide
organization is selected and the O15/A-1 pin is used for
O15 data output. When BYTE/V
PP
is asserted low (V
IL
),the
byte wide organization is selected and the O15/A-1 pin is
used for the address pin A-1. When the AT27BV400 is logi-
cally regarded as x16 (word-wide), but read in the byte-
wide mode, then with A-1= V
IL
the lower 8 bits of the 16-bit
word are selected with A-1 = V
IH
the upper 8 bits of the 16-
bit word are selected.
The AT27BV400 is available in industry standard JEDEC-
approved one-time programmable (OTP) PLCC, SOIC
(SOP), and TSOP packages. The device features two-line
control(CE,OE) to eliminate bus contention.
With high density 256K word or 512K byte storage capabil-
ity, the AT27BV400 allows firmware to be to be stored reli-
ably and to be accessed by the system without the delays
of mass storage media.
The AT27BV400 operating with V
CC
at 3.0V produces TTL
level outputs that are compatible with standard TTL logic
devices operating at V
CC
= 5V. At V
CC
= 2.7V, the part is
compatible with JEDEC approved low voltage battery oper-
ation (LVBO) interface specifications. The device is also
capable of standard 5-volt operation making it ideally suited
for dual supply range systems or card products that are
pluggable in both 3-volt and 5-volt hosts.
Atmel's AT27BV400 has additional features that ensure
high quality and efficient production use. The Rapid
TM
Pro-
gramming Algorithm reduces the time required to program
the part and guarantees reliable programming. Program-
ming time is typically only 50
s/word. The Integrated Prod-
uct Identification Code electronically identifies the device
and manufacturer. This feature is used by industry standard
programming equipment to select the proper programming
equipment and voltages. The AT27BV400 programs
exactly the same way as a standard 5V AT27C400 and
uses the same programming equipment.
System Considerations
Switching between active and standby conditions via the
Chip Enable pin may produce transient voltage excursions.
Unless accommodated by the system design, these tran-
sients may exceed data sheet limits, resulting in device
non-conformance. At a minimum, a 0.1
F high frequency,
low inherent inductance, ceramic capacitor should be uti-
lized for each device. This capacitor should be connected
between the V
CC
and Ground terminals of the device, as
close to the device as possible. Additionally, to stabilize the
supply voltage level on printed circuit boards with large
EPROM arrays, a 4.7
F bulk electrolytic capacitor should
be utilized, again connected between the V
CC
and Ground
terminals. This capacitor should be positioned as close as
possible to the point where the power supply is connected
to the array.
Block Diagram
AT27BV400
3
Notes:
1. X can be V
IL
or V
IH.
2. Read, output disable, and standby modes require, 2.7V
V
CC
3.6V, or 4.5V
V
CC
5.5V.
3. Refer to the programming characteristics tables in this data sheet.
4. V
H
= 12.0
0.5V.
5. Two identifier words may be selected. All Ai inputs are held low (V
IL
) except A9,which is set to V
H
, and A0, which is toggled
low (V
IL
) to select the Manufacturer's Identification word and high (V
IH
) to select the Device Code word.
6. Standby V
CC
current (I
SB
) is specified with V
PP
= V
CC
. V
CC
> V
PP
will cause a slight increase in I
SB.
Absolute Maximum Ratings*
Temperature Under Bias ................................ -55
C to +125
C
*NOTICE:
Stresses beyond those listed under "Absolute
Maximum Ratings" may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
Note:
1.
Minimum voltage is -0.6V DC which undershoot
to -2.0V for pulses of less than 20 ns. Maximum
output pin voltage is Vcc + 0.75V DC which may
overshoot to + 7.0V for pulses of less than 20 ns.
Storage Temperature ..................................... -65
C to +150
C
Voltage on Any Pin with
with Respect to Ground ..................................-2.0V to +7.0V
(1)
Voltage on A9 with
Respect to Ground ......................................-2.0V to +14.0V
(1)
V
PP
Supply Voltage with
Respect to Ground .......................................-2.0V to +14.0V
(1)
Operating Modes
Mode/Pin
CE
OE
Ai
BYTE/V
PP
Outputs
O
0
-O
7
O
8
-O
14
O
15
/A-1
Read Word-wide
V
IL
V
IL
X
(1)
V
IH
D
OUT
D
OUT
D
OUT
Read Byte-wide Upper
V
IL
V
IL
X
(1)
V
IL
D
OUT
High Z
V
IH
Read Byte-wide Lower
V
IL
V
IL
X
(1)
V
IL
D
OUT
High Z
V
IL
Output Disable
X
(1)
V
IH
X
(1)
X
High Z
Standby
V
IH
X
(1)
X
(1)
X
(6)
High Z
Rapid Program
(3)
V
IL
V
IH
Ai
V
PP
D
IN
PGM Verify
X
V
IL
Ai
V
PP
D
OUT
PGM Inhibit
V
IH
V
IH
X
(1)
V
PP
High Z
Product Identification
(5)
V
IL
V
IL
A9 = V
H
(4)
A0 = V
IH
or V
IL
A1 - A17 = V
IL
V
IH
Identification Code
AT27BV400
4
Notes:
1. V
CC
must be applied simultaneously or before V
PP
, and removed simultaneously or after V
PP
.
2. V
PP
may be connected directly to V
CC
except during programming. The supply current would then be the sum of I
CC
and I
PP
.
DC and AC Operating Conditions for Read Operation
AT27BV400
-12
-15
Operating Temperature (Case)
Com.
0
C - 70
C
0
C - 70
C
Ind.
-40
C - 85
C
-40
C - 85
C
V
CC
Power Supply
2.7V to 3.6V
2.7V to 3.6V
5V
10%
5V
10%
DC and Operating Characteristics for Read Operation
Symbol
Parameter
Condition
Min
Max
Units
V
CC
= 2.7V to 3.6V
I
LI
Input Load Current
V
IN
= 0V to V
CC
1
A
I
LO
Output Leakage Current
V
OUT
= 0V to V
CC
5
A
I
PP1
(2)
V
PP
(1)
Read/Standby Current
V
PP
= V
CC
10
A
I
SB
V
CC
(1)
Standby Current
I
SB1
(CMOS), CE = V
CC
0.3V
20
A
I
SB2
(TTL), CE = 2.0 to V
CC
+ 0.5V
100
A
I
CC
V
CC
Active Current
f = 5MHz, I
OUT
= 0 mA, CE = V
IL
, V
CC
= 3.6V
10
mA
V
IL
Input Low Voltage
V
CC
= 3.0 to 3.6V
-0.6
0.8
V
V
CC
= 2.7 to 3.6V
-0.6
0.2 x V
CC
V
V
IH
Input High Voltage
V
CC
= 3.0 to 3.6V
2.0
V
CC
+ 0.5
V
V
CC
= 2.7 to 3.6V
0.7 x V
CC
V
CC
+ 0.5
V
V
OL
Output Low Voltage
I
OL
= 2.0 mA
0.4
V
I
OL
= 100
A
0.2
V
I
OL
= 20
A
0.1
V
V
OH
Output High Voltage
I
OH
= -2.0 mA
2.4
V
I
OH
= -100
A
V
CC
- 0.2
V
I
OH
= -20
A
V
CC
- 0.1
V
V
CC
= 4.5V to 5.5V
I
LI
Input Load Current
V
IN
= 0V to V
CC
1
A
I
LO
Output Leakage Current
V
OUT
= 0V to V
CC
5
A
I
PP1
(2)
V
PP
(1)
Read/Standby Current
V
PP
= V
CC
10
A
I
SB
V
CC
(1)
Standby Current
I
SB1
(CMOS), CE = V
CC
0.3V
100
A
I
SB2
(TTL), CE = 2.0 to V
CC
+ 0.5V
1
mA
I
CC
V
CC
Active Current
f = 5 MHz, I
OUT
= 0 mA, CE = V
IL
40
mA
V
IL
Input Low Voltage
-0.6
0.8
V
V
IH
Input High Voltage
2.0
V
CC
+ 0.5
V
V
OL
Output Low Voltage
I
OH
= 2.1 mA
0.4
V
V
OH
Output High Voltage
I
OH
= -400
A
2.4
V
AT27BV400
5
Notes:
1. 2,3,4,5. See the AC Waveforms for Read Operation diagram.
Byte-Wide Read Mode AC Waveforms
Note:
BYTE/V
PP
= V
IL
Word-Wide Read Mode AC Waveforms
Note:
BYTE/V
PP
= V
IH
AC Characteristics for Read Operation
V
CC
= 2.7V to 3.6V and 4.5V to 5.5V
Symbol
Parameter
Condition
AT27BV400
Units
-12
-15
Min
Max
Min
Max
t
ACC
(2)
Address to Output Delay
CE = OE = V
IL
120
150
ns
t
CE
(2)
CE to Output Delay
OE = V
IL
120
150
ns
t
OE
(2)(3)
OE to Output Delay
CE = V
IL
40
50
ns
t
DF
(4)(5)
OE or CE High to Output Float, whichever
occured first
30
35
ns
t
OH
(4)
Output Hold from Address CE or OE,
whichever occured first
5
5
ns
t
ST
BYTE High to Output Valid
120
150
ns
t
STD
BYTE Low to Output Transition
50
60
ns
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