ATF16V8CZ
High
Performance
E
2
PLD
ATF16V8CZ
Pin Configurations
Pin Name
Function
CLK
Clock
I
Logic Inputs
I/O
Bidirectional Buffers
OE
Output Enable
VCC
+5V Supply
Features
Industry Standard Architecture
Emulates Many 20-Pin PALs
Low Cost Easy-to-Use Software Tools
High Speed Electrically Erasable Programmable Logic Devices
12 ns Maximum Pin-to-Pin Delay
Low Power - 25
A Standby Power
CMOS and TTL Compatible Inputs and Outputs
Input and I/O Pin Keeper Circuits
Advanced Flash Technology
Reprogrammable
100% Tested
High Reliability CMOS Process
20 Year Data Retention
100 Erase/Write Cycles
2,000V ESD Protection
200 mA Latchup Immunity
Commercial and Industrial Temperature Ranges
Dual Inline and Surface Mount Packages in Standard Pinouts
Block Diagram
GND
I/O I/O
I8
Vcc
I/CLK
I/O
I2 I1
1
11
16
6
GND
15
16
17
18
19
20
14
13
10
9
8
7
6
5
4
3
2
1
Vcc
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I9/OE
I/CLK
I1
I2
I3
I4
I5
I6
I7
I8
I/O
I/O
I/O
I/O
I/O
I3
I4
I5
I6
I7
I9/OE
12
11
DIP/SOIC
PLCC
Top view
Rev. 0453C/V16FZ-C04/98
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
I/CLK
I1
I2
I3
I4
I5
I6
I7
I8
GND
V
CC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I9/OE
TSSOP Top View
Temperature Under Bias................... -40C to +85C
Storage Temperature...................... -65C to +150C
Voltage on Any Pin with
Respect to Ground......................... -2.0V to +7.0V
(1)
Voltage on Input Pins
with Respect to Ground
During Programming.................... -2.0V to +14.0V
(1)
Programming Voltage with
Respect to Ground....................... -2.0V to +14.0V
(1)
*NOTICE: Stresses beyond those listed under "Absolute Maxi-
mum Ratings" may cause permanent damage to the device.
This is a stress rating only and functional operation of the
device at these or any other conditions beyond those indi-
cated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions
for extended periods may affect device reliability.
Absolute Maximum Ratings*
Note:
1. Minimum voltage is -0.6V dc, which may undershoot to -
2.0V for pulses of less than 20 ns. Maximum output pin
voltage is Vcc + 0.75V dc, which may overshoot to 7.0V
for pulses of less than 20 ns.
DC and AC Operating Conditions
Commercial
Industrial
Operating Temperature (Case)
0C - 70C
-40C - 85C
V
CC
Power Supply
5V
5%
5V
10%
The ATF16V8CZ is a high performance EECMOS Pro-
grammable Logic Device which utilizes Atmel's proven
electrically erasable Flash memory technology. Speeds
down to 12 ns and a 25
A edge-sensing power down
mode are offered. All speed ranges are specified over the
full 5V
10% range for industrial temperature ranges; 5V
5% for commercial range 5-volt devices.
The ATF16V8CZ incorporates a superset of the generic
architectures, which allows direct replacement of the 16R8
family and most 20-pin combinatorial PLDs. Eight outputs
are each allocated eight product terms. Three different
modes of operation, configured automatically with soft-
ware, allow highly complex logic functions to be realized.
The ATF16V8CZ can significantly reduce total system
power, thereby enhancing system reliability and reducing
power supply costs. When all the inputs and internal
nodes are not switching, supply current drops to less than
2 5
A. This automatic power down feature allows for
power savings in slow clock systems and asynchronous
applications. Also, the pin keeper circuits eliminate the
need for internal pull-up resistors along with their atten-
dant power consumption.
Description (Continued)
2
ATF16V8CZ
DC Characteristics
Symbol Parameter
Condition
Min
Typ
Max
Units
I
IL
Input or I/O Low
Leakage Current
0
V
IN
V
IL
(MAX)
-10
A
I
IH
Input or I/O High
Leakage Current
3.5
V
IN
V
CC
10
A
I
CC1
Power Supply Current
15 MHz, V
CC
= MAX,
V
IN
= 0, V
CC,
Outputs
Open
Com.
95
mA
Ind.
105
mA
I
CC
(1)
Power Supply Current,
Standby Mode
MHz, V
CC
= MAX,
V
IN
= 0, V
CC,
Outputs
Open
Com.
5
25
A
Ind.
5
50
A
I
OS
Output Short Circuit
Current
V
OUT
= 0.5V; V
CC
=
5V; TA = 25C
-150
mA
V
IL
Input Low Voltage
MIN < V
CC
< MAX
-0.5
0.8
V
V
IH
Input High Voltage
2.0
V
CC
+ 1
V
V
OL
Output Low Current
V
CC
= MIN; All Outputs
I
OL
= -16 mA
Com., Ind.
0.5
V
V
OH
Output High Current
V
CC
= MIN
I
OL
= -3.2 mA
2.4
V
I
OL
Output Low Current
V
CC
= MIN
Com.
24
mA
Ind.
12
I
OH
Output High Current
V
CC
= MIN
Com., Ind.
4
mA
Note: 1. All
I
CC
parameters measured with outputs open.
AC Waveforms
(1)
Note:
1. Timing measurement reference is 1.5V. Input AC driving levels are 0.0V and 3.0V, unless otherwise specified.
ATF16V8CZ
3
AC Characteristics
Symbol
Parameter
-12
-15
Min
Max
Min
Max
Units
t
PD
Input or Feedback to Non-Registered Output
3
12
3
15
ns
t
CF
Clock to Feedback
6
8
ns
t
CO
Clock to Output
2
8
2
10
ns
t
S
Input or Feedback Setup Time
10
12
ns
t
H
Input Hold Time
0
0
ns
t
P
Clock Period
12
16
ns
t
W
Clock Width
6
8
ns
F
MAX
External Feedback 1/(t
S
+ t
CO
)
55
45
MHz
Internal Feedback 1/(t
S
+ t
CF
)
62
50
MHz
No Feedback 1/(t
P
)
83
62
MHz
t
EA
Input to Output Enable --
Product Term
3
12
3
15
ns
t
ER
Input to Output Disable --
Product Term
2
15
2
15
ns
t
PZX
OE pin to Output Enable
2
12
2
15
ns
t
PXZ
OE pin to Output Disable
1.5
12
1.5
15
ns
4
ATF16V8CZ
Power Up Reset
The ATF16V8CZ's registers are designed to reset during
power up. At a point delayed slightly from V
CC
crossing
V
RST
, all registers will be reset to the low state. As a result,
the registered output state will always be high on power-
up.
This feature is critical for state machine initialization. How-
ever, due to the asynchronous nature of reset and the un-
certainty of how V
CC
actually rises in the system, the fol-
lowing conditions are required:
1) The V
CC
rise must be monotonic, from below .7 volts,
2) After reset occurs, all input and feedback setup times
must be met before driving the clock term high, and
3) The signals from which the clock is derived must re-
main stable during t
PR
.
Parameter Description
Typ
Max
Units
t
PR
Power-Up
Reset Time
600
1,000
ns
V
RST
Power-Up
Reset
Voltage
3.8
4.5
V
Output Test Loads
Note:
Similar devices are tested with slightly different loads.
These load differences may affect output signals' delay and
slew rate. Atmel devices are tested with sufficient margins
to meet compatible devices.
Input Test Waveforms and
Measurement Levels:
t
R
, t
F
< 1.5 ns (10% to 90%)
Pin Capacitance
(f = 1 MHz, T = 25C)
(1)
Typ
Max
Units
Conditions
C
IN
5
8
pF
V
IN
= 0V
C
OUT
6
8
pF
V
OUT
= 0V
Note:
1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.
ATF16V8CZ
5
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