1
MPC508A, 509A
FUNCTIONAL DIAGRAMS
Single-Ended 8-Channel/Differential 4-Channel
CMOS ANALOG MULTIPLEXERS
The MPC508A and MPC509A are fabricated with
Burr-Brown's dielectrically isolated CMOS technol-
ogy. The multiplexers are available in plastic DIP and
plastic SOIC packages. Temperature range is 40
C to
+85
C.
FEATURES
q
ANALOG OVERVOLTAGE PROTECTION:
70Vp-p
q
NO CHANNEL INTERACTION DURING
OVERVOLTAGE
q
BREAK-BEFORE-MAKE SWITCHING
q
ANALOG SIGNAL RANGE:
15V
q
STANDBY POWER: 7.5mW typ
q
TRUE SECOND SOURCE
Level
Shift
1k
1k
1k
Overvoltage
Clamp and
Signal
Isolation
5V
Ref
Decoder/
Driver
NOTE: (1) Digital
Input Protection.
In 1A
In 1B
In 4B
MPC509A
A
0
A
1
EN
Out A
1k
In 4A
Out B
(1) (1)
(1)
The MPC508A is an 8-channel single-ended analog
multiplexer and the MPC509A is a 4-channel differen-
tial multiplexer.
The MPC508A and MPC509A multiplexers have in-
put overvoltage protection. Analog input voltages may
exceed either power supply voltage without damaging
the device or disturbing the signal path of other chan-
nels. The protection circuitry assures that signal fidel-
ity is maintained even under fault conditions that
would destroy other multiplexers. Analog inputs can
withstand 70Vp-p signal levels and standard ESD
tests. Signal sources are protected from short circuits
should multiplexer power loss occur; each input pre-
sents a 1k
resistance under this condition. Digital
inputs can also sustain continuous faults up to 4V
greater than either supply voltage.
These features make the MPC508A and MPC509A
ideal for use in systems where the analog signals
originate from external equipment or separately pow-
ered sources.
DESCRIPTION
MPC508A
MPC509A
Level
Shift
1k
1k
1k
Overvoltage
Clamp and
Signal
Isolation
5V
Ref
Decoder/
Driver
NOTE: (1) Digital
Input Protection.
In 1
In 2
In 8
MPC508A
A
0
A
1
A
2
EN
(1)
Out
(1)
(1)
(1)
International Airport Industrial Park Mailing Address: PO Box 11400, Tucson, AZ 85734 Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 Tel: (520) 746-1111 Twx: 910-952-1111
Internet: http://www.burr-brown.com/ FAXLine: (800) 548-6133 (US/Canada Only) Cable: BBRCORP Telex: 066-6491 FAX: (520) 889-1510 Immediate Product Info: (800) 548-6132
MPC509
MPC508
1988 Burr-Brown Corporation
PDS-775E
Printed in U.S.A. March, 1998
2
MPC508A, 509A
SPECIFICATIONS
ELECTRICAL
Supplies = +15V, 15V; V
AH
(Logic Level High) = +4.0V, V
AL
(Logic Level Low) = +0.8V, unless otherwise specified.
MPC508A/509A
PARAMETER
TEMP
MIN
TYP
MAX
UNITS
ANALOG CHANNEL CHARACTERISTICS
V
S
, Analog Signal Range
Full
15
+15
V
R
ON
, On Resistance
(1)
+25
C
1.3
1.5
k
Full
1.5
1.8
k
I
S
(OFF), Off Input Leakage Current
+25
C
0.5
nA
Full
10
nA
I
D
(OFF), Off Output Leakage Current
+25
C
0.2
nA
MPC508A
Full
5
nA
MPC509A
Full
5
nA
I
D
(OFF) with Input Overvoltage Applied
(2)
+25
C
4.0
nA
Full
A
I
D
(ON), On Channel Leakage Current
+25
C
2
nA
MPC508A
Full
10
nA
MPC509A
Full
10
nA
I
DIFF
Differential Off Output Leakage Current
(MPC509A Only)
Full
10
nA
DIGITAL INPUT CHARACTERISTICS
V
AL
, Input Low Threshold Drive
Full
0.8
V
V
AH
, Input High Threshold
(3)
Full
4.0
V
I
A
, Input Leakage Current (High or Low)
(4)
Full
1.0
A
SWITCHING CHARACTERISTICS
t
A
, Access Time
+25
C
0.5
s
Full
0.6
s
t
OPEN
, Break-Before-Make Delay
+25
C
25
80
ns
t
ON
(EN), Enable Delay (ON)
+25
C
200
ns
Full
500
ns
t
OFF
(EN), Enable Delay (OFF)
+25
C
250
ns
Full
500
ns
Settling Time (0.1%)
+25
C
1.2
s
(0.01%)
+25
C
3.5
s
"OFF Isolation"
(5)
+25
C
50
68
dB
C
S
(OFF), Channel Input Capacitance
+25
C
5
pF
C
D
(OFF), Channel Output Capacitance: MPC508A
+25
C
25
pF
MPC509A
+25
C
12
pF
C
A
, Digital Input Capacitance
25
C
5
pF
C
DS
(OFF), Input to Output Capacitance
+25
C
0.1
pF
POWER REQUIREMENTS
P
D
, Power Dissipation
Full
7.5
mW
I+, Current Pin 1
(6)
Full
0.7
1.5
mA
I, Current Pin 27
(6)
Full
5
20
A
NOTES: (1) V
OUT
=
10V, I
OUT
= 100
A. (2) Analog overvoltage =
33V. (3) To drive from DTL/TTL circuits. 1k
pull-up resistors to +5.0V supply are recommended.
(4) Digital input leakage is primarily due to the clamp diodes. Typical leakage is less than 1nA at 25
C. (5) V
EN
= 0.8V, R
L
= 1k
, C
L
= 15pF, V
S
= 7Vrms, f = 100kHz.
Worst-case isolation occurs on channel 4 due to proximity of the output pins. (6) V
EN
, V
A
= 0V or 4.0V.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN
assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are subject
to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not
authorize or warrant any BURR-BROWN product for use in life support devices and/or systems.
3
MPC508A, 509A
PIN CONFIGURATIONS
TRUTH TABLES
"ON"
A
2
A
1
A
0
EN
CHANNEL
X
X
X
L
None
L
L
L
H
1
L
L
H
H
2
L
H
L
H
3
L
H
H
H
4
H
L
L
H
5
H
L
H
H
6
H
H
L
H
7
H
H
H
H
8
MPC508A
MPC509A
"ON"
CHANNEL
A
1
A
0
EN
PAIR
X
X
L
None
L
L
H
1
L
H
H
2
H
L
H
3
H
H
H
4
ORDERING INFORMATION
TEMPERATURE
PRODUCT
PACKAGE
RANGE
DESCRIPTION
MPC508AP
16-Pin Plastic DIP
40
C to +85
C
8-Channel
Single-Ended
MPC508AU
16-Pin Plastic SOIC
40
C to +85
C
8-Channel
Single-Ended
MPC509AP
16-Pin Plastic DIP
40
C to +85
C
4-Channel
Differential
MPC509AU
16-Pin Plastic SOIC
40
C to +85
C
4-Channel
Differential
Voltage between supply pins ............................................................... 44V
V+ to ground ........................................................................................ 22V
V to ground ........................................................................................ 25V
Digital input overvoltage V
EN
, V
A
:
V
SUPPLY
(+) ................................................... +4V
V
SUPPLY
() .................................................... 4V
or 20mA, whichever occurs first.
Analog input overvoltage V
S
:
V
SUPPLY
(+) ................................................ +20V
V
SUPPLY
() ................................................. 20V
Continuous current, S or D ............................................................... 20mA
Peak current, S or D
(pulsed at 1ms, 10% duty cycle max) ............................................ 40mA
Power dissipation
(2)
.......................................................................... 1.28W
Operating temperature range ............................................ 40
C to +85
C
Storage temperature range ............................................. 65
C to +150
C
NOTE: (1) Absolute maximum ratings are limiting values, applied individu-
ally, beyond which the serviceability of the circuit may be impaired. Func-
tional operation under any of these conditions is not necessarily implied.
(2) Derate 1.28mW/
C above T
A
= +70
C.
ABSOLUTE MAXIMUM RATINGS
(1)
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
A
0
En
V
SUPPLY
In 1
In 2
In 3
In 4
Out
A
1
A
2
Ground
+V
SUPPLY
In 5
In 6
In 7
In 8
Top View
MPC508A (Plastic)
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
A
0
En
V
SUPPLY
In 1A
In 2A
In 3A
In 4A
Out A
A
1
Ground
+V
SUPPLY
In 1B
In 2B
In 3B
In 4B
Out B
Top View
MPC509 A (Plastic)
PACKAGE DRAWING
PRODUCT
PACKAGE
NUMBER
(1)
MPC508/509AP
16-Pin Plastic DIP
180
MPC508/509AU
16-Pin Plastic SOIC
211
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix C of Burr-Brown IC Data Book.
PACKAGE INFORMATION
4
MPC508A, 509A
TYPICAL PERFORMANCE CURVES
Typical at +25
C, unless otherwise noted.
SETTLING TIME vs
SOURCE RESISTANCE FOR 20V STEP CHANGE
1k
100
10
1
0.1
0.01
0.1
1
10
100
Source Resistance (k
)
Settling Time (s)
To 0.01%
To 0.1%
CROSSTALK vs SIGNAL FREQUENCY
1
0.1
0.01
0.001
0.0001
1
10
100
1k
10k
Signal Frequency (Hz)
Crosstalk (% of Off Channel Signal)
R
s
= 100k
R
s
= 1k
R
s
= 100
R
s
= 10k
COMBINED CMR vs
FREQUENCY MPC509A AND INA110
120
100
80
60
40
20
0
1
10
100
1k
10k
Frequency (Hz)
Common-Mode Rejection (dB)
G = 500
G = 100
G = 10
5
MPC508A, 509A
DISCUSSION OF
PERFORMANCE
Differential Multiplexer Static Accuracy
Static accuracy errors in a differential multiplexer are diffi-
cult to control, especially when it is used for multiplexing
low-level signals with full-scale ranges of 10mV to 100mV.
The matching properties of the multiplexer, source and
output load play a very important part in determining the
transfer accuracy of the multiplexer. The source impedance
unbalance, common-mode impedance, load bias current mis-
match, load differential impedance mismatch, and common-
mode impedance of the load all contribute errors to the
multiplexer. The multiplexer ON resistance mismatch, leak-
age current mismatch and ON resistance also contribute to
differential errors.
The effects of these errors can be minimized by following the
general guidelines described in this section, especially for
low-level multiplexing applications. Refer to Figure 2.
Load (Output Device) Characteristics
Use devices with very low bias current. Generally, FET
input amplifiers should be used for low-level signals less
than 50mV FSR. Low bias current bipolar input amplifi-
ers are acceptable for signal ranges higher than 50mV
FSR. Bias current matching will determine the input
offset.
The system dc common-mode rejection (CMR) can never
be better than the combined CMR of the multiplexer and
driven load. System CMR will be less than the device
which has the lower CMR figure.
Load impedances, differential and common-mode, should
be 10
10
or higher.
DC CHARACTERISTICS
The static or dc transfer accuracy of transmitting the multi-
plexer input voltage to the output depends on the channel ON
resistance (R
ON
), the load impedance, the source impedance,
the load bias current and the multiplexer leakage current.
Single-Ended Multiplexer Static Accuracy
The major contributors to static transfer accuracy for single-
ended multiplexers are:
Source resistance loading error;
Multiplexer ON resistance error;
and, DC offset error caused by both load bias current and
multiplexer leakage current.
Resistive Loading Errors
The source and load impedances will determine the input
resistive loading errors. To minimize these errors:
Keep loading impedance as high as possible. This
minimizes the resistive loading effects of the source
resistance and multiplexer ON resistance. As a guideline,
load impedances of 10
8
,
or greater, will keep resistive
loading errors to 0.002% or less for 1000
source imped-
ances. A 10
6
load impedance will increase source
loading error to 0.2% or more.
Use sources with impedances as low as possible. 1000
source resistance will present less than 0.001% loading
error and 10k
source resistance will increase source
loading error to 0.01% with a 10
8
load impedance.
Input resistive loading errors are determined by the following
relationship (see Figure 1).
Source and Multiplexer Resistive Loading Error
where R
S
= source resistance
R
L
= load resistance
R
ON
= multiplexer ON resistance
Input Offset Voltage
Bias current generates an input OFFSET voltage as a result
of the IR drop across the multiplexer ON resistance and
source resistance. A load bias current of 10nA will generate
an offset voltage of 20
V if a 1k
source is used. In general,
for the MPC508A, the OFFSET voltage at the output is
determined by:
V
OFFSET
= (I
B
+ I
L
) (R
ON
+ R
S
)
where I
B
= Bias current of device multiplexer is driving
I
L
= Multiplexer leakage current
R
ON
= Multiplexer ON resistance
R
S
= source resistance
Z
L
R
S4A
R
S48
R
OFF4A
R
OFF4B
C
CM
R
S1
R
S1B
R
ON1A
R
ON1B
I
L
Cd/2
Cd/2
R
CM
Rd/2
Rd/2
I
BIAS A
I
BIAS B
R
CM4
R
CM1
V
S1
V
S8
I
LB
FIGURE 2. MPC509A DC Accuracy Equivalent Circuit.
R
S1
R
S8
R
ON
R
OFF
V
S1
V
S8
Z
L
Measured
Voltage
I
L
V
M
I
BIAS
FIGURE 1. MPC508A DC Accuracy Equivalent Circuit.
R
S
+
R
ON
(
)
=
R
S
+
R
ON
R
S
+
R
ON
+
R
L
x 100%
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