Difet
Electrometer-Grade
OPERATIONAL AMPLIFIER
OPA128
Noise-Free
Cascode
1k
Trim
1
5
3
2
+In
In
Case (Guard)
Output
OPA128 Simplified Circuit
+V
CC
V
CC
8
7
6
4
28k
1k
2k
2k
Trim
28k
FEATURES
q
ULTRA-LOW BIAS CURRENT: 75fA max
q
LOW OFFSET: 500
V max
q
LOW DRIFT: 5
V/
C max
q
HIGH OPEN-LOOP GAIN: 110dB min
q
HIGH COMMON-MODE REJECTION:
90dB min
q
IMPROVED REPLACEMENT FOR AD515
AND AD549
DESCRIPTION
The OPA128 is an ultra-low bias current monolithic
operational amplifier. Using advanced geometry
dielectrically-isolated FET (
Difet
) inputs, this mono-
lithic amplifier achieves a performance level exceed-
ing even the best hybrid electrometer amplifiers.
Laser-trimmed thin-film resistors give outstanding volt-
age offset and drift performance.
A noise-free cascode and low-noise processing give
the OPA128 excellent low-level signal handling capa-
bilities. Flicker noise is very low.
The OPA128 is an improved pin-for-pin replacement
for the AD515.
Difet
Burr-Brown Corp.
APPLICATIONS
q
ELECTROMETER
q
MASS SPECTROMETER
q
CHROMATOGRAPH
q
ION GAUGE
q
PHOTODETECTOR
q
RADIATION-HARD EQUIPMENT
1986 Burr-Brown Corporation
PDS-653E
Printed in U.S.A. May, 1995
International Airport Industrial Park Mailing Address: PO Box 11400, Tucson, AZ 85734 Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 Tel: (520) 746-1111 Twx: 910-952-1111
Internet: http://www.burr-brown.com/ FAXLine: (800) 548-6133 (US/Canada Only) Cable: BBRCORP Telex: 066-6491 FAX: (520) 889-1510 Immediate Product Info: (800) 548-6132
SBOS148
2
OPA128
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
SPECIFICATIONS
ELECTRICAL
At V
CC
=
15VDC and T
A
= +25
C, unless otherwise noted. Pin 8 connected to ground.
OPA128JM
OPA128KM
OPA128LM
OPA128SM
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
INPUT
BIAS CURRENT
(1)
Input Bias Current
V
CM
= 0VDC,
R
L
10k
150
300
75
150
40
75
75
150
fA
OFFSET CURRENT
(1)
Input Offset Current
V
CM
= 0VDC,
R
L
10k
65
30
30
30
fA
OFFSET VOLTAGE
(1)
Input Offset Voltage
V
CM
= 0VDC
260
1000
140
500
140
500
140
500
V
Average Drift
T
A
= T
MIN
to T
MAX
20
10
5
10
V/
C
Supply Rejection
80
120
90
120
90
120
90
120
dB
1
100
1
32
1
32
1
32
V/V
NOISE
Voltage: f
O
= 10Hz
92
92
92
92
nV/
Hz
f
O
= 100Hz
78
78
78
78
nV/
Hz
f
O
= 1kHz
27
27
27
27
nV/
Hz
f
O
= 10kHz
15
15
15
15
nV/
Hz
f
B
= 10Hz to 10kHz
2.4
2.4
2.4
2.4
Vrms
f
B
= 0.1Hz to 10Hz
4
4
4
4
Vp-p
Current: f
B
= 0.1Hz to 10Hz
4.2
3
2.3
3
fA, p-p
f
O
= 0.1Hz to 20kHz
0.22
0.16
0.12
0.16
fA/
Hz
IMPEDANCE
Differential
10
13
|| 1
10
13
|| 1
10
13
|| 1
10
13
|| 1
|| pF
Common-Mode
10
15
|| 2
10
15
|| 2
10
15
|| 2
10
15
|| 2
|| pF
VOLTAGE RANGE
(4)
Common-Mode Input Range
10
12
10
12
10
12
10
12
V
Common-Mode Rejection
V
IN
=
10VDC
80
118
90
118
90
118
90
118
dB
OPEN-LOOP GAIN, DC
Open-Loop Voltage Gain
R
L
2k
94
128
110
128
110
128
110
128
dB
FREQUENCY RESPONSE
Unity Gain, Small Signal
(2)
0.5
1
0.5
1
0.5
1
0.5
1
MHz
Full Power Response
20Vp-p, R
L
= 2k
47
47
47
47
kHz
Slew Rate
V
O
=
10V, R
L
= 2k
0.5
3
1
3
1
3
1
3
V/
s
Settling Time, 0.1%
Gain = 1, R
L
= 2k
5
5
5
5
s
0.01%
10V Step
10
10
10
10
s
Overload Recovery,
50% Overdrive
(3)
Gain = 1
5
5
5
5
s
RATED OUTPUT
Voltage Output
R
L
= 2k
10
13
10
13
10
13
10
13
V
Current Output
V
O
=
10VDC
5
10
5
10
5
10
5
10
mA
Output Resistance
DC, Open Loop
100
100
100
100
Load Capacitance Stability
Gain = +1
1000
1000
1000
1000
pF
Short Circuit Current
10
34
55
10
34
55
10
34
55
10
34
55
mA
POWER SUPPLY
Rated Voltage
15
15
15
15
VDC
Voltage Range,
Derated Performance
5
18
5
18
5
18
5
18
VDC
Current, Quiescent
I
O
= 0mADC
0.9
1.5
0.9
1.5
0.9
1.5
0.9
1.5
mA
TEMPERATURE RANGE
Specification
Ambient Temp.
0
+70
0
+70
0
+70
55
+125
C
Operating
Ambient Temp.
55
+125
55
+125
55
+125
55
+125
C
Storage
Ambient Temp.
65
+150
65
+150
65
+150
65
+150
C
Junction-Ambient
200
200
200
200
C/W
NOTES: (1) Offset voltage, offset current, and bias current are measured with the units fully warmed up. Bias current doubles approximately every 11
C. (2) Sample
tested. (3) Overload recovery is defined as the time required for the output to return from saturation to linear operation following the removal of a 50% input overdrive.
(4) If it is possible for the input voltage to exceed the supply voltage, a series protection resistor should be added to limit input current to 0.5mA. The input devices
can withstand overload currents of 0.3mA indefinitely without damage.
3
OPA128
Supply ...........................................................................................
18VDC
Internal Power Dissipation
(1)
.......................................................... 500mW
Differential Input Voltage ..............................................................
36VDC
Input Voltage Range .....................................................................
18VDC
Storage Temperature Range .......................................... 65
C to +150
C
Operating Temperature Range ....................................... 55
C to +125
C
Lead Temperature (soldering, 10s) ............................................... +300
C
Output Short Circuit Duration
(2)
................................................ Continuous
Junction Temperature .................................................................... +175
C
NOTES: (1) Packages must be derated based on
CA
= 150
C/W or
JA
=
200
C/W. (2) Short circuit may be to power supply common only. Rating
applies to +25
C ambient. Observe dissipation limit and T
J
.
ELECTRICAL (FULL TEMPERATURE RANGE SPECIFICATIONS)
At V
CC
=
15VDC and T
A
= T
MIN
and T
MAX
, unless otherwise noted.
ABSOLUTE MAXIMUM RATINGS
OPA128JM
OPA128KM
OPA128LM
OPA128SM
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
TEMPERATURE RANGE
Specification Range
Ambient Temp.
0
+70
0
+70
0
+70
55
+125
C
INPUT
BIAS CURRENT
(1)
Input Bias Current
V
CM
= 0VDC
2.5
8
1.3
4
0.7
2
43
170
pA
OFFSET CURRENT
(1)
Input Offset Current
V
CM
= 0VDC
1.1
0.6
0.6
18
pA
OFFSET VOLTAGE
(1)
Input Offset Voltage
V
CM
= 0VDC
2.2mV
1mV
750
1.5mV
V
Average Drift
20
10
5
10
V/
C
Supply Rejection
74
114
80
114
80
114
80
106
dB
2
200
2
100
2
100
5
100
V/V
VOLTAGE RANGE
(2)
Common-Mode Input Range
10
11
10
11
10
11
10
11
V
Commmon-Mode Rejection
V
IN
=
10VDC
74
112
80
112
80
112
74
104
dB
OPEN-LOOP GAIN, DC
Open-Loop Voltage Gain
R
L
2k
90
125
104
125
104
125
90
122
dB
RATED OUTPUT
Voltage Output
R
L
= 2k
10
10
10
10
V
Current Output
V
O
=
10VDC
5
5
5
5
mA
Short Circuit Current
V
O
= 0VDC
10
22
10
22
10
22
10
18
mA
POWER SUPPLY
Current, Quiescent
I = 0mADC
0.9
1.8
0.9
1.8
0.9
1.8
0.9
2
mA
NOTES: (1) Offset voltage, offset current, and bias current are measured with the units fully warmed up. (2) If it is possible for the input voltage to exceed the supply
voltage, a series protection resistor should be added to limit input current to 0.5mA. The input devices can withstand overload currents of 0.3mA indefinitely without
damage.
CONNECTION DIAGRAM
8
1
2
7
6
5
3
4
Offset
Trim
Offset
Trim
Output
+V
CC
Substrate and Case
In
+In
OPA128
Top View
V
CC
PACKAGE DRAWING
PRODUCT
PACKAGE
NUMBER
(1)
OPA128JM
TO-99
001
OPA128KM
TO-99
001
OPA128LM
TO-99
001
OPA128SM
TO-99
001
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix C of Burr-Brown IC Data Book.
PACKAGE INFORMATION
TEMPERATURE
BIAS CURRENT,
PRODUCT
PACKAGE
RANGE
max (fA)
OPA128JM
TO-99
0
C to +70
C
300
OPA128KM
TO-99
0
C to +70
C
150
OPA128LM
TO-99
0
C to +70
C
75
OPA128SM
TO-99
55
C to +125
C
150
ORDERING INFORMATION
4
OPA128
DICE INFORMATION
PAD
FUNCTION
1
Offset Trim
2
In
3
+In
4
V
CC
5
Offset Trim
6
Output
7
+V
CC
8
Substrate
NC
No Connection
Substrate Bias: Isolated, normally con-
nected to common.
MECHANICAL INFORMATION
MILS (0.001")
MILLIMETERS
Die Size
96 x 71
5
2.44 x 1.80
0.13
Die Thickness
20
3
0.51
0.08
Min. Pad Size
4 x 4
0.10 x 0.10
Backing
None
TYPICAL PERFORMANCE CURVES
At T
A
= +25
C,
15VDC, unless otherwise noted.
OPA128 DIE TOPOGRAPHY
COMMON-MODE REJECTION
vs INPUT COMMON-MODE VOLTAGE
15
Common-Mode Voltage (V)
10
5
0
5
10
15
Common-Mode Rejection (dB)
120
110
100
90
80
70
1
1k
10
100
10k
100k
1M
10M
Frequency (Hz)
0
20
40
60
80
100
120
140
Common-Mode Rejection (dB)
COMMON-MODE REJECTION
vs FREQUENCY
1
1k
10
100
10k
100k
1M
10M
Frequency (Hz)
0
20
40
60
80
100
120
140
Voltage Gain (dB)
OPEN-LOOP FREQUENCY RESPONSE
180
135
90
45
Phase Shift (Degrees)
Phase
Margin
90
Gain
1
1k
10
100
10k
100k
1M
10M
Frequency (Hz)
0
20
40
60
80
100
120
140
Power Supply Rejection (dB)
POWER SUPPLY REJECTION vs FREQUENCY
PSRR
+PSRR
5
OPA128
TYPICAL PERFORMANCE CURVES
(CONT)
At T
A
= +25
C, +15VDC, unless otherwise noted.
50
25
0
25
50
75
125
Ambient Temperature (C)
1
100pA
10pA
10
Bias and Offset Current (fA)
BIAS AND OFFSET CURRENT
vs TEMPERATURE
100
100
1pA
SM
I
OS
I
B
75
50
25
0
25
50
125
Ambient Temperature (C)
0
4
3
2
1
Gain-Bandwidth (MHz)
GAIN-BANDWIDTH AND SLEW RATE
vs TEMPERATURE
75
100
0
4
3
2
1
Slew Rate (V/s)
75
50
25
0
25
50
125
Ambient Temperature (C)
0
2
1.5
1
0.5
Supply Current (mA)
SUPPLY CURRENT vs TEMPERATURE
75
100
0
5
10
20
Supply Voltage (V
CC
)
0
3
2
1
Gain-Bandwidth (MHz)
GAIN-BANDWIDTH AND SLEW RATE
vs SUPPLY VOLTAGE
15
Slew Rate (V/s)
0
6
4
2
Slew
+ Slew
BIAS AND OFFSET CURRENT
vs INPUT COMMON-MODE VOLTAGE
15
10
5
0
5
10
15
Normalized Bias and Offset Current
Common-Mode Voltage (V)
0.01
10
1
0.1
100
75
50
25
0
25
50
125
Ambient Temperature (C)
140
130
120
110
PSR, CMR, Voltage Gain (dB)
OPEN-LOOP GAIN, PSR, AND CMR vs TEMPERATURE
75
100
PSR
CMR
A
OL
6
OPA128
LARGE SIGNAL TRANSIENT RESPONSE
Time (s)
Output Voltage (V)
SMALL SIGNAL TRANSIENT RESPONSE
Time (s)
Output Voltage (mV)
TYPICAL PERFORMANCE CURVES
(CONT)
At T
A
= +25
C, +15VDC, unless otherwise noted.
0
50
25
10
10
0
80
80
40
40
0
0
10
8
6
4
2
5
s
5V
5
s
20mV
1
s
0
5
10
20
Supply Voltage (V
CC
)
0
15
10
5
Common-Mode Voltage (V)
COMMON-MODE INPUT RANGE
vs SUPPLY VOLTAGE
15
0
50
100
150
200
250
350
Additional Power Dissipation (mW)
1
100pA
10pA
10
Bias Current (fA)
BIAS CURRENT
vs ADDITIONAL POWER DISSIPATION
300
100
1pA
KM
10
Frequency (Hz)
INPUT VOLTAGE NOISE SPECTRAL DENSITY
Voltage Density (nV/ Hz)
1
10
100
1k
10k
100k
1k
100
FULL-POWER OUTPUT vs FREQUENCY
100k
Frequency (Hz)
1k
10k
1M
30
20
10
0
Output Voltage (Vp-p)
7
OPA128
APPLICATIONS INFORMATION
OFFSET VOLTAGE ADJUSTMENT
The OPA128 offset voltage is laser-trimmed and will require
no further trim for most applications. As with most amplifi-
ers, externally trimming the remaining offset can change
drift performance by about 0.3
V/
C for each 100
V of
adjusted effort. Note that the trim (Figure 1) is similar to
operational amplifiers such as HA-5180 and AD515. The
OPA128 can replace many other amplifiers by leaving the
external null circuit unconnected.
The amplifier case should be connected to any input shield or
guard via pin 8. This insures that the amplifier itself is fully
surrounded by guard potential, minimizing both leakage and
noise pickup (see Figure 2).
Triboelectric charge (static electricity generated by friction)
can be a troublesome noise source from cables connected to
the input of an electrometer amplifier. Special low-noise cable
will minimize this effect but the optimum solution is to mount
the signal source directly at the electrometer input with short,
rigid, wiring to preclude microphonic noise generation.
TESTING
Accurately testing the OPA128 is extremely difficult due to its
high level of performance. Ordinary test equipment may not
be able to resolve the amplifier's extremely low bias current.
Inaccurate bias current measurements can be due to:
1. Test socket leakage
2. Unclean package
3. Humidity or dew point condensation
4. Circuit contamination from fingerprints or anti-static
treatment chemicals
5. Test ambient temperature
6. Load power dissipation
BIFET
National Semiconductor Corp.
FIGURE 2. Connection of Input Guard.
TO-99 Bottom View
3
OPA128
2
8
6
In
Out
Non-Inverting
3
OPA128
2
8
6
In
Out
Buffer
3
OPA128
2
8
6
In
Out
Inverting
3
2
4 5
6
7
8
1
BOARD LAYOUT
FOR INPUT GUARDING
Guard top and bottom of board.
Alternate: use Teflon
standoff
for sensitive input pins.
Teflon
E.I. Du Pont de Nemours & Co.
FIGURE 1. Offset Voltage Trim.
7
6
2
3
4
5
1
10mV Typical
Trim Range
NOTE: (1) 10k
to 1M
Trim Potentiometer
(100k
Recommended)
+V
CC
V
CC
OPA128
(1)
INPUT PROTECTION
Conventional monolithic FET operational amplifiers' inputs
must be protected against destructive currents that can flow
when input FET gate-to-substrate isolation diodes are for-
ward-biased. Most BIFET
amplifiers can be destroyed by
the loss of V
CC
.
Because of its dielectric isolation, no special protection is
needed on the OPA128. Of course, the differential and
common-mode voltage limits should be observed.
Static damage can cause subtle changes in amplifier input
characteristics without necessarily destroying the device. In
precision operational amplifiers (both bipolar and FET types),
this may cause a noticeable degradation of offset voltage and
drift.
Static protection is recommended when handling any preci-
sion IC operational amplifier.
GUARDING AND SHIELDING
As in any situation where high impedances are involved,
careful shielding is required to reduce "hum" pickup in input
leads. If large feedback resistors are used, they should also be
shielded along with the external input circuitry. Leakage
currents across printed circuit boards can easily exceed the
bias current of the OPA128. To avoid leakage problems, it is
recommended that the signal input lead of the OPA128 be
wired to a Teflon standoff. If the input is to be soldered
directly into a printed circuit board, utmost care must be used
in planning the board layout. A "guard" pattern should
completely surround the high impedance input leads and
should be connected to a low impedance point which is at the
signal input potential.
8
OPA128
FIGURE 3. High Impedance (10
15
) Amplifier.
OPA128
6
3
2
500
9.5k
8
7
4
5
1
+15V
15V
Guard
pH Probe
R
50mV Output
500M
S
1VDC
Output
Offset Trim
100k
FIGURE 5. FET Input Instrumentation Amplifier for Biomedical Applications.
Output
OPA128
2
3
10k
F
R
6
OPA128
3
2
6
10k
F
R
6
1
5
3
2
25k
25k
25k
Burr-Brown
INA105
Differential
Amplifier
25k
Differential Voltage Gain = 1 + 2R
F
/R
G
+In
In
202
G
R
I
B
100fA
Gain = 100
CMRR
118dB
R
IN
10
15
FIGURE 6. Low-Droop Positive Peak Detector.
OPA128
2
3
6
Output
8
1000F
Polystyrene
1N914
2N4117A
NOTE: (1) Reverse polarity
for negative peak detection.
1M
10k
1N914
10pF
2
3
6
Input
100V/s
Droop
OPA606
(1)
(1)
(1)
FIGURE 4. Piezoelectric Transducer Charge Amplifier.
OPA128
2
3
Output
10pF
8
100pF
11
10
F
R
F
C
O
e
11
10
Q
Low Frequency Cutoff =
1/(2
F
C
F
) = 0.16Hz
O
e =
Q/C
F
6
R
9
OPA128
FIGURE 8. Current-to-Voltage Converter.
FIGURE 7. Sensitive Photodiode Amplifier.
V
O
= 1mV/pA
Output
OPA128
2
3
6
8
10
9
INA101HP
3
4
5
10
11
12
1
14
REF101
5
6
4
1
8
7
+15V
Biased
Current
Transducer
+5V
+5V
FIGURE 9. Biased Current-to-Voltage Converter.
OPA128
2
3
6
8
V
O
= 1V/nA
1000M
18k
2k
Output
Current
Input
OPA128
2
3
6
Output
7
<1pF to prevent gain peaking.
8
+15V
0.1F
5
x
10
9
V/W
0.1F
15V
4
0.01F
Circuit must be well shielded.
Guard
Silicon Detector Corp.
SD-020-11-21-011
10
10
10
10
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package
Type
Package
Drawing
Pins Package
Qty
Eco Plan
(2)
Lead/Ball Finish
MSL Peak Temp
(3)
OPA128JM
NRND
TO-99
LMC
8
20
TBD
Call TI
Level-NA-NA-NA
OPA128KM
NRND
TO-99
LMC
8
20
TBD
Call TI
Level-NA-NA-NA
OPA128LM
NRND
TO-99
LMC
8
20
TBD
Call TI
Level-NA-NA-NA
OPA128SM
NRND
TO-99
LMC
8
20
TBD
Call TI
Level-NA-NA-NA
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco
Plan
-
The
planned
eco-friendly
classification:
Pb-Free
(RoHS)
or
Green
(RoHS
&
no
Sb/Br)
-
please
check
http://www.ti.com/productcontent
for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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PACKAGE OPTION ADDENDUM
www.ti.com
22-Jun-2005
Addendum-Page 1
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