OPA551, OPA552

OPA551
OPA552

1999 Burr-Brown Corporation

PDS-1472A

Printed in U.S.A. July, 1999

High-Voltage, High-Current

OPERATIONAL AMPLIFIERS

DESCRIPTION

The OPA551 and OPA552 are low cost op amps with
high-voltage (60V) and high-current (200mA) capa-
bility.

The OPA551 is unity-gain stable and features high
slew rate (15V

s) and wide bandwidth (3MHz). The

OPA552 is optimized for gains of 5 or greater, and
offers higher speed with a slew rate of 24V/

s and a

bandwidth of 12MHz. Both are suitable for telephony,
audio, servo, and test applications.

These laser-trimmed, monolithic integrated circuits
provide excellent low-level accuracy along with high
output swing. High performance is maintained as the
amplifier swings to its specified limits.

The OPA551 and OPA552 are internally protected
against over-temperature conditions and current over-
loads. The thermal shutdown indicator "flag" provides
a current output to alert the user when thermal shut-
down has occurred.

The OPA551 and OPA552 are available in DIP-8 and
SO-8 packages, as well as a DDPAK-7 surface-
mount plastic power package. They are specified for
operation over the extended industrial temperature
range, 40

C to +125

FEATURES

WIDE SUPPLY RANGE:

4V to

30V

HIGH OUTPUT CURRENT: 200mA Continuous

LOW NOISE: 14nV/

FULLY PROTECTED:
Thermal Shutdown
Output Current-Limited

THERMAL SHUTDOWN INDICATOR

WIDE OUTPUT SWING: 2V From Rail

FAST SLEW RATE:
OPA551: 15V/

OPA552: 24V/

WIDE BANDWIDTH:
OPA551: 3MHz
OPA552: 12MHz

PACKAGES: DIP-8, SO-8, or DDPAK-7

APPLICATIONS

TELEPHONY

TEST EQUIPMENT

AUDIO AMPLIFIER

TRANSDUCER EXCITATION

SERVO DRIVER

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OPA551

For most current data sheet and other product

information, visit www.burr-brown.com

Flag

V+

Out

+In

OPA551, OPA552

SO-8 (U)

Flag

V+

Out

+In

OPA551, OPA552

DIP-8 (P)

NOTE: Tab is
connected to
V supply.

V+

Out

+In

1 2 3 4 5 6

Flag

DDPAK-7 Surface-Mount (F)

OPA551, OPA552

OPA551, OPA552

SPECIFICATIONS: V

30V

OPA551

At T

= +25

(1)

, R

= 3k

connected to ground and V

OUT

= 0V, unless otherwise noted.

Boldface limits apply over the specified junction temperature range, T

= 40

C to +125

OPA551UA, PA, FA

PARAMETER

CONDITION

MIN

TYP

MAX

UNITS

OFFSET VOLTAGE
Input Offset Voltage

= 0V, I

= 0

= 40

C to +125

vs Temperature

/dT

vs Power Supply

PSRR

4V to

30V, V

= 0V

V/V

INPUT BIAS CURRENT

Input Bias Current

100

Input Offset Current

100

NOISE
Input Voltage Noise Density, f = 1kHz

nV/

Current Noise Density, f = 1kHz

3.5

fA/

INPUT VOLTAGE RANGE
Common-Mode Voltage Range

(V) + 2.5

(V+) 2.5

Common-Mode Rejection Ratio

CMRR

27.5V

< V

< +27.5V

102

INPUT IMPEDANCE
Differential

|| 2

|| pF

Common-Mode

|| 6

|| pF

OPEN-LOOP GAIN
Open-Loop Voltage Gain

= 3k

, 28V < V

< +28V

110

126

= 40

C to +125

= 3k

, 28V < V

< +28V

100

= 300

, 27V < V

< +27V

120

FREQUENCY RESPONSE
Gain-Bandwidth Product

GBW

MHz

Slew Rate

G = 1

Settling Time: 0.1%

G = 1, C

= 100pF, 10V Step

1.3

0.01%

G = 1, C

= 100pF, 10V Step

Total Harmonic Distortion + Noise, f = 1kHz

THD+N

= 15Vrms, R

= 3k

, G = 3

0.0005

= 15Vr ms, R

= 300

, G = 3

0.0005

Overload Recovery Time

· Gain = V

OUTPUT
Voltage Output

OUT

= 200mA

(V) + 3.0

(V+) 3.0

= 40

C to +125

= 200mA

(V) + 3.5

(V+) 3.5

= 10mA

(V) + 2.0

(V+) 2.0

= 40

C to +125

= 10mA

(V) + 2.5

(V+) 2.7

Maximum Continuous Current Output: dc

Package Dependent--See Text

200

Short-Circuit Current

380

Capacitive Load Drive

LOAD

Stable Operation

See Typical Curve

SHUTDOWN FLAG
Thermal Shutdown Status Output

Normal Operation

Sourcing

0.05

Thermally Shutdown

Sourcing

120

160

Voltage Compliance Range

(V+) 1.5

Junction Temperature

Shutdown

160

Reset from Shutdown

140

POWER SUPPLY
Specified Voltage

Operating Voltage Range

Quiescent Current

= 0

8.5

= 40

C to +125

TEMPERATURE RANGE
Specified Range

+125

Operating Range

+125

Storage Range

+150

Thermal Resistance

SO-8 Surface Mount

C/W

DIP-8

100

C/W

DDPak-7

C/W

DDPak-7

C/W

NOTES: (1) All tests are high-speed tested at +25

C ambient temperature. Effective junction temperature is +25

C unless otherwise noted.

OPA551, OPA552

SPECIFICATIONS: V

30V

OPA552

At T

= +25

(1)

, R

= 3k

connected to Ground and V

OUT

= 0V, unless otherwise noted.

Boldface limits apply over the specified junciton temperature range, T

= 40

C to +125

OPA552UA, PA, FA

PARAMETER

CONDITION

MIN

TYP

MAX

UNITS

OFFSET VOLTAGE
Input Offset Voltage

= 0V, I

= 0

= 40

C to +125

vs Temperature

/dT

vs Power Supply

PSRR

4V to

30V, V

= 0V

V/V

INPUT BIAS CURRENT

Input Bias Current

100

Input Offset Current

100

NOISE
Input Voltage Noise Density, f = 1kHz

nV/

Current Noise Density, f = 1kHz

3.5

fA/

INPUT VOLTAGE RANGE
Common-Mode Voltage Range

(V) + 2.5

(V+) 2.5

Common-Mode Rejection Ratio

CMRR

27.5V

< V

< +27.5V

102

INPUT IMPEDANCE
Differential

|| 2

|| pF

Common-Mode

|| 6

|| pF

OPEN-LOOP GAIN
Open-Loop Voltage Gain

= 3k

, 28V < V

< +28V

110

126

= 40

C to +125

= 3k

, 28V < V

< +28V

100

= 300

, 27V < V

< +27V

120

FREQUENCY RESPONSE
Gain-Bandwidth Product

GBW

MHz

Slew Rate

G = 5

Settling Time: 0.1%

G = 5, C

= 100pF, 10V Step

2.2

0.01%

G = 5, C

= 100pF, 10V Step

Total Harmonic Distortion + Noise, f = 1kHz

THD+N

= 15Vrms, R

= 3k

, G = 5

0.0005

= 15Vr ms, R

= 300

, G = 5

0.0005

Overload Recovery Time

· Gain = V

OUTPUT
Voltage Output

OUT

= 200mA

(V) + 3.0

(V+) 3.0

= 40

C to +125

= 200mA

(V) + 3.5

(V+) 3.5

= 10mA

(V) + 2.0

(V+) 2.0

= 40

C to +125

= 10mA

(V) + 2.5

(V+) 2.7

Maximum Continuous Current Output: dc

Package Dependent--See Text

200

Short-Circuit Current

380

Capacitive Load Drive

LOAD

Stable Operation

See Typical Curve

SHUTDOWN FLAG
Thermal Shutdown Status Output

Normal Operation

Sourcing

0.05

Thermally Shutdown

Sourcing

120

160

Voltage Compliance Range

(V+) 1.5

Junction Temperature

Shutdown

160

Reset from Shutdown

140

POWER SUPPLY
Specified Voltage

Operating Voltage Range

Quiescent Current

= 0

8.5

= 40

C to +125

TEMPERATURE RANGE
Specified Range

+125

Operating Range

+125

Storage Range

+150

Thermal Resistance

SO-8 Surface Mount

C/W

DIP-8

100

C/W

DDPak-7

C/W

DDPak-7

C/W

NOTES: (1) All tests are high-speed tested at +25

C ambient temperature. Effective junction temperature is +25

C unless otherwise noted.

OPA551, OPA552

ABSOLUTE MAXIMUM RATINGS

(1)

Output Current ................................................................. See SOA Curve
Supply Voltage, V+ to V ................................................................... 60V
Input Voltage Range ....................................... (V) 0.5V to (V+) + 0.5V
Operating Temperature .................................................. 55

C to +125

Storage Temperature ..................................................... 65

C to +150

Junction Temperature .................................................................... +150

Lead Temperature (soldering 10s, DIP-8) ...................................... 300

(soldering 3s, SO-8 and DDPAK) .................... 240

ESD Capability (Human Body Model) ............................................. 3000V

NOTE: (1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods may degrade
device reliability.

ELECTROSTATIC
DISCHARGE SENSITIVITY

This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.

ESD damage can range from subtle performance degrada-
tion to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet its
published specifications.

The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility
for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are subject to change without notice. No patent rights or
licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support
devices and/or systems.

PACKAGE /ORDERING INFORMATION

PACKAGE

SPECIFIED

DRAWING

TEMPERATURE

PACKAGE

ORDERING

TRANSPORT

PRODUCT

PACKAGE

NUMBER

(1)

RANGE

MARKING

NUMBER

(2)

MEDIA

OPA551UA

SO-8

182

C to +125

OPA551UA

Rails

OPA551UA/2K5

Tape and Reel

OPA551PA

DIP-8

006

C to +125

OPA551PA

Rails

OPA551FA

DDPAK-7

328

C to +125

OPA551FA

Rails

OPA551FA/500

Tape and Reel

OPA552UA

SO-8

182

C to +125

OPA552UA

Rails

OPA552UA/2K5

Tape and Reel

OPA552PA

DIP-8

006

C to +125

OPA552PA

Rails

OPA552FA

DDPAK-7

328

C to +125

OPA552FA

Rails

OPA552FA/500

Tape and Reel

NOTES: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. (2) Products followed by a slash
(/) are only available in Tape and Reel in the quantities indicated (e.g., /2K5 indicates 2500 devices per reel). Ordering 2500 pieces of "OPA551UA/2K5" will get
a single 2500-piece Tape and Reel. For detailed Tape and Reel mechanical information, refer to Appendix B of Burr-Brown IC Data Book.

OPA551, OPA552

TYPICAL PERFORMANCE CURVES

At T

= +25

C, V

30V and R

= 3k

, unless otherwise noted.

All temperatures are junction temperatures unless otherwise noted. Refer to the Applications Information section to calculate junction temperatures from ambient
temperatures for a specific configuration.

120

100

10k

100k

10M

Frequency (Hz)

CMRR (dB)

COMMON-MODE REJECTION RATIO vs FREQUENCY

120

100

10k

100k

10M

Frequency (Hz)

PSRR (dB)

POWER SUPPLY REJECTION RATIO vs FREQUENCY

PSRR

+PSRR

140

120

100

120

140

160

180

100

10k

100k

10M

Frequency (Hz)

Gain (dB)

OPEN-LOOP GAIN AND PHASE vs FREQUENCY

OPA552

Phase (

)

Phase

OPA552

Gain

10k

100

INPUT VOLTAGE AND CURRENT NOISE

SPECTRAL DENSITY vs FREQUENCY

Voltage Noise (nV/

Hz)

Current Noise (fA/

Hz)

100

10k

100k

Frequency (Hz)

0.1

0.01

0.001

0.0001

TOTAL HARMONIC DISTORTION + NOISE

vs FREQUENCY

Frequency (Hz)

100

10k

100k

THD+N (%)

= 15Vrms

= 3k

, 300

G = 3 (OPA551)
G = 5 (OPA552)

140

120

100

120

140

160

180

100

10k

100k

10M

Frequency (Hz)

Gain (dB)

OPEN-LOOP GAIN AND PHASE vs FREQUENCY

OPA551

Phase (

)

Phase

Gain

OPA551

OPA551, OPA552

TYPICAL PERFORMANCE CURVES

(Cont.)

At T

= +25

C, V

30V and R

= 3k

, unless otherwise noted.

450

430

410

390

370

350

330

310

290

270

100

125

150

Temperature (

(mA)

QUIESCENT CURRENT AND SHORT-CIRCUIT CURRENT

vs TEMPERATURE

100

10k

100k

10M

Frequency (Hz)

Maximum Output Voltage (V)

MAXIMUM OUTPUT VOLTAGE SWING

vs FREQUENCY

OPA552

OPA551

Without Slew-Induced

Distortion

OUTPUT VOLTAGE SWING vs OUTPUT CURRENT

(V+)

(V+)1

(V+)2

(V+)3

(V)+3

(V)+2

(V)+1

(V)

100

150

200

250

300

350

400

Output Current (mA)

Output Voltage Swing (V)

+85

+25

100k

10k

100

125

Ambient Temperature (

Current (pA)

INPUT BIAS CURRENT AND INPUT OFFSET CURRENT

vs TEMPERATURE

100

80 60 40 20

100 120 140

Temperature (

Gain Bandwidth Product (MHz)

GAIN BANDWIDTH PRODUCT vs TEMPERATURE

OPA552

OPA551

130

125

120

115

110

105

100

125

Ambient Temperature (

Gain (dB)

OPEN-LOOP GAIN, POWER SUPPLY REJECTION RATIO,

AND COMMON-MODE REJECTION RATIO

vs TEMPERATURE

PSRR

CMRR

OPA551, OPA552

TYPICAL PERFORMANCE CURVES

(Cont.)

At T

= +25

C, V

30V and R

= 3k

, unless otherwise noted.

100

120

140

Junction Temperature (

Slew Rate (V/

SLEW RATE vs TEMPERATURE

OPA551

OPA552

Common-Mode Voltage (V)

Current (pA)

INPUT BIAS CURRENT AND INPUT OFFSET CURRENT

vs COMMON-MODE VOLTAGE

OFFSET VOLTAGE

PRODUCTION DISTRIBUTION

Percent of Amplifiers (%)

Offset Voltage (mV)

< 3.0

< 2.4

< 1.8

< 1.2

< 0.6

< 0.0

< 0.6

< 1.2

< 1.8

< 2.4

< 3.0

Typical production
distribution of
packaged units.

OFFSET VOLTAGE DRIFT

PRODUCTION DISTRIBUTION

Percent of Amplifiers (%)

Offset Drift

< 0.0

< 1.5

< 3.0

< 4.50

< 6.0

< 7.5

< 9.0

< 10.5

< 12.0

< 13.5

< 15.0

Typical production
distribution of
packaged units.

100

Gain (V/V)

Settling Time (

SETTLING TIME vs CLOSED-LOOP GAIN

OPA551

0.1%

OPA552

0.01%

OPA552

0.1%

OPA551

0.01%

7.6

7.2

6.8

6.4

6.0

405

395

385

375

365

Supply Voltage (V)

Quiescent Current (mA)

Short-Circuit Current (mA)

QUIESCENT CURRENT AND SHORT-CIRCUIT CURRENT

vs SUPPLY VOLTAGE

OPA551, OPA552

TYPICAL PERFORMANCE CURVES

(Cont.)

At T

= +25

C, V

30V and R

= 3

, unless otherwise noted.

SMALL-SIGNAL STEP RESPONSE

OPA552, G = 5, C

= 100pF

Time (1

s/div)

100mV/div

SMALL-SIGNAL STEP RESPONSE

OPA551, G = 1, C

= 1000pF

Time (1

s/div)

5V/div

LARGE-SIGNAL STEP RESPONSE

OPA552, G = 5, C

= 100pF

Time (1

s/div)

5V/div

SMALL-SIGNAL STEP RESPONSE

OPA551, G = 1, C

= 100pF

Time (1

s/div)

LARGE-SIGNAL STEP RESPONSE

OPA551, G = 1, C

= 100pF

Time (1

s/div)

5V/div

25mV/div

0.01

0.1

Load Capacitance (nF)

Overshoot (%)

SMALL-SIGNAL OVERSHOOT vs LOAD CAPACITANCE

OPA551, G = 1

OPA551

G = 2

OPA551

G = 1

OPA552

G = 4

OPA552

G = 6

OPA552, G = 8

OPA552

OPA551

OPA551, OPA552

APPLICATIONS INFORMATION

Figure 1 shows the OPA551 connected as a basic non-
inverting amplifier. The OPA551 can be used in virtually
any op amp configuration. OPA552 is designed for use in
configurations with gains of 5 or greater. Power supply
terminals should be bypassed with 0.1

F capacitors, or

greater, near the power supply pins. Be sure that the capaci-
tors are appropriately rated for the power supply voltage
used. The OPA551 and OPA552 can supply output currents
up to 200mA with excellent performance.

FIGURE 1. Basic Circuit Connections.

CURRENT LIMIT

The OPA551 and OPA552 are designed with internal cur-
rent-limiting circuitry that limits the output current to ap-
proximately 380mA. The current limit varies with increasing
junction temperature as shown in the typical curve "Current
Limit vs Temperature." This, in combination with the ther-
mal protection circuitry, provides protection from many
types of overload conditions including short circuit to ground.

THERMAL PROTECTION

The OPA551 and OPA552 have thermal shutdown circuitry
that protects the amplifier from damage caused by overload
conditions. The thermal protection circuitry disables the
output when the junction temperature reaches approximately
160

C, allowing the device to cool. When the junction

temperature cools to approximately 140

C, the output cir-

cuitry is automatically re-enabled.

The thermal shutdown function is not intended to replace
proper heat sinking. Activation of the thermal shutdown
circuitry is an indication of excessive power dissipation or
an inadequate heat sink. Continuously running the amplifier
into thermal shutdown can degrade reliability.

The Thermal Shutdown Indicator ("flag") pin can be moni-
tored to determine if shutdown is occurring. During normal
operation, the current output from the flag pin is typically
50nA. During shutdown, the current output from the flag pin
increases to 120

A (typical). This current output allows for

easy interfacing to external logic. See Figure 2 for two
examples implementing this function.

FIGURE 2. Thermal Shutdown Indicator.

G = 1+

0.1

OPA551

V+

0.1

Flag

(optional)

Flag

A to

160

HCT

OPA551

Logic

Ground

OUT

+5V

27k

LOGIC

OUT

CMOS

OPA551

Logic

Ground

Interfacing with CMOS Logic

Interfacing with HCT Logic

47k

HP5082-2835

Interface to virtually any CMOS
logic gate by choosing resistor
value that provides a guaranteed
logic high voltage with the
minimum (80

A) flag current. A

diode clamp to the logic supply
voltage assures that the CMOS
is not damaged by overdrive.

HCT logic has relatively well-
controlled logic level. A properly
chosen resistor value can
guarantee proper logic high level
throughout the full range of flag
output current.

OPA551, OPA552

POWER SUPPLIES

The OPA551 and OPA552 may be operated from power
supplies of

4V to

30V, or a total of 60V with excellent

performance. Most behavior remains unchanged throughout
the full operating voltage range. Parameters that vary sig-
nificantly with operating voltage are shown in the Typical
Performance Curves.

For applications that do not require symmetrical output
voltage swing, power supply voltages do not need to be
equal. The OPA551 and OPA552 can operate with as little
as 8V between the supplies or with up to 60V between the
supplies. For example, the positive supply could be set to
50V with the negative supply at 10V or vice-versa.

The SO-8 package outline shows three negative supply (V)
pins. These pins are internally connected for improved thermal
performance. Pin 4 is to be used as the primary current
carrier for the negative supply. It is recommended that
pins 1 and 5 not be directly connected to V but, instead
be connected to a thermal mass. DO NOT lay out the PC
board to use pins 1 and 5 as feedthroughs to the negative
supply. Doing so can result in a reduction of performance.

The tab of the DDPAK-7 package is electrically connected
to the negative supply (V), however, this connection should
not be used to carry current. For best thermal performance,
the tab should be soldered directly to the circuit board
copper area (see heat sink text).

POWER DISSIPATION

Internal power dissipation of these op amps can be quite
large. Many of the specifications for the OPA551 and
OPA552 are for a specified junction temperature. If the
device is not subjected to internal self-heating, the junction
temperature will be the same as the ambient. However, in
practical applications, the device will self-heat and the junc-
tion temperature will be significantly higher than ambient.
After junction temperature has been established, perfor-
mance parameters that vary with junction temperature can be
determined from the performance curves. The following
calculation can be performed to establish junction tempera-
ture as a function of ambient temperature and the conditions
of the application.

Consider the OPA551 in a circuit configuration where the
load is 600

and the output voltage is 15V. The supplies are

30V and the ambient temperature (T

) is 40

C. The

for the 8-pin DIP package is 100

C/W.

First, the internal heating of the op amp is as follows:

D(internal)

= I

· V

= 7.2mA · 60V = 432mW

The output current (I

) can be calculated:

= V

OUT

/ R

= 15V / 600

= 25mA

The power being dissipated (P

) in the output transistor of

the amplifier can be calculated:

D(output stage)

= I

· (V

) = 25mA · (30 15) = 375mW

D(total)

= P

D(internal)

+ P

D(output stage)

= 432mW + 375mW = 807mW

The resulting junction temperature can be calculated:

= T

+ P

= 40

C + 807mW · 100

C/W = 120.7

Where,

= junction temperature (

= ambient temperature (

= junction-to-air thermal resistance (

C/W)

For the DDPAK package, the

is 65

C/W with no heat

sinking, resulting in a junction temperature of 92.5

To estimate the margin of safety in a complete design
(including heat sink), increase the ambient temperature until
the thermal protection is activated. Use worst-case load and
signal conditions. For good reliability, the thermal protec-
tion should trigger more than +35

C above the maximum

expected ambient condition of your application. This en-
sures a maximum junction temperature of +125

C at the

maximum expected ambient condition.

If the OPA551 or OPA552 is to be used in an application
requiring more than 0.5W continuous power dissipation, it
is recommended that the DDPAK package option be used.
The DDPAK has superior thermal dissipation characteris-
tics and is more easily adapted to a heat sink.

Operation from a single power supply (or unbalanced power
supplies) can produce even larger power dissipation since a
larger voltage can be impressed across the conducting output
transistor. Consult Application Bulletin AB-039 for further
information on how to calculate or measure power dissipation.

Power dissipation can be minimized by using the lowest
possible supply voltage. For example, with a 200mA load,
the output will swing to within 3.5V of the power supply
rails. Power supplies set to no more than 3.5V above the
maximum output voltage swing required by the application
will minimize the power dissipation.

SAFE OPERATING AREA

The Safe Operating Area (SOA curves, Figures 3, 4, and 5)
shows the permissible range of voltage and current. The
curves shown represent devices soldered to a circuit board
with no heat sink. The safe output current decreases as the
voltage across the output transistor (V

) increases. For

further insight on SOA, consult Application Bulletin AB-039.

Output short circuits are a very demanding case for SOA.
A short circuit to ground forces the full power supply
voltage (V+ or V) across the conducting transistor and
produces a typical output current of 380mA. With

30V

OPA551, OPA552

power supplies, this creates an internal dissipation of 11.4W.
This far exceeds the maximum rating and is not recom-
mended. If operation in this region is unavoidable, use the
DDPAK with a heat sink.

HEAT SINKING

Power dissipated in the OPA551 or OPA552 will cause the
junction temperature to rise. For reliable operation, the
junction temperature should be limited to +125

C. Many

applications will require a heat sink to assure that the
maximum operating junction temperature is not exceeded.
The heat sink required depends on the power dissipated and
on ambient conditions.

For heat sinking purposes, the tab of the DDPAK is typically
soldered directly to a circuit board copper area. Increasing
the copper area improves heat dissipation. Figure 6 shows
typical thermal resistance from junction-to-ambient as a
function of copper area.

Depending on conditions, additional heat sinking may be
required. Aavid Thermal Products Inc. manufactures sur-
face-mountable heat sinks designed specifically for use with
DDPAK packages. Further information is available on
Aavid's web site, www.aavid.com.

C above the maximum

expected ambient condition of your application. This pro-
duces a junction temperature of +125

C at the maximum

expected ambient condition.

FIGURE 5. DDPAK-7 Safe Operating Area.

FIGURE 3. DIP-8 Safe Operating Area.

FIGURE 4. SO-8 Safe Operating Area.

FIGURE 6. DDPAK Thermal Resistance vs Circuit Board

Copper Area.

THERMAL RESISTANCE vs

CIRCUIT BOARD COPPER AREA

Copper Area (inches

)

OPA551, OPA552

Surface-Mount Package

1oz. copper

Circuit Board Copper Area

OPA551, OPA552

Surface-Mount Package

Thermal Resistance,

(

C/W)

1000

100

0.1

100

| V

| | V

| (V)

(mA)

SAFE OPERATING AREA--8-PIN DIP

125

1000

100

0.1

100

| V

| | V

| (V)

(mA)

SAFE OPERATING AREA--SO-8

125

1000

100

0.1

100

| V

| | V

| (V)

(mA)

SAFE OPERATING AREA--DDPAK

125

1" Copper

OPA551, OPA552

FIGURE 7. Driving Large Capacitive Loads.

CAPACITIVE LOADS

The dynamic characteristics of the OPA551 and OPA552
have been optimized for commonly encountered gains, loads,
and operating conditions. The combination of low closed-
loop gain and capacitive load will decrease the phase margin
and may lead to gain peaking or oscillations. Figure 7 shows
a circuit that preserves phase margin with capacitive load.
Figure 8 shows the small-signal step response for the circuit
in Figure 7. Consult Application Bulletin AB-028 for more
information.

FIGURE 8. Small-Signal Step Response for Figure 7.

SMALL-SIGNAL STEP RESPONSE

OPA551, G = 1, C

= 10nF

Time (2.5

s/div)

20mV/div

FIGURE 9. Parallel Amplifers Increase Output Current Ca-

pability.

INCREASING OUTPUT CURRENT

In those applications where the 200mA of output current is
not sufficient to drive the desired load, output current can be
increased by connecting two or more OPA551s or OPA552s
in parallel as shown in Figure 9. Amplifier A1 is the
"master" amplifier and may be configured in virtually an op
amp circuit. Amplifier A2, the "slave", is configured as a
unity gain buffer. Alternatively, external output transistors

can be used to boost output current. The circuit in Figure 10
is capable of supplying output currents up to 1A. Alterna-
tively, the OPA547, OPA548, and OPA549 series power op
amps should be considered for high output current drive,
along with programmable current limit and output disable
capability.

FIGURE 10. External Output Transistors Boost Output Cur-

rent Up to 1 Amp.

1.8nF

10nF

OPA551

+30V

30V

220pF

OPA551

"SLAVE"

"MASTER"

(1)

NOTE: (1) R

resistors minimize the circulating

current that can flow between the two devices
due to V

errors.

OPA551

TIP30C

TIP29C

+30V

30V

(1)

100

NOTE: (1) R

provides current limit and allows the amplifier to

drive the load when the output is between 0.7V and 0.7V.

0.2

LOAD

OPA551

OPA551, OPA552

INPUT PROTECTION

The OPA551 and OPA552 feature internal clamp diodes
to protect the inputs when voltages beyond the supply rails
are encountered. However, input current should be limited
to 5mA. In some cases, an external series resistor may be
required. Many input signals are inherently current-limtied,
therefore, a limiting resistor may not be required. Please
consider that a "large" series resistor, in conjunction with
the input capacitance, can affect stability.

USING THE OPA552 IN LOW GAINS

The OPA552 family is intended for applications with
signal gains of 5 or greater, but it is possible to take
advantage of their high slew rate in lower gains using an
external compensation technique in an inverting configu-
ration. This technique maintains low noise characteristics
of the OPA552 architecture at low frequencies. Depending
on the application, a small increase in high frequency
noise may result. This technique shapes the loop gain for
good stability while giving an easily controlled second-
order low-pass frequency response.

Considering only the noise gain (non-inverting signal
gain) for the circuit of Figure 11, the low frequency noise
gain (NG

) will be set by the resistor ratios, while the high

frequency noise gain (NG

) will be set by the capacitor

ratios. The capacitor values set both the transition fre-
quencies and the high frequency noise gain. If this noise
gain, determined by NG

= 1 + C

, is set to a value

greater than the recommended minimum stable gain for
the op amp and the noise gain pole, set by 1/R

, is

placed correctly, a very well controlled, 2nd-order low-
pass frequency response will result.

To choose the values for both C

and C

, two parameters

and only three equations need to be solved. First, the
target for the high frequency noise gain (NG

) should be

greater than the minimum stable gain for the OPA552. In
the circuit in Figure 11, a target NG

of 10 is used.

Second, the signal gain of 1 shown in Figure 11 sets the
low frequency noise gain to NG

= 1 + R

(=2 in this

example). Using these two gains, knowing the Gain Band-
width Product (GBP) for the OPA552 (12MHz), and
targeting a maximally flat 2nd-order, low-pass Butterworth
frequency response (Q = 0.707), the key frequency in the
compensation can be found.

For the values shown in Figure 11, the f

3dB

will be

approximately 956kHz. This is less than that predicted by
simply dividing the GBP by NG

. The compensation

network controls the bandwidth to a lower value while

providing the full slew rate at the output and an excep-
tional distortion performance due to increased loop gain at
frequencies below NG

· Z

. The capacitor values shown

in Figure 11 are calculated for NG

= 2 and NG

= 10 with

no adjustment for parasitics.

Actual circuit values can be optimized by check the
small-signal step response with actual load conditions.
Figure 12 shows the small-signal step response of this
OPA552, G = 1 circuit with a 500pF load. It is well-
behaved with no tendency to oscillate. If C

and C

were

removed, the circuit would be unstable.

FIGURE 11. Compensation of the OPA552 for G = 1.

FIGURE 12. Small-Signal Step Response for Figure 11.

SMALL-SIGNAL STEP RESPONSE

OPA552, G = 1, C

= 500pF

Time (1

s/div)

20mV/div

1.88nF

= 1 + R

= 2

= 1 + C

= 10

OPA552

+30V

30V

OUT

208pF

OPA552

OPA551, OPA552

The offset voltage (V

) of the OPA51 and OPA552 is

specified with a

30V power supply and the common-

mode voltage centered between the supplies (V

/2 =

0V). Additional specifications for power supply rejec-
tion and common-mode rejection are provided to allow
the user to easily calculate worst-case excepted offset
under the conditions of a given application.

Power Supply Rejection Ratio (PSRR) is specified in

V/V. For the OPA551 and OPA552, worst-case PSRR

is 30

V/V, which means for each volt of change in total

power supply voltage, the offset may shift by up to
30

V/V. Common-Mode Rejection Ratio (CMRR) is

specified in dB, which can be converted to

V/V using

the following equation:

CMRR in (V/V) = 10

[(CMRR in dB)/20]

(1)

For the OPA551 and OPA552, the worst-case CMRR at

30mV supply over the full common-mode range is

96dB, or approxmately 15.8

V/V. This means that for

every volt of change in common-mode, the offset may
shift up to 15.8

V. These numbers can be used to

OFFSET VOLTAGE ERROR CALCULATION

calculate excursions from the specified offset voltage
under different applications conditions. For example, a
common application might configure the amplifier with
a 48 single supply with 6V common-mode. This
configuration represents a 12V variation in power sup-
ply:

30V or 60V in the offset specification versus 48V

in the application. In addition, this configuration has an
18V variation in common-mode voltage: V

/2 = 24V is

the specification for these power supplies, but the com-
mon-mode voltage is 6V in the application.

Calculation of the worst-case expected offset would be
as follows:

Worst-case V

(2)

maximum specified V

+ (power supply variation · PSRR

+ (common-mode variation · CMRR)

OSwc

= 5mV + (12V · 30

V/V) + (18V · 15.8

V/V)

5.64mV

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