XEMOD RESERVES THE RIGHT TO MAKE CHANGES TO THIS SPECIFICATION WITHOUT FURTHER NOTICE. BEFORE THE
PRODUCT DESCRIBED HERE IS WRITTEN INTO SPECIFICATIONS OR USED IN CRITICAL APPLICATIONS, THE PERFORMANCE
CHARACTERISTICS SHOULD BE VERIFIED BY CONTACTING XEMOD.
Xemod QuikPAC Data
www.xemod.com
Rev. B (07-26-01) Page 1 of 2
QPP-023
QPP-023
200W,
869-894MHz
QuikPAC Module Data
Class AB Power Stage
General description:
The QPP-023 QuikPACTM RF power module is an impedance
matched Class AB amplifier stage designed for use in the output
stage of linear RF power amplifiers for cellular base stations. The
power transistors are fabricated using Xemod's advanced design
LDMOS process. The gate terminal is connected directly to the
control voltage pin, allowing direct control of the bias. The user must
supply the proper value of V
GS
to set the desired quiescent current.
Features:
Single Polarity Operation
Matched for 50
W RF interfaces
XeMOS FET Technology
Stable Performance
QuikPAC System Compatible
QuikClip or Flange Mounting
Standard Operating Conditions
Parameter
Symbol
Min
Nom
Max
Units
Frequency Range
F
869 894
MHz
Supply (Drain) Voltage
V
D
26.0 28.0 32.0 VDC
Bias (Gate) Voltage
V
G
3.0 3.5 5.0 VDC
Bias (Gate) Current, Average
I
G
2.0
mA
RF Source & Load Impedance
W
50
Ohms
Load Impedance for Stable Operation (All Phases)
VSWR
10:1
Operating Baseplate Temperature
T
OP
-20 +90
C
Output Device Thermal Resistance, Channel to Baseplate
Qjc
0.4 C/W
Maximum Ratings
Parameter
Symbol
Value
Units
Supply (Drain) Voltage
V
D
35 VDC
Control (Gate) Voltage, V
D
= 0 VDC
V
G
15 VDC
Input RF Power
P
IN
20 W
Load Impedance for continuous operation without damage
VSWR
3:1
Output Device Channel Temperature
200
C
Lead Soldering Temperature
+190
C
Storage Temperature
T
STG
-65 to +150
C
Performance at 28VDC & 25C
Parameter
Symbol
Min
Nom
Max
Units
Supply (Drain) Voltage
V
D1,2
27.8 28.0 28.2 VDC
Quiescent Current (total)
I
DQ
1,800 2,000 2,200 mA
Peak Envelope Power at 1 dB Compression (two tone)
P
-1
200 220
W
Gain at 40W PEP (two tone)
G
13.0 13.5
dB
Gain Variation over frequency at 40W Output (two tone)
DG
0.2
0.5
dB
Input Return Loss (50
W Ref) at 40W PEP (two tone)
IRL
12.0 15.0
dB
Drain Efficiency at 200W PEP (two tone)
h
32 36 %
3
rd
Order IMD Product (2 tone at 200W PEP;1 MHz spacing)
-30
-28
dBc
IMD Variation 100 kHz to 25 MHz tone spacing
1.0
2.0
dB
2
nd
Harmonic at 200W P
out
(single tone)
dBc
3
rd
Harmonic at 200W P
out
(single tone)
dBc
Xemod QuikPAC Data
www.xemod.com
Rev. B (07-26-01) Page 2 of 2
QPP-023
Performance at 28VDC & 25C (continued)
Parameter
Symbol
Min
Nom
Max
Units
Group (Signal) Delay
t
d
4.7 4.9 ns
Transmission Phase Flatness
0.5
1.0
degrees
CDMA ACPR at 40W Pout AVG
46 47 dB
CDMA ACPR at 20W Pout AVG
52 53 dB
CDMA Drain Efficiency at 40W Pout AVG
h
20 21 %
CDMA Drain Efficiency at 20W Pout AVG
h
13 15 %
Notes:
This QuikPAC module requires an externally supplied gate voltage (V
GS
) on each gate lead (pins 1 and 5) to set the
operating point (quiescent current- I
DQ
) of the power transistors. V
GS
may be safely set to any voltage in the range listed in
the table. This permits a wide range of quiescent current to be used. Since the operating characteristics of the module will
vary as I
DQ
changes, the bias setting will depend on the application. The data provided in the Performance section of this
data sheet was obtained with I
DQ
set to a value within the range listed (a nominal value 10%). This particular value was
chosen to optimize gain, IMD performance, and efficiency simultaneously.
Gate voltage must be applied coincident with or after application of the drain voltage to prevent potentially destructive
oscillations. Bias voltages should never be applied to a module unless it is terminated on both input and output.
The V
GS
corresponding to a specific I
DQ
will vary from module to module and may vary between the two sides of a dual RF
module by as much as 0.10 volts. This is due to the normal die-to-die variation in threshold voltage of LDMOS transistors.
Since the gate bias of an LDMOS transistor changes with device temperature, it may be necessary to use a V
GS
supply with
thermal compensation if operation over a wide temperature range is required.
Internal RF decoupling is included on all bias leads. No additional bypass elements are required, however some
applications may require energy storage on the drain leads to accommodate time-varying waveforms.
The RF leads are internally protected against DC voltages up to 100V. Care should be taken to avoid video transients that
may damage the active devices.
Package Styles
This model is available in both C (H10549) and CF (H10895) package styles. Style CF is shown for reference. Please see
the applicable outline drawing for specific dimensions.
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