2005 Fairchild Semiconductor Corporation
DS009967
www.fairchildsemi.com
November 1988
Revised March 2005
7
4
AC
5
41
74ACT541 O
c
t
a
l Buff
er/
L
ine
Dri
ver wit
h
3
-
ST
A
T
E
Output
s
74AC541 74ACT541
Octal Buffer/Line Driver with 3-STATE Outputs
General Description
The 74AC541 and 74ACT541 are octal buffer/line drivers
designed to be employed as memory and address drivers,
clock drivers and bus oriented transmitter/receivers.
These devices are similar in function to the 74AC244 and
74ACTC244 while providing flow-through architecture
(inputs on opposite side from outputs). This pinout arrange-
ment makes these devices especially useful as an output
port for microprocessors, allowing ease of layout and
greater PC board density.
Features
s
I
CC
and I
OZ
reduced by 50%
s
3-STATE outputs
s
Inputs and outputs opposite side of package, allowing
easier interface to microprocessors
s
Output source/sink 24 mA
s
74AC541 is a non-inverting option of the 74AC540
s
74ACT541 has TTL-compatible inputs
Ordering Code:
Device also available in Tape and Reel. Specify by appending suffix letter "X" to the ordering code.
Pb-Free package per JEDED J-STD-020B.
Note 1: "_NL" indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.
FACT
is a trademark of Fairchild Semiconductor Corporation.
Order Number
Package
Package Description
Number
74AC541SC
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74AC541SJ
M20D
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74AC541MTC
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74AC541MTCX_NL
(Note 1)
MTC20
Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
74AC541PC
N20A
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
74ACT541SC
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74ACT541MTC
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74ACT541MTCX_NL
(Note 1)
MTC20
Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
74ACT541PC
N20A
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
3
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74
A
C
54
1
74ACT541
Absolute Maximum Ratings
(Note 2)
Recommended Operating
Conditions
Note 2: Absolute maximum ratings are those values beyond which dam-
age to the device may occur. The databook specifications should be met,
without exception, to ensure that the system design is reliable over its
power supply, temperature, and output/input loading variables. Fairchild
does not recommend operation of FACT
circuits outside databook specifi-
cations.
DC Electrical Characteristics for AC
Note 3: All outputs loaded; thresholds on input associated with output under test.
Note 4: Maximum test duration 2.0 ms, one output loaded at a time.
Note 5: I
IN
and I
CC
@ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V V
CC
.
Supply Voltage (V
CC
)
0.5V to
7.0V
DC Input Diode Current (I
IK
)
V
I
0.5V
20 mA
V
I
V
CC
0.5V
20 mA
DC Input Voltage (V
I
)
0.5V to V
CC
0.5V
DC Output Diode Current (I
OK
)
V
O
0.5V
20 mA
V
O
V
CC
0.5V
20 mA
DC Output Voltage (V
O
)
0.5V to V
CC
0.5V
DC Output Source
or Sink Current (I
O
)
r
50 mA
DC V
CC
or Ground Current
per Output Pin (I
CC
or I
GND
)
r
50 mA
Storage Temperature (T
STG
)
65
q
C to
150
q
C
Junction Temperature (T
J
)
PDIP
140
q
C
Supply Voltage (V
CC
)
AC
2.0V to 6.0V
ACT
4.5V to 5.5V
Input Voltage (V
I
)
0V to V
CC
Output Voltage (V
O
)
0V to V
CC
Operating Temperature (T
A
)
40
q
C to
85
q
C
Minimum Input Edge Rate (
'
V/
'
t)
125 mV/ns
AC: V
IN
from 30% to 70% of V
CC
V
CC
@ 3.3V, 4.5V, 5.5V
ACT:V
IN
from 0.8V to 2.0V
V
CC
@ 4.5V, 5.5V
Symbol
Parameter
V
CC
T
A
25
q
C
T
A
40
q
C to
85
q
C
Units
Conditions
(V)
Typ
Guaranteed Limits
V
IH
Minimum HIGH Level
3.0
1.5
2.1
2.1
V
V
OUT
0.1V
Input Voltage
4.5
2.25
3.15
3.15
or V
CC
0.1V
5.5
2.75
3.85
3.85
V
IL
Maximum LOW Level
3.0
1.5
0.9
0.9
V
V
OUT
0.1V
Input Voltage
4.5
2.25
1.35
1.35
or V
CC
0.1V
5.5
2.75
1.65
1.65
V
OH
Minimum HIGH Level
3.0
2.99
2.9
2.9
V
Output Voltage
4.5
4.49
4.4
4.4
I
OUT
50
P
A
5.5
5.49
5.4
5.4
V
V
IN
V
IL
or V
IH
3.0
2.56
2.46
I
OH
12 mA
4.5
3.86
3.76
I
OH
24 mA
5.5
4.86
4.76
I
OH
24 mA (Note 3)
V
OL
Maximum LOW Level
3.0
0.002
0.1
0.1
V
Output Voltage
4.5
0.001
0.1
0.1
I
OUT
50
P
A
5.5
0.001
0.1
0.1
V
V
IN
V
IL
or V
IH
3.0
0.36
0.44
I
OL
12 mA
4.5
0.36
0.44
I
OL
24 mA
5.5
0.36
0.44
I
OL
24 mA (Note 3)
I
IN
(Note 5)
Maximum Input Leakage Current
5.5
r
0.1
r
1.0
P
A V
I
V
CC
, GND
I
OZ
Maximum 3-STATE
P
A
V
I
(OE)
V
IL
, V
IH
Leakage Current
5.5
r
0.25
r
2.5
V
I
V
CC
, GND
V
O
V
CC
, GND
I
OLD
Minimum Dynamic
5.5
75
mA
V
OLD
1.65V Max
I
OHD
Output Current (Note 4)
5.5
75
mA
V
OHD
3.85V Min
I
CC
(Note 5) Maximum Quiescent Supply Current
5.5
4.0
40.0
P
A
V
IN
V
CC
or GND
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4
74AC541
74ACT541
AC Electrical Characteristics for AC
Note 6: Voltage Range 3.3 is 3.3V
r
0.3V
Voltage Range 5.0 is 5.0V
r
0.5V
DC Electrical Characteristics for ACT
Note 7: All outputs loaded; thresholds on input associated with output under test.
Note 8: Maximum test duration 2.0 ms, one output loaded at a time.
V
CC
T
A
25
q
C
T
A
40
q
C to
85
q
C
Symbol
Parameter
(V)
C
L
50 pF
C
L
50 pF
Units
(Note 6)
Min
Typ
Max
Min
Max
t
PLH
Propagation Delay
3.3
2.0
5.5
8.0
1.5
9.0
ns
Data to Output
5.0
1.5
4.0
6.0
1.0
6.5
t
PHL
Propagation Delay
3.3
2.0
5.5
8.0
1.5
8.5
ns
Data to Output
5.0
1.5
4.0
6.0
1.0
6.5
t
PZH
Output Enable Time
3.3
3.0
8.0
11.5
3.0
12.5
ns
5.0
2.0
6.0
8.5
1.5
9.5
t
PZL
Output Enable Time
3.3
2.5
7.0
10.0
2.5
11.5
ns
5.0
1.5
5.5
7.5
1.0
8.5
t
PHZ
Output Disable Time
3.3
3.5
9.0
12.5
2.5
14.0
ns
5.0
2.0
7.0
9.5
1.0
10.5
t
PLZ
Output Disable Time
3.3
2.5
6.5
9.5
2.0
10.5
ns
5.0
2.0
5.5
7.5
1.0
8.5
Symbol
Parameter
V
CC
T
A
25
q
C
T
A
40
q
C to
85
q
C
Units
Conditions
(V)
Typ
Guaranteed Limits
V
IH
Minimum HIGH Level
4.5
1.5
2.0
2.0
V
V
OUT
0.1V
Input Voltage
5.5
1.5
2.0
2.0
or V
CC
0.1V
V
IL
Maximum LOW Level
4.5
1.5
0.8
0.8
V
V
OUT
0.1V
Input Voltage
5.5
1.5
0.8
0.8
or V
CC
0.1V
V
OH
Minimum HIGH Level
3.0
2.99
2.9
2.9
V
I
OUT
50
P
A
Output Voltage
4.5
4.49
4.4
4.4
4.5
3.86
3.76
V
V
IN
V
IL
or V
IH
5.5
4.86
4.76
I
OH
24 mA
I
OH
24 mA (Note 7)
V
OL
Maximum LOW Level
3.0
0.002
0.1
0.1
V
I
OUT
50
P
A
Output Voltage
4.5
0.001
0.1
0.1
4.5
0.36
0.44
V
V
IN
V
IL
or V
IH
5.5
0.36
0.44
I
OH
24 mA
I
OH
24 mA (Note 7)
I
IN
Maximum Input
5.5
r
0.1
r
1.0
P
A V
I
V
CC
, GND
Leakage Current
I
OZ
Maximum 3-STATE
5.5
r
0.25
r
2.5
P
A
V
I
V
IL
, V
IH
Leakage Current
V
O
V
CC
, GND
I
CCT
Maximum I
CC
/Input
5.5
0.6
1.5
mA
V
I
V
CC
2.1V
I
OLD
Minimum Dynamic
5.5
75
mA
V
OLD
1.65V Max
I
OHD
Output Current (Note 8)
5.5
75
mA
V
OHD
3.85V Min
I
CC
Maximum Quiescent
5.5
4.0
40.0
P
A
V
IN
V
CC
or GND
Supply Current
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