2001 Fairchild Semiconductor Corporation
DS011341
www.fairchildsemi.com
February 1992
Revised April 2001
7
4
L
V
Q00 Low
V
o
l
t
age Quad
2
-
I
nput NAND
Gate
74LVQ00
Low Voltage Quad 2-Input NAND Gate
General Description
The LVQ00 contains four 2-input NAND gates.
Features
s
Ideal for low power/low noise 3.3V applications
s
Guaranteed simultaneous switching noise level and
dynamic threshold performance
s
Guaranteed pin-to-pin skew AC performance
s
Guaranteed incident wave switching into 75
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Logic Symbol
IEEE/IEC
Connection Diagram
Pin Descriptions
Order Number
Package Number
Package Description
74LVQ00SC
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
74LVQ00SJ
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Pin Names
Description
A
n
, B
n
Inputs
O
n
Outputs
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2
74L
VQ
00
Absolute Maximum Ratings
(Note 1)
Recommended Operating
Conditions
(Note 2)
Note 1: The "Absolute Maximum Ratings" are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The "Recommended Operating Conditions" table will define the conditions
for actual device operation.
Note 2: Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Note 3: All outputs loaded; thresholds on input associated with output under test.
Note 4: Maximum test duration 2.0 ms, one output loaded at a time.
Note 5: Incident wave switching on transmission lines with impedances as low as 75
for commercial temperature range is guaranteed for 74LVQ.
Note 6: Worst case package.
Note 7: Max number of outputs defined as (n). Data inputs are driven 0V to 3.3V; one output at GND.
Note 8: Max number of Data Inputs (n) switching. (n
-
1) inputs switching 0V to 3.3V. Input-under-test switching: 3.3V to threshold (V
ILD
), 0V to threshold
(V
IHD
), f
=
1 MHz.
Supply Voltage (V
CC
)
-
0.5V to
+
7.0V
DC Input Diode Current (I
IK
)
V
I
=
-
0.5V
-
20 mA
V
I
=
V
CC
+
0.5V
+
20 mA
DC Input Voltage (V
I
)
-
0.5V to V
CC
+
0.5V
DC Output Diode Current (I
OK
)
V
O
=
-
0.5V
-
20 mA
V
O
=
V
CC
+
0.5V
+
20 mA
DC Output Voltage (V
O
)
-
0.5V to V
CC
+
0.5V
DC Output Source or Sink Current (I
O
)
50 mA
DC V
CC
or Ground Current
(I
CC
or I
GND
)
200 mA
Storage Temperature (T
STG
)
-
65
C to
+
150
C
DC Latch-Up Source or Sink Current
100 mA
Supply Voltage (V
CC
)
2.0V to 3.6V
Input Voltage (V
I
)
0V to V
CC
Output Voltage (V
O
)
0V to V
CC
Operating Temperature (T
A
)
-
40
C to
+
85
C
Minimum Input Edge Rate (
V/
t)
V
IN
from 0.8V to 2.0V
V
CC
@ 3.0V
125 mV/ns
Symbol
Parameter
V
CC
T
A
=
+
25
C
T
A
=
-
40
C to
+
85
C
Units
Conditions
(V)
Typ
Guaranteed Limits
V
IH
Minimum High Level
3.0
1.5
2.0
2.0
V
V
OUT
=
0.1V
Input Voltage
or V
CC
-
0.1V
V
IL
Maximum Low Level
3.0
1.5
0.8
0.8
V
V
OUT
=
0.1V
Input Voltage
or V
CC
-
0.1V
V
OH
Minimum High Level
3.0
2.99
2.9
2.9
V
I
OUT
=
-
50
A
Output Voltage
3.0
2.58
2.48
V
IN
=
V
IL
or V
IH
I
OH
=
-
12 mA (Note 3)
V
OL
Maximum Low Level
3.0
0.002
0.1
0.1
V
I
OUT
=
50
A
Output Voltage
3.0
0.36
0.44
V
IN
=
V
IL
or V
IH
I
OL
=
12 mA (Note 3)
I
IN
Maximum Input
3.6
0.1
1.0
A
V
I
=
V
CC
, GND
Leakage Current
I
OLD
Minimum Dynamic
3.6
36
mA
V
OLD
=
0.8V Max (Note 5)
I
OHD
Output Current (Note 4)
3.6
-
25
V
OHD
=
2.0V Min (Note 5)
I
CC
Maximum Quiescent
3.6
2.0
20.0
A
V
IN
=
V
CC
Supply Current
or GND
V
OLP
Quiet Output
3.3
0.6
1.0
V
(Note 6)(Note 7)
Maximum Dynamic V
OL
V
OLV
Quiet Output
3.3
-
0.5
-
1.0
V
(Note 6)(Note 7)
Minimum Dynamic V
OL
V
IHD
Maximum High Level
3.3
1.5
2.0
V
(Note 6)(Note 8)
Dynamic Input Voltage
V
ILD
Maximum Low Level
3.3
1.5
0.8
V
(Note 6)(Note 8)
Dynamic Input Voltage
3
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74
L
V
Q
0
0
AC Electrical Characteristics
Note 9: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t
OSHL
) or LOW-to-HIGH (t
OSLH
). Parameter guaranteed by design.
Capacitance
Note 10: C
PD
is measured at 10 MHz.
T
A
=
+
25
C
T
A
=
-
40
C to
+
85
C
Symbol
Parameter
V
CC
C
L
=
50 pF
C
L
=
50 pF
Units
(V)
Min
Typ
Max
Min
Max
t
PLH
Propagation Delay
2.7
2.0
8.4
13.4
2.0
14.0
ns
3.3
0.3
2.0
7.0
9.5
2.0
10.0
t
PHL
Propagation Delay
2.7
1.5
6.6
11.3
1.0
12.0
ns
3.3
0.3
1.5
5.5
8.0
1.0
8.5
t
OSHL,
Output to Output Skew
2.7
1.0
1.5
1.5
ns
t
OSLH
(Note 9)
3.3
0.3
1.0
1.5
1.5
Symbol
Parameter
Typ
Units
Conditions
C
IN
Input Capacitance
4.5
pF
V
CC
=
Open
C
PD
(Note 10) Power Dissipation Capacitance
22
pF
V
CC
=
3.3V
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4
74L
VQ
00
Physical Dimensions
inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
Package Number M14A
5
www.fairchildsemi.com
7
4
L
V
Q00 Low
V
o
l
t
age Quad
2
-
I
nput NAND
Gate
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M14D
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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