2005 Fairchild Semiconductor Corporation
DS012169
www.fairchildsemi.com
October 1996
Revised June 2005
7
4
VC
X16
245
Lo
w
V
o
lt
age 16-
Bit
Bi
dir
ecti
onal
T
r
anscei
ver wit
h
3.
6V
T
o
l
e
ran
t
Input
s and Output
s
74VCX16245
Low Voltage 16-Bit Bidirectional Transceiver
with 3.6V Tolerant Inputs and Outputs
General Description
The VCX16245 contains sixteen non-inverting bidirectional
buffers with 3-STATE outputs and is intended for bus ori-
ented applications. The device is byte controlled. Each
byte has separate 3-STATE control inputs which can be
shorted together for full 16-bit operation. The T/R inputs
determine the direction of data flow through the device.
The OE inputs disable both the A and B ports by placing
them in a high impedance state.
The 74VCX16245 is designed for low voltage (1.2V to
3.6V) V
CC
applications with I/O compatibility up to 3.6V.
The 74VCX16245 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Features
s
1.2V to 3.6V V
CC
supply operation
s
3.6V tolerant inputs and outputs
s
t
PD
2.5 ns max for 3.0V to 3.6V V
CC
s
Power-off high impedance inputs and outputs
s
Supports live insertion/withdrawal (Note 1)
s
Static Drive (I
OH
/I
OL
)
r
24 mA @ 3.0V V
CC
s
Uses patented noise/EMI reduction circuitry
s
Latchup performance exceeds 300 mA
s
ESD performance:
Human body model
!
2000V
Machine model
!
200V
s
Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA)
Note 1: To ensure the high-impedance state during power up or power
down, OE should be tied to V
CC
through a pull-up resistor; the minimum
value of the resistor is determined by the current-sourcing capability of the
driver.
Ordering Code:
Note 2: Ordering code "G" indicates Trays.
Note 3: Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Logic Symbol
Order Number
Package Number
Package Description
74VCX16245G
(Note 2)(Note 3)
BGA54A
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
74VCX16245MTD
(Note 3)
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
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2
74VCX16245
Connection Diagrams
Pin Assignment of TSSOP
Pin Assignment for FBGA
(Top Thru View)
Pin Descriptions
FBGA Pin Assignments
Truth Tables
H
HIGH Voltage Level
L
LOW Voltage Level
X
Immaterial (HIGH or LOW, inputs and I/O's may not float)
Z
High Impedance
Logic Diagram
Pin Names
Description
OE
n
Output Enable Input (Active LOW)
T/R
n
Transmit/Receive Input
A
0
A
15
Side A Inputs or 3-STATE Outputs
B
0
B
15
Side B Inputs or 3-STATE Outputs
NC
No Connect
1
2
3
4
5
6
A
B
0
NC
T/R
1
OE
1
NC
A
0
B
B
2
B
1
NC
NC
A
1
A
2
C
B
4
B
3
V
CC
V
CC
A
3
A
4
D
B
6
B
5
GND
GND
A
5
A
6
E
B
8
B
7
GND
GND
A
7
A
8
F
B
10
B
9
GND
GND
A
9
A
10
G
B
12
B
11
V
CC
V
CC
A
11
A
12
H
B
14
B
13
NC
NC
A
13
A
14
J
B
15
NC
T/R
2
OE
2
NC
A
15
Inputs
Outputs
OE
1
T/R
1
L
L
Bus B
0
B
7
Data to Bus A
0
A
7
L
H
Bus A
0
A
7
Data to Bus B
0
B
7
H
X
HIGH Z State on A
0
A
7
, B
0
B
7
Inputs
Outputs
OE
2
T/R
2
L
L
Bus B
8
B
15
Data to Bus A
8
A
15
L
H
Bus A
8
A
15
Data to Bus B
8
B
15
H
X
HIGH Z State on A
8
A
15
, B
8
B
15
3
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7
4
VC
X16
245
Absolute Maximum Ratings
(Note 4)
Recommended Operating
Conditions
(Note 6)
Note 4: The "Absolute Maximum Ratings" are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the "Electrical
Characteristics" table are not guaranteed at the Absolute Maximum Rat-
ings. The Recommended Operating Conditions tables will define the condi-
tions for actual device operation.
Note 5: I
O
Absolute Maximum Rating must be observed.
Note 6: Floating or unused pin (inputs or I/O's) must be held HIGH or LOW.
DC Electrical Characteristics
Supply Voltage (V
CC
)
0.5V to
4.6V
DC Input Voltage (V
I
)
0.5V to
4.6V
Output Voltage (V
O
)
Outputs 3-STATE
0.5V to
4.6V
Outputs Active (Note 5)
0.5 to V
CC
0.5V
DC Input Diode Current (I
IK
) V
I
0V
50 mA
DC Output Diode Current (I
OK
)
V
O
0V
50 mA
V
O
!
V
CC
50 mA
DC Output Source/Sink Current
(I
OH
/I
OL
)
r
50 mA
DC V
CC
or Ground Current per
Supply Pin (I
CC
or Ground)
r
100 mA
Storage Temperature Range (T
STG
)
65
q
C to
150
q
C
Power Supply
Operating
1.2V to 3.6V
Input Voltage
0.3V to 3.6V
Output Voltage (V
O
)
Output in Active States
0V to V
CC
Output in 3-STATE
0.0V to 3.6V
Output Current in I
OH
/I
OL
V
CC
3.0V to 3.6V
r
24 mA
V
CC
2.3V to 2.7V
r
18 mA
V
CC
1.65V to 2.3V
r
6 mA
V
CC
1.4V to 1.6V
r
2 mA
V
CC
1.2V
r
100
P
A
Free Air Operating Temperature (T
A
)
40
q
C to
85
q
C
Minimum Input Edge Rate (
'
t/
'
V)
V
IN
0.8V to 2.0V, V
CC
3.0V
10 ns/V
Symbol
Parameter
Conditions
V
CC
Min
Max
Units
(V)
V
IH
HIGH Level Input Voltage
2.7 - 3.6
2.0
V
2.3 - 2.7
1.6
1.65 - 2.3
0.65 x V
CC
1.4 - 1.6
0.65 x V
CC
1.2
0.65 x V
CC
V
IL
LOW Level Input Voltage
2.7 - 3.6
0.8
V
2.3 - 2.7
0.7
1.65 - 2.3
0.35 x V
CC
1.4 - 1.6
0.35 x V
CC
1.2
0.05 x V
CC
V
OH
HIGH Level Output Voltage
I
OH
100
P
A
2.7 - 3.6
V
CC
- 0.2
V
I
OH
12 mA
2.7
2.2
I
OH
18 mA
3.0
2.4
I
OH
24 mA
3.0
2.2
I
OH
100
P
A
2.3 - 2.7
V
CC
- 0.2
I
OH
6 mA
2.3
2.0
I
OH
12 mA
2.3
1.8
I
OH
18 mA
2.3
1.7
I
OH
100
P
A
1.65 - 2.3
V
CC
- 0.2
I
OH
6 mA
1.65
1.25
I
OH
100
P
A
1.4 - 1.6
V
CC
- 0.2
I
OH
2 mA
1.4
1.05
I
OH
100
P
A
1.2
V
CC
- 0.2
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4
74VCX16245
DC Electrical Characteristics
(Continued)
Note 7: Outputs disabled or 3-STATE only.
AC Electrical Characteristics
(Note 8)
Note 8: For C
L
50pF, add approximately 300ps to the AC maximum specification.
Note 9: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t
OSHL
) or LOW-to-HIGH (t
OSLH
).
Symbol
Parameter
Conditions
V
CC
Min
Max
Units
(V)
V
OL
LOW Level Output Voltage
I
OL
100
P
A
2.7 - 3.6
0.2
V
I
OL
12 mA
2.7
0.4
I
OL
18 mA
3.0
0.4
I
OL
24 mA
3.0
0.55
I
OL
100
P
A
2.3 - 2.7
0.2
I
OL
12 mA
2.3
0.4
I
OL
18 mA
2.3
0.6
I
OL
100
P
A
1.65 - 2.3
0.2
I
OL
6 mA
1.65
0.3
I
OL
100
P
A
1.4 - 1.6
0.2
I
OL
2 mA
1.4
0.35
I
OL
100
P
A
1.2
V
CC
- 0.1
I
I
Input Leakage Current
0V
d
V
I
d
3.6V
1.2 - 3.6
r
5.0
P
A
I
OZ
3-STATE Output Leakage
0V
d
V
O
d
3.6V
1.2 - 3.6
r
10
P
A
V
I
V
IH
or V
IL
I
OFF
Power Off Leakage Current
0V
d
(V
I
, V
O
)
d
3.6V
0
10
P
A
I
CC
Quiescent Supply Current
V
I
V
CC
or GND
1.2 - 3.6
20
P
A
V
CC
d
(V
I
, V
O
)
d
3.6V (Note 7)
1.2 - 3.6
r
20
'
I
CC
Increase in I
CC
per Input
V
IH
V
CC
0.6V
2.7 - 3.6
750
P
A
Symbol
Parameter
Conditions
V
CC
T
A
40
q
C to
85
q
C
Units
Figure
(V)
Min
Max
Number
t
PHL
Propagation Delay
C
L
30 pF, R
L
500
:
3.3
r
0.3
0.8
2.5
ns
Figures
1, 2
t
PLH
2.5
r
0.2
1.0
3.0
1.8
r
0.15
1.0
6.0
C
L
15 pF, R
L
2k
:
1.5
r
0.1
1.0
12.0
Figures
5, 6
1.2
1.5
30
t
PZL
Output Enable Time
C
L
30 pF, R
L
500
:
3.3
r
0.3
0.8
3.8
ns
Figures
1, 3, 4
t
PZH
2.5
r
0.2
1.0
4.9
1.8
r
0.15
1.5
9.3
C
L
15 pF, R
L
2k
:
1.5
r
0.1
1.0
18.6
Figures
5, 7, 8
1.2
1.5
46.5
t
PLZ
Output Disable Time
C
L
30 pF, R
L
500
:
3.3
r
0.3
0.8
3.7
ns
Figures
1, 3, 4
t
PHZ
2.5
r
0.2
1.0
4.2
1.8
r
0.15
1.5
7.6
C
L
15 pF, R
L
2k
:
1.5
r
0.1
1.0
15.2
Figures
5, 7, 8
1.2
1.5
38
t
OSHL
Output to Output
C
L
30 pF, R
L
500
:
3.3
r
0.3
0.5
ns
t
OSLH
Skew (Note 9)
2.5
r
0.2
0.5
1.8
r
0.15
0.75
C
L
15 pF, R
L
2k
:
1.5
r
0.1
1.5
1.2
1.5
5
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7
4
VC
X16
245
Dynamic Switching Characteristics
Capacitance
Symbol
Parameter
Conditions
V
CC
T
A
25
q
C
Units
(V)
Typical
V
OLP
Quiet Output Dynamic Peak V
OL
C
L
30 pF, V
IH
V
CC
, V
IL
0V
1.8
0.25
2.5
0.6
V
3.3
0.8
V
OLV
Quiet Output Dynamic Valley V
OL
C
L
30 pF, V
IH
V
CC
, V
IL
0V
1.8
0.25
2.5
0.6
V
3.3
0.8
V
OHV
Quiet Output Dynamic Valley V
OH
C
L
30 pF, V
IH
V
CC
, V
IL
0V
1.8
1.5
2.5
1.9
V
3.3
2.2
Symbol
Parameter
Conditions
T
A
25
q
C
Units
Typical
C
IN
Input Capacitance
V
CC
1.8V, 2.5V, or 3.3V, V
I
0V or V
CC
6
pF
C
I/O
Output Capacitance
V
I
0V, or V
CC
, V
CC
1.8V, 2.5V or 3.3V
7
pF
C
PD
Power Dissipation Capacitance
V
I
0V or V
CC
, F
10 MHz, V
CC
1.8V, 2.5V or 3.3V
20
pF
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