2005 Fairchild Semiconductor Corporation
DS011617
www.fairchildsemi.com
June 1993
Revised February 2005
7
4
VH
C14
Hex Schm
i
t
t
Inver
ter
74VHC14
Hex Schmitt Inverter
General Description
The VHC14 is an advanced high speed CMOS Hex
Schmitt Inverter fabricated with silicon gate CMOS technol-
ogy. It achieves the high speed operation similar to equiva-
lent Bipolar Schottky TTL while maintaining the CMOS low
power dissipation. Pin configuration and function are the
same as the VHC04 but the inputs have hysteresis
between the positive-going and negative-going input
thresholds, which are capable of transforming slowly
changing input signals into sharply defined, jitter-free out-
put signals, thus providing greater noise margin than con-
ventional inverters.
An input protection circuit ensures that 0V to 7V can be
applied to the input pins without regard to the supply volt-
age. This device can be used to interface 5V to 3V systems
and two supply systems such as battery back up. This cir-
cuit prevents device destruction due to mismatched supply
and input voltages.
Features
s
High Speed: t
PD
5.5 ns (typ) at V
CC
5V
s
Low power dissipation: I
CC
2
P
A (Max) at T
A
25
q
C
s
High noise immunity: V
NIH
V
NIL
28% V
CC
(Min)
s
Power down protection is provided on all inputs
s
Low noise: V
OLP
0.8V (Max)
s
Pin and function compatible with 74HC14
Ordering Code:
Pb-Free package per JEDEC J-STD-020B.
Note 1: Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Note 2: "_NL" indicates Pb-Free product (per JEDEC J-STD-020B). Device is available in Tape and Reel only.
Note 3: "_NL" indicates Pb-Free product (per JEDEC J-STD-020B).
Order Number
Package
Number
Package Description
74VHC14M
(Note 1)
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
74VHC14MX_NL
(Note 2)
M14A
Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150"
Narrow
74VHC14SJ
(Note 1)
M14D
Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74VHC14MTC
(Note 1)
MTC14
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74VHC14MTC_NL
(Note 3)
MTC14
Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,
4.4mm Wide
74VHC14MTCX_NL
(Note 2)
MTC14
Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,
4.4mm Wide
74VHC14N
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
3
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7
4
VH
C14
Absolute Maximum Ratings
(Note 4)
Recommended Operating
Conditions
(Note 5)
Note 4: Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. The data book specifica-
tions should be met, without exception, to ensure that the system design is
reliable over its power supply, temperature, and output/input loading vari-
ables. Fairchild does not recommend operation outside databook specifica-
tions.
Note 5: Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Noise Characteristics
Note 6: Parameter guaranteed by design.
Supply Voltage (V
CC
)
0.5V to
7.0V
DC Input Voltage (V
IN
)
0.5V to
7.0V
DC Output Voltage (V
OUT
)
0.5V to V
CC
0.5V
Input Diode Current (I
IK
)
20 mA
Output Diode Current (I
OK
)
r
20 mA
DC Output Current (I
OUT
)
r
25 mA
DC V
CC
/GND Current (I
CC
)
r
50 mA
Storage Temperature (T
STG
)
65
q
C to
150
q
C
Lead Temperature (T
L
)
Soldering (10 seconds)
260
q
C
Supply Voltage (V
CC
)
2.0V to
5.5V
Input Voltage (V
IN
)
0V to
5.5V
Output Voltage (V
OUT
)
0V to V
CC
Operating Temperature (T
OPR
)
40
q
C to
85
q
C
Symbol
Parameter
V
CC
T
A
25
q
C
T
A
40
q
C to
85
q
C
Units
Conditions
Min
Typ
Max
Min
Max
V
P
Positive Threshold Voltage
3.0
2.20
2.20
4.5
3.15
3.15
V
5.5
3.85
3.85
V
N
Negative Threshold Voltage
3.0
0.90
0.90
4.5
1.35
1.35
V
5.5
1.65
1.65
V
H
Hysteresis Voltage
3.0
0.30
1.20
0.30
1.20
4.5
0.40
1.40
0.40
1.40
V
5.5
0.50
1.60
0.50
1.60
V
OH
HIGH Level Output Voltage
2.0
1.9
2.0
1.9
V
IN
V
IL
3.0
2.9
3.0
2.9
V
I
OH
50
P
A
4.5
4.4
4.5
4.4
3.0
2.58
2.48
V
I
OH
4 mA
4.5
3.94
3.80
I
OH
8 mA
V
OL
LOW Level Output Voltage
2.0
0.0
0.1
0.1
V
IN
V
IH
3.0
0.0
0.1
0.1
V
I
OL
50
P
A
4.5
0.0
0.1
0.1
3.0
0.36
0.44
V
I
OL
4 mA
4.5
0.36
0.44
I
OL
8 mA
I
IN
Input Leakage Current
05.5
r
0.1
r
1.0
P
A
V
IN
5.5V or GND
I
CC
Quiescent Supply Current
5.5
2.0
20.0
P
A
V
IN
V
CC
or GND
Symbol
Parameter
V
CC
T
A
25
q
C
Units
Conditions
Typ
Limits
V
OLP
(Note 6)
Quiet Output Maximum Dynamic V
OL
5.0
0.4
0.8
V
C
L
50 pF
V
OLV
(Note 6)
Quiet Output Minimum Dynamic V
OL
5.0
0.4
0.8
V
C
L
50 pF
V
IHD
(Note 6)
Minimum HIGH Level Dynamic Input Voltage
5.0
3.5
V
C
L
50 pF
V
ILD
(Note 6)
Maximum LOW Level Dynamic Input Voltage
5.0
1.5
V
C
L
50 pF
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4
7
4
VH
C14
AC Electrical Characteristics
Note 7: C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average
operating current can be obtained by the equation:
I
CC
(Opr)
C
PD
* V
CC
* f
IN
I
CC
/6 (per Gate)
Symbol
Parameter
V
CC
T
A
25
q
C
T
A
40
q
C to
85
q
C
Units
Conditions
Min
Typ
Max
Min
Max
t
PLH
Propagation Delay
3.3
r
0.3
8.3
12.8
1.0
15.0
ns
C
L
15 pF
t
PHL
Time
10.8
16.3
1.0
18.5
C
L
50 pF
5.0
r
0.5
5.5
8.6
1.0
10.0
ns
C
L
15 pF
7.0
10.6
1.0
12.0
C
L
50 pF
C
IN
Input Capacitance
4
10
10
pF
V
CC
Open
C
PD
Power Dissipation Capacitance
21
pF
(Note 7)
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