October 1987
Revised January 1999
CD401
3BC
Dual
D-T
ype Fli
p
-
F
lop
1999 Fairchild Semiconductor Corporation
DS005946.prf
www.fairchildsemi.com
CD4013BC
Dual D-Type Flip-Flop
General Description
The CD4013B dual D-type flip-flop is a monolithic comple-
mentary MOS (CMOS) integrated circuit constructed with
N- and P-channel enhancement mode transistors. Each
flip-flop has independent data, set, reset, and clock inputs
and "Q" and "Q" outputs. These devices can be used for
shift register applications, and by connecting "Q" output to
the data input, for counter and toggle applications. The
logic level present at the "D" input is transferred to the Q
output during the positive-going transition of the clock
pulse. Setting or resetting is independent of the clock and
is accomplished by a high level on the set or reset line
respectively.
Features
s
Wide supply voltage range:
3.0V to 15V
s
High noise immunity:
0.45 V
DD
(typ.)
s
Low power TTL:
fan out of 2 driving 74L
compatibility:
or 1 driving 74LS
Applications
Automotive
Data terminals
Instrumentation
Medical electronics
Alarm system
Industrial electronics
Remote metering
Computers
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Connection Diagram
Pin Assignments for DIP, SOIC and SOP
Top View
Truth Table
No Change
x
=
Don't Care Case
Note 1: Level Change
Order Number
Package Number
Package Description
CD4013BCM
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150" Narrow
CD4013BCSJ
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
CD4013BCN
N14A
14-Lead Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
CL
(Note 1)
D
R
S
Q
Q
0
0
0
0
1
1
0
0
1
0
x
0
0
Q
Q
x
x
1
0
0
1
x
x
0
1
1
0
x
x
1
1
1
1
3
www.fairchildsemi.com
CD401
3BC
Absolute Maximum Ratings
(Note 2)
(Note 3)
Recommended Operating
Conditions
(Note 3)
Note 2: "Absolute Maximum Ratings" are those values beyond which the
safety of the device cannot be guaranteed, they are not meant to imply that
the devices should be operated at these limits. The tables of "Recom-
mended Operating Conditions" and "Electrical Characteristics" provide con-
ditions for actual device operation.
Note 3: V
SS
=
0V unless otherwise specified.
DC Electrical Characteristics
(Note 3)
Note 4: I
OH
and I
OL
are measured one output at a time.
DC Supply Voltage (V
DD
)
-
0.5 V
DC
to
+
18 V
DC
Input Voltage (V
IN
)
-
0.5 V
DC
to V
DD
+
0.5 V
DC
Storage Temperature Range (T
S
)
-
65
C to
+
150
C
Power Dissipation (P
D
)
Dual-In-Line
700 mW
Small Outline
500 mW
Lead Temperature (T
L
)
(Soldering, 10 seconds)
260
C
DC Supply Voltage (V
DD
)
+
3 V
DC
to
+
15 V
DC
Input Voltage (V
IN
)
0 V
DC
to V
DD
V
DC
Operating Temperature Range (T
A
)
-
40
C to
+
85
C
Symbol
Parameter
Conditions
-
40
C
+
25
C
+
85
C
Units
Min
Max
Min
Typ
Max
Min
Max
I
DD
Quiescent Device
V
DD
=
5V, V
IN
=
V
DD
or V
SS
4.0
4.0
30
A
Current
V
DD
=
10V, V
IN
=
V
DD
or V
SS
8.0
8.0
60
A
V
DD
=
15V, V
IN
=
V
DD
or V
SS
16.0
16.0
120
A
V
OL
LOW Level
|I
O
|
<
1.0
A
Output Voltage
V
DD
=
5V
0.05
0.05
0.05
V
V
DD
=
10V
0.05
0.05
0.05
V
V
DD
=
15V
0.05
0.05
0.05
V
V
OH
HIGH Level
|I
O
|
<
1.0
A
Output Voltage
V
DD
=
5V
4.95
4.95
4.95
V
V
DD
=
10V
9.95
9.95
9.95
V
V
DD
=
15V
14.95
14.95
14.95
V
V
IL
LOW Level
|I
O
|
<
1.0
A
Input Voltage
V
DD
=
5V, V
O
=
0.5V or 4.5V
1.5
1.5
1.5
V
V
DD
=
10V, V
O
=
1.0V or 9.0V
3.0
3.0
3.0
V
V
DD
=
15V, V
O
=
1.5V or 13.5V
4.0
4.0
4.0
V
V
IH
HIGH Level
|I
O
|
<
1.0
A
Input Voltage
V
DD
=
5V, V
O
=
0.5V or 4.5V
3.5
3.5
3.5
V
V
DD
=
10V, V
O
=
1.0V or 9.0V
7.0
7.0
7.0
V
V
DD
=
15V, V
O
=
1.5V or 13.5V
11.0
11.0
11.0
V
I
OL
LOW Level Output
V
DD
=
5V, V
O
=
0.4V
0.52
0.44
0.88
0.36
mA
Current (Note 4)
V
DD
=
10V, V
O
=
0.5V
1.3
1.1
2.25
0.9
mA
V
DD
=
15V, V
O
=
1.5V
3.6
3.0
8.8
2.4
mA
I
OH
HIGH Level Output
V
DD
=
5V, V
O
=
4.6V
-
0.52
-
0.44
-
0.88
-
0.36
mA
Current (Note 4)
V
DD
=
10V, V
O
=
9.5V
-
1.3
-
1.1
-
2.25
-
0.9
mA
V
DD
=
15V, V
O
=
13.5V
-
3.6
-
3.0
-
8.8
-
2.4
mA
I
IN
Input Current
V
DD
=
15V, V
IN
=
0V
-
0.3
-
10
-
5
-
0.3
-
1.0
A
V
DD
=
15V, V
IN
=
15V
0.3
10
-
5
0.3
1.0
A
www.fairchildsemi.com
4
C
D
40
13BC
AC Electrical Characteristics
(Note 5)
T
A
=
25
C, C
L
=
50 pF, R
L
=
200k, unless otherwise noted
Note 5: AC Parameters are guaranteed by DC correlated testing.
Switching Time Waveforms
Symbol
Parameter
Conditions
Min
Typ
Max
Units
CLOCK OPERATION
t
PHL
, t
PLH
Propagation Delay Time
V
DD
=
5V
200
350
ns
V
DD
=
10V
80
160
ns
V
DD
=
15V
65
120
ns
t
THL
, t
TLH
Transition Time
V
DD
=
5V
100
200
ns
V
DD
=
10V
50
100
ns
V
DD
=
15V
40
80
ns
t
WL
, t
WH
Minimum Clock
V
DD
=
5V
100
200
ns
Pulse Width
V
DD
=
10V
40
80
ns
V
DD
=
15V
32
65
ns
t
RCL
, t
FCL
Maximum Clock Rise and
V
DD
=
5V
15
s
Fall Time
V
DD
=
10V
10
s
V
DD
=
15V
5
s
t
SU
Minimum Set-Up Time
V
DD
=
5V
20
40
ns
V
DD
=
10V
15
30
ns
V
DD
=
15V
12
25
ns
f
CL
Maximum Clock
V
DD
=
5V
2.5
5
MHz
Frequency
V
DD
=
10V
6.2
12.5
MHz
V
DD
=
15V
7.6
15.5
MHz
SET AND RESET OPERATION
t
PHL(R)
,
Propagation Delay Time
V
DD
=
5V
150
300
ns
t
PLH(S)
V
DD
=
10V
65
130
ns
V
DD
=
15V
45
90
ns
t
WH(R)
,
Minimum Set and
V
DD
=
5V
90
180
ns
t
WH(S)
Reset Pulse Width
V
DD
=
10V
40
80
ns
V
DD
=
15V
25
50
ns
C
IN
Average Input Capacitance
Any Input
5
7.5
pF
5
www.fairchildsemi.com
CD401
3BC
Physical Dimensions
inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150" Narrow
Package Number M14A
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M14D
PDF 
ZIP