October 1987
Revised January 1999
CD401
7BC
CD402
2BC
Decade Counte
r
/Di
v
i
der w
i
th
10 Decoded O
u
tput
s
Divi
de-
b
y
-
8 Counter
/Di
v
ide
r
wi
th 8
Dec
oded Out
puts
1999 Fairchild Semiconductor Corporation
DS005950.prf
www.fairchildsemi.com
CD4017BC CD4022BC
Decade Counter/Divider with 10 Decoded Outputs
Divide-by-8 Counter/Divider with 8 Decoded Outputs
General Description
The CD4017BC is a 5-stage divide-by-10 Johnson counter
with 10 decoded outputs and a carry out bit.
The CD4022BC is a 4-stage divide-by-8 Johnson counter
with 8 decoded outputs and a carry-out bit.
These counters are cleared to their zero count by a logical
"1" on their reset line. These counters are advanced on the
positive edge of the clock signal when the clock enable sig-
nal is in the logical "0" state.
The configuration of the CD4017BC and CD4022BC per-
mits medium speed operation and assures a hazard free
counting sequence. The 10/8 decoded outputs are nor-
mally in the logical "0" state and go to the logical "1" state
only at their respective time slot. Each decoded output
remains high for 1 full clock cycle. The carry-out signal
completes a full cycle for every 10/8 clock input cycles and
is used as a ripple carry signal to any succeeding stages.
Features
s
Wide supply voltage range:
3.0V to 15V
s
High noise immunity:
0.45 V
DD
(typ.)
s
Low power
Fan out of 2 driving 74L
TTL compatibility:
or 1 driving 74LS
s
Medium speed operation:
5.0 MHz (typ.)
with 10V V
DD
s
Low power:
10
W (typ.)
s
Fully static operation
Applications
Automotive
Instrumentation
Medical electronics
Alarm systems
Industrial electronics
Remote metering
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Connection Diagrams
Pin Assignments for DIP, SOIC and SOP
CD4017B
Top View
Pin Assignments for DIP and SOIC
CD4022B
Top View
Order Number
Package Number
Package Description
CD4017BCM
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
CD4017BCSJ
M16D
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
CD4017BCN
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
CD4022BCM
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
CD4022BCN
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
www.fairchildsemi.com
2
C
D
40
17BC
C
D
40
22BC
Logic Diagrams
CD4017B
Terminal No. 8
=
GND
Terminal No. 16
=
V
DD
CD4022B
Terminal No. 16
=
V
DD
Terminal No. 8
=
GND
3
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CD401
7BC
CD402
2BC
Absolute Maximum Ratings
(Note 1)
(Note 2)
Recommended Operating
Conditions
(Note 2)
Note 1: "Absolute Maximum Ratings" are those values beyond which the
safety of the device cannot be guaranteed, they are not meant to imply that
the devices should be operated at these limits. The table of "Recom-
mended Operating Conditions" and "Electrical Characteristics" provides
conditions for actual device operation.
Note 2: V
SS
=
0V unless otherwise specified.
DC Electrical Characteristics
(Note 2)
Note 3: I
OL
and I
OH
are tested one output at a time.
DC Supply Voltage (V
DD
)
-
0.5 V
DC
to
+
18 V
DC
Input Voltage (V
IN
)
-
0.5 V
DC
to V
DD
+
0.5 V
DC
Storage Temperature (T
S
)
-
65
C to
+
150
C
Power Dissipation (P
D
)
Dual-In-Line
700 mW
Small Outline
500 mW
Lead Temperature (T
L
)
(Soldering, 10 seconds)
260
C
DC Supply Voltage (V
DD
)
+
3 V
DC
to
+
15 V
DC
Input Voltage (V
IN
)
0 to V
DD
V
DC
Operating Temperature Range (T
A
)
-
40
C to
+
85
C
Symbol
Parameter
Conditions
-
40
C
+
25
+
85
C
Units
Min
Max
Min
Typ
Max
Min
Max
I
DD
Quiescent Device
V
DD
=
5V
20
0.5
20
150
A
Current
V
DD
=
10V
40
1.0
40
300
A
V
DD
=
15V
80
5.0
80
600
A
V
OL
LOW Level
|I
O
|
<
1.0
A
Output Voltage
V
DD
=
5V
0.05
0
0.05
0.05
V
V
DD
=
10V
0.05
0
0.05
0.05
V
V
DD
=
15V
0.05
0
0.05
0.05
V
V
OH
HIGH Level
|I
O
|
<
1.0
A
Output Voltage
V
DD
=
5V
4.95
4.95
5
4.95
V
V
DD
=
10V
9.95
9.95
10
9.95
V
V
DD
=
15V
14.95
14.95
15
14.95
V
V
IL
LOW Level
|I
O
|
<
1.0
A
Input Voltage
V
DD
=
5V, V
O
=
0.5V or 4.5V
1.5
1.5
1.5
V
V
DD
=
10V, V
O
=
1.0V or 9.0V
3.0
3.0
3.0
V
V
DD
=
15V, V
O
=
1.5V or 13.5V
4.0
4.0
4.0
V
V
IH
HIGH Level
|I
O
|
<
1.0
A
Input Voltage
V
DD
=
5V, V
O
=
0.5V or 4.5V
3.5
3.5
3.5
V
V
DD
=
10V, V
O
=
1.0V or 9.0V
7.0
7.0
7.0
V
V
DD
=
15V, V
O
=
1.5V or 13.5V
11.0
11.0
11.0
V
I
OL
LOW Level Output
V
DD
=
5V, V
O
=
0.4V
0.52
0.44
0.88
0.36
mA
Current (Note 3)
V
DD
=
10V, V
O
=
0.5V
1.3
1.1
2.25
0.9
mA
V
DD
=
15V, V
O
=
1.5V
3.6
3.0
8.8
2.4
mA
I
OH
HIGH Level Output
V
DD
=
5V, V
O
=
4.6V
-
0.2
-
0.16
-
0.36
-
0.12
mA
Current (Note 3)
V
DD
=
10V, V
O
=
9.5V
-
0.5
-
0.4
-
0.9
-
0.3
mA
V
DD
=
15V, V
O
=
13.5V
-
1.4
-
1.2
-
3.5
-
1.0
mA
I
IN
Input Current
V
DD
=
15V, V
IN
=
0V
-
0.3
-
10
-
5
-
0.3
-
1.0
A
V
DD
=
15V, V
IN
=
15V
0.3
10
-
5
0.3
1.0
A
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4
C
D
40
17BC
C
D
40
22BC
AC Electrical Characteristics
(Note 4)
T
A
=
25
C, C
L
=
50 pF, R
L
=
200k, t
rCL
and t
fCL
=
20 ns, unless otherwise specified
Note 4: AC Parameters are guaranteed by DC correlated testing.
AC Electrical Characteristics
(Note 4)
T
A
=
25
C, C
L
=
50 pF, R
L
=
200k, t
rCL
and t
fCL
=
20 ns, unless otherwise specified
Symbol
Parameter
Conditions
Min
Typ
Max
Units
CLOCK OPERATION
t
PHL,
t
PLH
Propagation Delay Time Carry Out Line
V
DD
=
5V
415
800
ns
V
DD
=
10V
160
320
ns
V
DD
=
15V
130
250
ns
Carry Out Line
V
DD
=
5V
C
L
=
15 pF
240
480
ns
V
DD
=
10V
85
170
ns
V
DD
=
15V
70
140
ns
Decode Out Lines
V
DD
=
5V
500
1000
ns
V
DD
=
10V
200
400
ns
V
DD
=
15V
160
320
ns
t
TLH
, t
THL
Transition Time Carry Out and Decode Out Lines
t
TLH
V
DD
=
5V
200
360
ns
V
DD
=
10V
100
180
ns
V
DD
=
15V
80
130
ns
t
THL
V
DD
=
5V
100
200
ns
V
DD
=
10V
50
100
ns
V
DD
=
15V
40
80
ns
f
CL
Maximum Clock Frequency
V
DD
=
5V
Measured with
1.0
2
MHz
V
DD
=
10V
Respect to Carry
2.5
5
MHz
V
DD
=
15V
Output Line
3.0
6
MHz
t
WL
, t
WH
Minimum Clock Pulse Width
V
DD
=
5V
125
250
ns
V
DD
=
10V
45
90
ns
V
DD
=
15V
35
70
ns
t
rCL
, t
fCL
Clock Rise and Fall Time
V
DD
=
5V
20
s
V
DD
=
10V
15
s
V
DD
=
15V
5
s
t
SU
Minimum Clock Inhibit Data Setup Time
V
DD
=
5V
120
240
ns
V
DD
=
10V
40
80
ns
V
DD
=
15V
32
65
ns
C
IN
Average Input Capacitance
5
7.5
pF
Symbol
Parameter
Conditions
Min
Typ
Max
Units
RESET OPERATION
t
PHL, tPLH
Propagation Delay Time
Carry Out Line
V
DD
=
5V
415
800
ns
V
DD
=
10V
160
320
ns
V
DD
=
15V
130
250
ns
Carry Out Line
V
DD
=
5V
240
480
ns
V
DD
=
10V
C
L
=
15 pF
85
170
ns
V
DD
=
15V
70
140
ns
Decode Out Lines
V
DD
=
5V
500
1000
ns
V
DD
=
10V
200
400
ns
V
DD
=
15V
160
320
ns
t
W
Minimum Reset
V
DD
=
5V
200
400
ns
Pulse Width
V
DD
=
10V
70
140
ns
V
DD
=
15V
55
110
ns
t
REM
Minimum Reset
V
DD
=
5V
75
150
ns
Removal Time
V
DD
=
10V
30
60
ns
V
DD
=
15V
25
50
ns
5
www.fairchildsemi.com
CD401
7BC
CD402
2BC
Timing Diagrams
CD4017B
CD4022B
www.fairchildsemi.com
6
C
D
40
17BC
C
D
40
22BC
Physical Dimensions
inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package Number M16A
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M16D
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.
CD401
7BC
CD402
2BC
Decade Counte
r
/Di
v
i
der w
i
th
10 Decoded O
u
tput
s
Divi
de-
b
y
-
8 Counter
/Di
v
ide
r
wi
th 8
Dec
oded Out
puts
LIFE SUPPORT POLICY
FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-1, 0.300" Wide
Package Number N16E
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