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Электронный компонент: CD4023B

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2000 Fairchild Semiconductor Corporation
DS005956
www.fairchildsemi.com
October 1987
Revised August 2000
CD402
3BC
Buff
ered

T
r
ipl
e

3-
I
nput NAN
D Gate
CD4023BC
Buffered Triple 3-Input NAND Gate
General Description
These triple gates are monolithic complementary MOS
(CMOS) integrated circuits constructed with N- and P-
channel enhancement mode transistors. They have equal
source and sink current capabilities and conform to stan-
dard B series output drive. The devices also have buffered
outputs which improve transfer characteristics by providing
very high gain. All inputs are protected against static dis-
charge with diodes to V
DD
and V
SS
.
Features
s
Wide supply voltage range:
3.0V to 15V
s
High noise immunity:
0.45 V
DD
(typ)
s
Low power TTL compatibility:
fan out of 2 driving 74L or 1 driving 74LS
s
5V10V15V parametric ratings
s
Symmetrical output characteristics
s
Maximum input leakage 1
A at 15V over full
temperature range
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" tot he ordering code.
Connection Diagram
Top View
Block Diagram
1
/
3
Device Shown
*All Inputs Protected by Standard CMOS Input Protection Circuit.
Order Number
Package Number
Package Description
CD4023BCM
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
CD4023BCS
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
CD4023BCN
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
www.fairchildsemi.com
2
C
D
40
23BC
Absolute Maximum Ratings
(Note 1)
(Note 2)
Recommended Operating
Conditions
Note 1: "Absolute Maximum Ratings" are those values beyond which the
safety of the device cannot be guaranteed; they are not meant to imply that
the devices should be operated at these limits. The table of "Recom-
mended Operating Conditions" and "Electrical Characteristics" provides
conditions for actual device operation.
Note 2: V
SS
=
0V unless otherwise specified.
DC Electrical Characteristics
(Note 3)
Note 3: V
SS
=
0V unless otherwise specified.
Note 4: I
OH
and I
OL
are tested one output at a time.
DC Supply Voltage (V
DD
)
-
0.5 V
DC
to
+
18 V
DC
Input Voltage (V
IN
)
-
0.5 V
DC
to V
DD
+
0.5 V
DC
Storage Temp. Range (T
S
)
-
65
C to
+
150
C
Power Dissipation (P
D
)
Dual-In-Line
700 mW
Small Outline
500 mW
Lead Temperature (T
L
)
(Soldering, 10 seconds)
260
C
DC Supply Voltage (V
DD
)
5 V
DC
to 15 V
DC
Input Voltage (V
IN
)
0 V
DC
to V
DD
V
DC
Operating Temperature Range (T
A
)
-
40
C to
+
85
C
Symbol
Parameter
Conditions
-
40
C
+
25
C
+
85
C
Units
Min
Typ
Min
Typ
Max
Min
Max
I
DD
Quiescent Device Current
V
DD
=
5V
1.0
0.004
1.0
7.5
A
V
DD
=
10V
2.0
0.005
2.0
15
V
DD
=
15V
4.0
0.006
4.0
30
V
OL
LOW Level Output Voltage V
DD
=
5V
0.05
0
0.05
0.05
V
V
DD
=
10V
0.05
0
0.05
0.05
V
DD
=
15V
0.05
0
0.05
0.05
V
OH
HIGH Level Output Voltage V
DD
=
5V
4.95
4.95
5
4.95
V
V
DD
=
10V
9.95
9.95
10
9.95
V
DD
=
15V
14.95
14.95
15
14.95
V
IL
LOW Level Input Voltage
V
DD
=
5V, V
O
=
4.5V
1.5
2
1.5
1.5
V
V
DD
=
10V, V
O
=
9.0V
|I
O
|
<
1
A
3.0
4
3.0
3.0
V
DD
=
15V, V
O
=
13.5V
4.0
6
4.0
4.0
V
IH
HIGH Level Input Voltage
V
DD
=
5V, V
O
=
0.5V
3.5
3.5
3
3.5
V
V
DD
=
10V, V
O
=
1.0V
|I
O
|
<
1
A
7.0
7.0
6
7.0
V
DD
=
15V, V
O
=
1.5V
11.0
11.0
9
11.0
I
OL
LOW Level Output Current V
DD
=
5V, V
O
=
0.4V
0.52
0.44
0.88
0.36
mA
(Note 4)
V
DD
=
10V, V
O
=
0.5V
1.3
1.1
2.2
0.90
V
DD
=
15V, V
O
=
1.5V
3.6
3.0
8
2.4
I
OH
HIGH Level Output Current V
DD
=
5V, V
O
=
4.6V
-
0.52
-
0.44
-
0.88
-
0.36
mA
(Note 4)
V
DD
=
10V, V
O
=
9.5V
-
1.3
-
1.1
-
2.2
-
0.90
V
DD
=
15V, V
O
=
13.5V
-
3.6
-
3.0
-
8
-
2.4
I
IN
Input Current
V
DD
=
15V, V
IN
=
0V
-
0.3
-
10
-
5
-
0.3
-
1.0
A
V
DD
=
15V, V
IN
=
15V
0.3
10
-
5
0.3
1.0
3
www.fairchildsemi.com
CD402
3BC
AC Electrical Characteristics
(Note 5)
T
A
=
25
C, C
L
=
50 pF, R
L
=
200k, unless otherwise specified
Note 5: AC Parameters are guaranteed by DC correlated testing.
Note 6: C
PD
determines the no load AC power consumption of any CMOS device.
For complete explanation, see Family Characteristics Application Note AN-90.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
t
PHL
Propagation Delay, HIGH-to-LOW Level
V
DD
=
5V
130
250
ns
V
DD
=
10V
60
100
V
DD
=
15V
40
70
t
PLH
Propagation Delay, LOW-to-HIGH Level
V
DD
=
5V
110
250
ns
V
DD
=
10V
50
100
V
DD
=
15V
35
70
t
THL
,
Transition Time
V
DD
=
5V
90
200
ns
t
TLH
V
DD
=
10V
50
100
V
DD
=
15V
40
80
C
IN
Average Input Capacitance
Any Input
5
7.5
pF
C
PD
Power Dissipation Capacity (Note 6)
Any Gate
17
pF
www.fairchildsemi.com
4
C
D
40
23BC
Physical Dimensions
inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
Package Number M14A
5
www.fairchildsemi.com
CD402
3BC
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M14D
www.fairchildsemi.com
6
CD
4
023BC Buf
f
er
ed T
r
ipl
e

3-I
nput
NAND Gate
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N14A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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