2003 Fairchild Semiconductor Corporation
www.fairchildsemi.com
Rev. 1.0.4
Features
5-CH Balanced Transformerless (BTL) Driver
1-CH (Forward Reverse) Control DC Motor Driver
Operating Supply Voltage (4.5 V ~ 13.2 V)
Built in Thermal Shut Down Circuit (TSD)
Built in Channel Mute Circuit
Built in Power Save Mode Circuit
Built in TSD Monitor Circuit
Built in 2-OP AMPs
Description
The FAN8035 is a monolithic integrated circuit suitable for
a 6-CH motor driver which drives the tracking actuator,
focus actuator, sled motor, spindle motor, and tray motor of
the CDP/CAR-CD/DVDP systems.
48-QFPH-1414
Typical Application
Compact Disk Player
Video Compact Disk Player
Car Compact Disk Player
Digital Video Disk Player
FAN8035
6-CH Motor Driver
Ordering Information
Note:
NL : Lead free Type
Device
Package
Operating Temperature
FAN8035
48-QFPH-1414
-35
C ~ +85C
FAN8035L
48-QFPH-1414
-35
C ~ +85C
FAN8035_NL
note
48-QFPH-1414
-35
C ~ +85C
FAN8035
2
Pin Assignments
1
2
3
4
5
6
7
8
9
27
26
25
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
30
29
28
33
32
31
36
35
34
FAN8035
IN1
-
OUT1
IN2+
IN2
-
OUT2
IN3+
IN3
-
OUT3
10
11
12
DO2
-
PGND1
DO3+
DO3
-
DO4+
DO4
-
DO5+
DO5
-
PGND2
DO6+
IN1+
SVCC
VRE
F
PV
CC1
DO
1
+
DO1
-
DO2+
SG
N
D
PS
MU
TE
12
PV
CC2
DO6
-
IN4+
IN4
-
OUT4
IN5+
IN5
-
OUT
5
FWD
REV
CT
L
MU
TE
34
MU
TE
5
TSD-M
OP
IN1+
OP
IN
1
-
OP
OUT
1
OP
IN
2+
OPI
N
2
-
OP
O
U
T2
FIN
(GND)
FIN
(GND)
FIN
(GND)
FIN
(GND)
FAN8035
3
Pin Definitions
Pin Number
Pin Name
I/O
Pin Function Description
1
IN1-
I
CH1 OP-AMP Input (-)
2
OUT1
O
CH1 OP-AMP Output
3
IN2+
I
CH2 OP-AMP Input (+)
4
IN2-
I
CH2 OP-AMP Input (-)
5
OUT2
O
CH2 OP-AMP Output
6
IN3+
I
CH3 OP-AMP Input (+)
7
IN3-
I
CH3 OP-AMP Input (-)
8
OUT3
O
CH3 OP-AMP Output
9
IN4+
I
CH4 OP-AMP Input (+)
10
IN4-
I
CH4 OP-AMP Input (-)
11
OUT4
O
CH4 OP-AMP Output
12
IN5+
I
CH5 OP-AMP Input (+)
13
IN5-
I
CH5 OP-AMP Input (-)
14
OUT5
O
CH5 OP-AMP Output
15
CTL
I
CH6 Motor Speed Control
16
FWD
I
CH6 Forward Input
17
REV
I
CH6 Reverse Input
18
SGND
-
Signal Ground
19
MUTE12
I
Mute For CH1,2
20
MUTE34
I
Mute For CH3,4
21
MUTE5
I
Mute For CH5
22
TSD-M
O
TSD Monitor
23
PVCC2
-
Power Supply Voltage 2 (For CH5, CH6)
24
DO6-
O
CH6 Drive Ouptut (-)
25
DO6+
O
CH6 Drive Output (+)
26
PGND2
-
Power Ground 2 (FOR CH5, CH6)
27
DO5-
O
CH5 Drive Ouptut (-)
28
DO5+
O
CH5 Drive Output (+)
29
DO4-
O
CH4 Drive Ouptut (-)
30
DO4+
O
CH4 Drive Output (+)
31
DO3-
O
CH3 Drive Ouptut (-)
32
DO3+
O
CH3 Drive Output (+)
FAN8035
4
Pin Definitions
(Continued)
Pin Number
Pin Name
I/O
Pin Function Description
33
PGND1
-
Power Ground 1 (FOR CH1, CH2, CH3, CH4)
34
DO2-
O
CH2 Drive Ouptut (-)
35
DO2+
O
CH2 Drive Output (+)
36
DO1-
O
CH1 Drive Ouptut (-)
37
DO1+
O
CH1 Drive Output (+)
38
PVCC1
-
Power Supply Voltage 1 (FOR CH1, CH2, CH3, CH4)
39
PS
I
Power Save
40
OPOUT2
O
Normal OP-AMP2 output
41
OPIN2-
I
Normal OP-AMP2 Input (-)
42
OPIN2+
I
Normal OP-AMP2 Input (+)
43
VREF
I
Bias Voltage Input
44
SVCC
-
Signal & OPAMPs Supply Voltage
45
OPOUT1
O
Normal OP-AMP1 Output
46
OPIN1-
I
Normal OP-AMP1 Input (-)
47
OPIN1+
I
Normal OP-AMP1 Input (+)
48
IN1+
I
CH1 OP-AMP Intput (+)
FAN8035
5
Internal Block Diagram
-
+
+
-
+
-
+
-
+
-
+
-
PGND1
DO2+
DO2
-
DO3+
DO3
-
DO4+
DO4
-
PGND2
DO5+
DO5
-
DO6+
1
2
3
4
5
6
7
8
9
10
11
12
IN1+
IN1
-
OUT1
IN2+
IN2
-
OUT2
IN3+
IN3
-
OUT3
13
14
15
16
17
18
19
20
21
22
23
24
SGND
TSD-M PVCC2 DO6
-
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
DO1
-
DO1+
PVCC1
VREF
SVCC
OPIN1
-
OPIN1+
T.S.D
MUTE12
POWER SAVE
-
+
OPOUT1
OPIN2
-
OPIN2+
OPOUT2 PS
IN4+
IN4
-
OUT4
IN5+
IN5
-
OUT5
CTL
FWD
REV
+
-
MUTE5
MUTE34
MUTE12
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
MUTE34 MUTE5 TSD-M
40K
10K
FIN
(GND)
FIN
(GND)
FIN
(GND)
FIN
(GND)
Note.
+
-
+
-
40K
10K
Pref
DO+
DO-
Detailed circuit of the output power amp
10K
10K
40K
40K
Pref1 is almost PVCC1 / 2
Pref2 is almost PVCC2 / 2
From input opamp
Vref
S
W
M
S
C
-
+
D
D
FAN8035
6
Equivalent Circuits
Description
Pin No
Internal Circuit
BTL INPUT
&
OP-AMP1 INPUT
1,4,7,10,13,46
3,6,9,12,47,48
OP-AMP2 INPUT
41,42
VREF
43
BTL OP-AMP OUT
&
OP-AMP1 OUT
2,5,8,11,14,45
VCC
VCC
2K
2K
6
3
9
12
47
48
4
1
7
10
13
46
VCC
5K
5K
41
42
VCC
43
1K
1K
5K
VCC
VCC
VCC VCC
5
11
45
2
8
14
FAN8035
7
Equivalent Circuits
(Continued)
Description
Pin No
Internal Circuit
OP-AMP2 OUT
40
MUTE12,34,5
19,20,21
CTL
15
TSD-M
22
VCC
VCC
40
0.05k
0.05k
VCC
20
50K
50K
20K
19
21
15
VCC
1K
39K
22
20k
FAN8035
8
Equivalent Circuits
(Continued)
Description
Pin No
Internal Circuit
PS
39
FWD,REV
16,17
BTL CH1,2,3,4,5
OUTPUT
27,28,29,30,31
32,34,35,36,37
BTL CH6
OUTPUT
24,25
50K
50K
100k
39
VCC
VCC
17
30K
30K
16
30K
30K
VCC
40
7K
VCC
28
30
32
35
37
27
29
31
34
36
40K
vcc
parastic diode
freewheeling diode
vcc
parastic diode
freewheeling diode
VCC
7K
VCC
60K
25
24
FAN8035
9
Absolute Maximum Ratings ( Ta=25
C)
Notes:
1. When mounted on 70mm
70mm 1.6mm PCB.
2. Power dissipation is derated with the rate of -24mW/
C for T
A
25
C.
3. Do not exceed P
D
and SOA.
Recommended Operating Conditions ( Ta=25
C)
Parameter
Symbol
Value
Unit
Maximum Supply Voltage
SVCC
MAX
18
V
PV
CC1
18
V
PV
CC2
18
V
Power Dissipation
P
D
3
note
W
Operating Temperature
T
OPR
-35 ~ +85
C
Storge Temperature
T
STG
-55 ~ +150
C
Maximum Output Current
I
OMAX
1
A
Parameter
Symbol
Min.
Typ.
Max.
Unit
Operating Supply Voltage
SV
CC
4.5
-
13.2
V
PV
CC1
4.5
-
13.2
V
PV
CC2
4.5
-
13.2
V
3,000
2,000
1,000
0
0
25
50
75
100
125
150
175
Pd (mW)
Ambient temperature, Ta [
C]
FAN8035
10
Electrical Characteristics
(SV
CC
= 5V, PV
CC1
= 5V, PV
CC2
= 12V, T
A
= 25
C, unless otherwise specified)
Note :
1. When the voltage at pin39 goes below 0.5V, the power save circuit makes the main bias current sources stop operating. As a
result, the whole circuits are disable. ( The whole circuits mean the driver circuit, the input Op-amp circuit, and the normal
Op-amp circuit.)
2. Guaranteed field.(No EDS/Final test)
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Unit
Quiescent Circuit Current
I
CC
Under no-load
-
30
-
mA
Power Save On Current
I
PS
note1
Under no-load
-
-
1
mA
Power Save On Voltage
V
PSON
Pin39 = Variation
-
-
0.5
V
Power Save Off Voltage
V
PSOFF
Pin39 = Variation
2
-
-
V
Mute12 On Voltage
V
MON12
Pin19 = Variation
-
-
0.5
V
Mute12 Off Voltage
V
MOFF12
Pin19 = Variation
2
-
-
V
Mute34 On Voltage
V
MON34
Pin20 = Variation
-
-
0.5
V
Mute34 Off Voltage
V
MOFF34
Pin20 = Variation
2
-
-
V
Mute5 On Voltage
V
MON5
Pin21 = Variation
-
-
0.5
V
Mute5 Off Voltage
V
MOFF5
Pin21 = Variation
2
-
-
V
BTL DRIVER CIRCUIT
Output Offset Voltage
V
OO
V
IN
= 2.5V
-100
-
+100
mV
Maximum Output Voltage1
V
OM1
R
L
= 10
, CH1,2
2.5
3.5
-
V
Maximum Output Voltage2
V
OM2
R
L
= 18
, CH3,4,5
8.5
10.0
-
V
Closed-loop Voltage Gain
A
VF
V
IN
= 0.1Vrms
16.8
18
19.2
dB
Ripple Rejection Ratio
note2
RR
V
IN
= 0.1Vrms, f = 120Hz
-
60
-
dB
Slew Rate
note2
SR
Square, Vout = 4Vp-p
1
2
-
V/
s
INPUT OPAMP CIRCUIT
Input Offset Voltage1
V
OF1
-
-10
-
+10
mV
Input Bias Current1
I
B1
-
-
-
400
nA
High Level Output Voltage1
V
OH1
-
4.4
4.7
-
V
Low Level Output Voltage1
V
OL1
-
-
0.2
0.5
V
Output Sink Current1
I
SINK1
R
L
= 50
1
2
-
mA
Output Source Current1
I
SOU1
R
L
= 50
1
2
-
mA
Common Mode Input
Range1
note2
Vicm1
-
-0.3
-
4.0
V
Open Loop Voltage Gain1
note2
G
VO1
V
IN
= -75dB
-
80
-
dB
Ripple Rejection Ratio1
note2
RR1
V
IN
= -20dB, f = 120Hz
-
65
-
dB
Common Mode Rejection
Ratio1
note2
CMRR1
V
IN
= -20dB
-
80
-
dB
Slew Rate1
note2
SR1
Square, Vout = 3Vp-p
-
1.5
-
V/
s
FAN8035
11
Electrical Characteristics
(Continued)
(SV
CC
= 5V, PV
CC1
= 5V, PV
CC2
= 12V, T
A
= 25
C, unless otherwise specified)
Note: Guaranteed field.(No EDS/Final test)
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Unit
NORMAL OP AMP CIRCUIT 1
Input Offset Voltage2
V
OF2
-
-10
-
+10
mV
Input Bias Current2
I
B2
-
-
-
400
nA
High Level Output Voltage2
V
OH2
-
4.4
4.7
-
V
Low Level Output Voltage2
V
OL2
-
-
0.2
0.5
V
Output Sink Current2
I
SINK2
R
L
= 50
2
4
-
mA
Output Source Current2
I
SOU2
R
L
= 50
2
4
-
mA
Common Mode Input Range2*
note
Vicm2
-
-0.3
-
4.0
V
Open Loop Voltage Gain2*
note
G
VO2
V
IN
= -75dB
-
80
-
dB
Ripple Rejection Ratio2*
note
RR2
V
IN
= -20dB, f = 120Hz
-
65
-
dB
Common Mode Rejection
Ratio2*
note
CMRR2
V
IN
= -20dB
-
80
-
dB
Slew Rate2*
note
SR2
Square, Vout = 3Vp-p
-
1.5
-
V/
s
NORMAL OP AMP CIRCUIT 2
Input Offset Voltage3
V
OF3
-
-15
-
+15
mV
Input Bias Current3
I
B3
-
-
-
400
nA
High Level Output Voltage3
V
OH3
-
3
3.8
-
V
Low Level Output Voltage3
V
OL3
-
-
1.0
1.5
V
Output Sink Current3
I
SINK3
R
L
= 50
10
-
-
mA
Output Source Current3
I
SOU3
R
L
= 50
10
-
-
mA
Open Loop Voltage Gain3*
note
G
VO3
V
IN
= -75dB
-
80
-
dB
Ripple Rejection Ratio3*
note
RR3
V
IN
= -20dB, f = 120Hz
-
65
-
dB
Common Mode Rejection
Ratio3*
note
CMRR3
V
IN
= -20dB
-
80
-
dB
Slew Rate3*
note
SR3
Square, Vout = 3Vp-p
-
1.5
-
V/
s
TRAY DRIVE CIRTUIT
Input High Level Voltage
V
IH
-
2
-
-
V
Input Low Level Voltage
V
IL
-
-
-
0.5
V
Output Voltage1
V
O1
PV
CC2
= 11V, V
CTL
= 3V,
R
L
= 45
-
6
-
V
Output Voltage2
V
O2
PV
CC2
= 13V, V
CTL
= 4.5V,
R
L
= 45
-
9
-
V
Output Voltage3
V
O3
PV
CC2
= 11V, V
CTL
= 1.5V,
R
L
= 10
2.5
3
3.5
V
Output Load Regulation
V
RL
V
CTL
=3V, I
L
=100mA
400mA
-
300
700
mV
Output Offset Voltage1
V
OO1
V
IN
= 5V, 5V
-40
-
+40
mV
Output Offset Voltage2
V
OO2
V
IN
= 0V, 0V
-40
-
+40
mV
FAN8035
12
Application Information
1. Thermal Shutdown
The TSD circuit is activated at the junction temperature of 160
C and
deactivated at 135
C with the hysteresis of 25C. During the thermal
shutdown, the TSD circuit keeps all the output driver off.
2. CH Mute Function
When the mute pin is high, the TR Q1 is on and Q2 is off, so the bias
circuit is enabled. When the mute pin is low (GND), the TR Q1 is off
and Q2 is on, so the bias circuit is disabled.
During the mute on state, all the circuit blocks except for the variable
regulator remain off, and the low power quiescent state is established.
Truth table is as follows;
3. Power Save Function
When the pin39 is high, the TR Q3 becomes on and Q4 off, so the bias
circuit is enabled. When the pin39 is low (GND) , the TR Q3 becomes
off and Q4 is on, so the bias circuit is disabled.
During the power save on state, this function keeps all the circuit
blocks off, and the low power quiescent state is established.
Truth table is as follows;
4. TDS Monitor Function
Pin22 is TSD monitor pin, which detects the state of the TSD block
and generates the TSD-monitor signal.
In the normal state Q5 is on, and Q6 is off. When the TSD block is
activated Q5 becomes off, and thus the voltage of pin22 keeps low.
Truth table is as follows;
Pin 19, 20, 21
Mute
High
Mute-Off
Low
Mute-On
Pin39
Power Save
High
Power Save Off
Low
Power Save On
TSD Pin22
TSD Off
High
TSD On
Low
Output driver
Bias
Q0
SVCC
IREF
Hysteresis
R1
R2
R3
Ihys
Bias Blocks
(5-CH BTL)
Q1
Q2
SVCC
20
19
21
Main Bias
Q3
Q4
SVCC
39
Q5
Q6
SVCC
20K
VCC
R(external)
22
FAN8035
13
5. Focus, Tracking Actuator, Spindle, Sled Motor Drive Part
The Vref at pin 43 is for eliminating the dc components from the input signals and can set by an exteranl circuit.
The voltage gain from Vin to output is as follows ;
Where
V means just ac component.
The total input to output voltage gain is the sum of the input OP amp network gain and 18dB.
The output stage is the balanced transformerless (BTL) driver.
The bias voltage Vp is expressed as ;
M
10K
10K
10K
10K
40K
60K
62K
DO+
DO-
PVCC1(PVCC2)
40K
40K
40K
VREF
IN+
IN-
OUT
Vin
48
1
3
4
9
10
12
13
2
5
11
14
43
28
27
30
29
32
31
35
34
Vp
Vp
V
DP
+
-
Q
P
6
7
8
37
36
Vin
Vref
V
+
=
DOP
V
D
4 V
+
=
DON
V
D
4
V
=
Vout
DOP DON
8 V
=
=
Gain
20
Vout
V
-------------
log
20
8
log
18dB
=
=
=
V
P
PVCC1 V
DP
V
CESAT
Q
P
(
)
62k
60k 62k
+
--------------------------
V
CESAT
Q
P
+
=
PVCC1 V
DP
V
CESAT
Q
P
1.97
--------------------------------------------------------------------------
=
V
CESAT
Q
P
+
- - - - - - - - - - (1)
FAN8035
14
6. Tray, Changer,panel Motor Drive Part
Rotational direction control
The forward and reverse rotational direction is controlled by FWD (pin16) and REV (pin17) and the input conditions are as
follows;
Where Vp(Power reference voltage) is approximately 3.75V at PV
CC2
=8V according to equation (1).
Motor speed control (When SV
CC
=PV
CC2
=8V)
- The maximum torque is obtained when the pin15(CTL) is open.
- If the voltage of the pin15 (CTL) is 0V, the motor will not operate.
- When the control voltage (pin15) is between 0 and 3.25V, the differential output voltage V(out1,out2) is about two times
of control voltage. The output gain is 6dB.
- When the control voltage is greater than 3.25V, the output voltage is saturated at the 6.5V because of the output swing
limitation.
INPUT
OUTPUT
FWD
REV
OUT 1
OUT 2
State
H
H
Vp
Vp
Brake
H
L
H
L
Forward
L
H
L
H
Reverse
L
L
-
-
Hign impedance
M
24
25
out 1
out 2
D
LEVEL SHIFT
M.S.C
S.W
D
CTL
IN
FWD
REV
IN
16
17
15
V(out1,out2)
V
CTL
0
6.5V
3.25V
FAN8035
15
Test Circuits
37
38
39
40
41
42
43
44
45
46
47
48
9
10
11
12
8
7
6
5
4
1
2
3
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
31
32
33
34
35
36
OP IN (+)
OP IN (-)
OP OUT
CTL
OPIN(+)
OPIN(
-)
OPOUT
FAN8035
IN2+
IN2-
OUT2
IN3+
IN3
-
OUT3
IN4+
IN4
-
OUT4
OP
IN1
+
FWD
REV
SGND
TS
D
_
M
CTL
PS
MUT
E
12
P
V
CC2
DO6
-
DO6+
PGND1
DO5
-
DO5+
DO4
-
DO4+
DO3
-
DO3+
PGND2
29
30
OP IN (+)
OP IN (-)
OP OUT
OP IN (+)
OP IN (-)
OP OUT
OP IN (+)
OP IN (-)
OP OUT
DO2-
INA INB
VREF
2.5
V
A
1
2
3
V
PULSE
V
A
B
1
2
3
V
B
C
D
50
V
CC
1
2
V
OUT
OP
-
AMP
PART
R
L7
I
L
I
L
OUT1
IN1
-
IN1
+
SVCC
VREF
P
V
CC1
DO1
+
DO1
-
DO2+
OP
IN1
-
OP
O
U
T1
OP
IN
2+
OP
IN
2
-
OP
OUT
2
IN5+
IN5
-
OU
T5
MUTE34
MUTE5
R
L1
R
L2
R
L3
R
L4
R
L5
OP IN (+)
OP IN (-)
OP OUT
O
P
IN (
+
)
O
P
IN (
-
)
OP
O
U
T
OP
IN (-)
O
P
IN
(
+
)
OP OUT
+
100
F
+
1
2
50
1000
F
V
CC
RIPPLE
FAN8035
16
Typical Application Circuits 1
[Voltage control mode]
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
M
TRAY
CONTROL
TRAY
INPUT
VREF
FOCUS
INPUT
TRACKING
INPUT
SLED
INPUT
[SERVO PRE AMP]
[CONTROLLER]
FAN8035
M
FOCUS, TRACKING,
MUTE
SLED
SPINDLE
TRACKI
NG
FOCUS
SPINDLE MUTE
M TRAY
IN2+
IN2-
OUT2
IN3
-
OUT3
IN4+
IN4
-
OUT4
OPI
N
1+
FWD
REV
SG
N
D
MUTE5
CTL
PS
MUTE12
PVCC2
DO6
-
DO6+
PGND1
DO5
-
DO5+
DO4
-
DO4+
DO3
-
DO3+
PGND2
DO2-
IN1
+
SVCC
VREF
P
V
CC1
DO
1
+
DO1
-
DO2+
OPI
N
1
-
OPO
U
T1
OP
IN2
+
OP
IN2
-
OP
OUT
2
IN5
-
OUT
5
MUT
E
34
TSD
_
M
IN3+
OUT1
IN1
-
SLED MUTE
POWER SAVE
SPINDLE
INPUT
IN5+
TSD MONITOR
SVCC
PVCC1
PVCC2
pvcc2
FAN8035
17
Typical Application Circuits 2
[
Differential PWM control mode
]
Note:
Radiation pin is connected to the internal GND of the package.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
M
TRAY
CONTROL
TRAY
INPUT
VREF FOCUS
INPUT
TRACKING
INPUT
SLED
INPUT
SPINDLE
INPUT
[SERVO PRE AMP]
[CONTROLLER]
FAN8035
POWER SAVE
FOCUS, TRACKING
MUTE
TRAY
SPINDLE
TRACKI
NG
FOCUS
SPINDLE MUTE
M
IN2+
IN2-
OUT2
IN3
-
OUT3
IN4+
IN4
-
OUT4
OPI
N
1+
FWD
REV
SGND
TSD_
M
CTL
PS
MUTE12
PVCC2
DO6
-
DO6+
PGND1
DO5
-
DO5+
DO4
-
DO4+
DO3
-
DO3+
PGND2
DO2-
IN
1+
SVCC
VREF
P
V
CC1
DO
1
+
DO1
-
DO2+
OP
IN1
-
OPO
U
T
1
OP
IN2
+
OP
IN2
-
OP
O
U
T2
IN5
-
OUT
5
MUTE34
MUTE5
IN3+
OUT1
IN1
-
IN5+
SLED MUTE
TSD MONITOR
M
SLED
SVCC
PVCC1
PVCC2
pvcc2
FAN8035
5/28/03 0.0m 001
Stock#DSxxxxxxxx
2003 Fairchild Semiconductor Corporation
LIFE SUPPORT POLICY
FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER
DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
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