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Электронный компонент: FDC6310P

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April 2001
2001 Fairchild Semiconductor Corporation
FDC6310P Rev C(W)
FDC6310P
Dual P-Channel 2.5V Specified PowerTrench
MOSFET
General Description
These P-Channel 2.5V specified MOSFETs are
produced using Fairchild Semiconductor's advanced
PowerTrench process that has been especially tailored
to minimize on-state resistance and yet maintain low
gate charge for superior switching performance.
These devices have been designed to offer exceptional
power dissipation in a very small footprint for
applications where the bigger more expensive SO-8
and TSSOP-8 packages are impractical.
Applications
Load switch
Battery protection
Power management
Features
2.2 A, 20 V. R
DS(ON)
= 125 m
@ V
GS
= 4.5 V
R
DS(ON)
= 190 m
@ V
GS
= 2.5 V
Low gate charge
Fast switching speed
High performance trench technology for extremely
low R
DS(ON)
SuperSOT TM -6 package: small footprint 72%
smaller than standard SO-8); low profile (1mm thick)
D1
S2
G1
D2
S1
G2
SuperSOT -6
TM
3
2
1
4
5
6
Absolute Maximum Ratings
T
A
=25
o
C unless otherwise noted
Symbol
Parameter
Ratings
Units
V
DSS
Drain-Source Voltage
20
V
V
GSS
Gate-Source Voltage
12
V
I
D
Drain Current Continuous
(Note 1a)
2.2
A
Pulsed
6
Power Dissipation for Single Operation
(Note 1a)
0.96
(Note 1b)
0.9
P
D
(Note 1c)
0.7
W
T
J
, T
STG
Operating and Storage Junction Temperature Range
55 to +150
C
Thermal Characteristics
R
JA
Thermal Resistance, Junction-to-Ambient
(Note 1a)
130
C/W
R
JC
Thermal Resistance, Junction-to-Case
(Note 1)
60
C/W
Package Marking and Ordering Information
Device Marking
Device
Reel Size
Tape width
Quantity
.310
FDC6310P
7''
8mm
3000 units
FDC6310P
FDC6310P Rev C(W)
Electrical Characteristics
T
A
= 25C unless otherwise noted
Symbol
Parameter
Test Conditions
Min Typ Max Units
Off Characteristics
BV
DSS
DrainSource Breakdown Voltage V
GS
= 0 V, I
D
= 250
A
20
V
BV
DSS
T
J
Breakdown Voltage Temperature
Coefficient
I
D
= 250
A, Referenced to 25
C
11
mV/
C
I
DSS
Zero Gate Voltage Drain Current
V
DS
= 16 V, V
GS
= 0 V
1
A
I
GSSF
GateBody Leakage, Forward
V
GS
= 12 V,
V
DS
= 0 V
100
nA
I
GSSR
GateBody Leakage, Reverse
V
GS
= 12 V, V
DS
= 0 V
100
nA
On Characteristics
(Note 2)
V
GS(th)
Gate Threshold Voltage
V
DS
= V
GS
, I
D
= 250
A
0.6 1.0 1.5
V
V
GS(th)
T
J
Gate Threshold Voltage
Temperature Coefficient
I
D
= 250
A, Referenced to 25
C
3
mV/
C
R
DS(on)
Static DrainSource
OnResistance
V
GS
= 4.5 V, I
D
= 2.2 A
V
GS
= 2.5 V, I
D
= 1.8 A
V
GS
=4.5 V, I
D
=2.2 A, T
J
=125
C
100
145
137
125
190
184
m
I
D(on)
OnState Drain Current
V
GS
= 4.5 V, V
DS
= 5 V
6
A
g
FS
Forward Transconductance
V
DS
= 5 V,
I
D
= 3.5 A
6
S
Dynamic Characteristics
C
iss
Input Capacitance
337
pF
C
oss
Output Capacitance
88
pF
C
rss
Reverse Transfer Capacitance
V
DS
= 10 V, V
GS
= 0 V,
f = 1.0 MHz
51
pF
Switching Characteristics
(Note 2)
t
d(on)
TurnOn Delay Time
9
18
ns
t
r
TurnOn Rise Time
12
22
ns
t
d(off)
TurnOff Delay Time
10
20
ns
t
f
TurnOff Fall Time
V
DD
= 10 V,
I
D
= 1 A,
V
GS
= 4.5 V, R
GEN
= 6
5
10
ns
Q
g
Total Gate Charge
3.7
5.2
nC
Q
gs
GateSource Charge
0.65
nC
Q
gd
GateDrain Charge
V
DS
= 10 V, I
D
= 2.2 A,
V
GS
= 4.5 V
1.3
nC
DrainSource Diode Characteristics and Maximum Ratings
I
S
Maximum Continuous DrainSource Diode Forward Current
0.8
A
V
SD
DrainSource Diode Forward
Voltage
V
GS
= 0 V, I
S
= 0.8 A
(Note 2)
0.77 1.2
V
Notes:
1. R
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. R
JC
is guaranteed by design while R
CA
is determined by the user's board design.
a) 130
C/W when
mounted on a 0.125
in
2
pad of 2 oz.
copper.
b) 140/W when mounted
on a .004 in
2
pad of 2 oz
copper
c) 180/W when mounted on a
minimum pad.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300
s, Duty Cycle < 2.0%
FDC6310P
FDC6310P Rev C(W)
Typical Characteristics
0
1
2
3
4
5
6
0
0.5
1
1.5
2
2.5
-V
DS
, DRAIN-SOURCE VOLTAGE (V)
-I
D
, DRAIN CURRENT (A)
-3.0V
-2.5V
-2.0V
-1.8V
V
GS
=- 4.5V
-3.5V
0.75
1
1.25
1.5
1.75
2
2.25
2.5
2.75
0
1
2
3
4
5
6
-I
D
, DRAIN CURRENT (A)
R
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
V
GS
= -2.0V
-3.5V
-3.0V
-4.5V
-2.5V
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.6
0.8
1
1.2
1.4
1.6
-50
-25
0
25
50
75
100
125
150
T
J
, JUNCTION TEMPERATURE (
o
C)
R
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
I
D
= -2.2A
V
GS
= -4.5V
0.05
0.1
0.15
0.2
0.25
0.3
0.35
0.4
1
2
3
4
5
-V
GS
, GATE TO SOURCE VOLTAGE (V)
R
DS(ON)
, ON-RESISTANCE (OHM)
I
D
= -2.2 A
T
A
= 125
o
C
T
A
= 25
o
C
Figure 3. On-Resistance Variation with
Temperature.
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
0
1
2
3
4
5
0.5
1
1.5
2
2.5
3
-V
GS
, GATE TO SOURCE VOLTAGE (V)
-I
D
, DRAIN CURRENT (A)
T
A
= -55
o
C
125
o
C
V
DS
= -5V
25
o
C
0.0001
0.001
0.01
0.1
1
10
100
0
0.2
0.4
0.6
0.8
1
1.2
1.4
-V
SD
, BODY DIODE FORWARD VOLTAGE (V)
-I
S
, REVERSE DRAIN CURRENT (A)
T
A
= 125
o
C
25
o
C
-55
o
C
V
GS
= 0V
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDC6310P
FDC6310P Rev C(W)
Typical Characteristics
0
1
2
3
4
5
0
1
2
3
4
5
Q
g
, GATE CHARGE (nC)
-V
GS
, GATE-SOURCE VOLTAGE (V)
I
D
= -2.2A
V
DS
=- 5V
-15V
-10V
0
100
200
300
400
500
600
0
5
10
15
20
-V
DS
, DRAIN TO SOURCE VOLTAGE (V)
CAPACITANCE (pF)
C
ISS
C
RSS
C
OSS
f = 1MHz
V
GS
= 0 V
Figure 7. Gate Charge Characteristics.
Figure 8. Capacitance Characteristics.
0.01
0.1
1
10
100
0.1
1
10
100
-V
DS
, DRAIN-SOURCE VOLTAGE (V)
-I
D
, DRAIN CURRENT (A)
DC
10s
1s
100ms
R
DS(ON)
LIMIT
V
GS
= -4.5V
SINGLE PULSE
R
JA
= 180
o
C/W
T
A
= 25
o
C
10ms
0
1
2
3
4
5
0.01
0.1
1
10
100
1000
t
1
, TIME (sec)
P(pk), PEAK TRANSIENT POWER (W)
SINGLE PULSE
R
JA
= 180C/W
T
A
= 25C
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum
Power Dissipation.
0.001
0.01
0.1
1
0.0001
0.001
0.01
0.1
1
10
100
1000
t
1
, TIME (sec)
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESISTANCE
R
JA
(t) = r(t) + R
JA
R
JA
= 180C/W
T
J
- T
A
= P * R
JA
(t)
Duty Cycle, D = t
1
/ t
2
P(pk)
t
1
t
2
SINGLE PULSE
0.01
0.02
0.05
0.1
0.2
D = 0.5
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient themal response will change depending on the circuit board design.
FDC6310P
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
LIFE SUPPORT POLICY
FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Formative or
In Design
First Production
Full Production
Not In Production
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
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