June 1998
FDC655AN
Single N-Channel, Logic Level, PowerTrench
TM
MOSFET
General Description
Features
Absolute Maximum Ratings
T
A
= 25C unless otherwise note
Symbol Parameter
FDC655AN
Units
V
DSS
Drain-Source Voltage
30
V
V
GSS
Gate-Source Voltage - Continuous
20
V
I
D
Drain Current - Continuous
(Note 1a)
6.3
A
- Pulsed
20
P
D
Maximum Power Dissipation
(Note 1a)
1.6
W
(Note 1b)
0.8
T
J
,T
STG
Operating and Storage Temperature Range
-55 to 150
C
THERMAL CHARACTERISTICS
R
JA
Thermal Resistance, Junction-to-Ambient
(Note 1a)
78
C/W
R
JC
Thermal Resistance, Junction-to-Case
(Note 1)
30
C/W
FDC655AN Rev.C
This N-Channel Logic Level MOSFET is produced using
Fairchild Semiconductor's advanced PowerTrench process
that has been especially tailored to minimize on-state
resistance and yet maintain superior switching performance.
These devices are well suited for low voltage and battery
powered applications where low in-line power loss and fast
switching are required.
6.3 A, 30 V. R
DS(ON)
= 0.027
@ V
GS
= 10 V
R
DS(ON)
= 0.035
@ V
GS
= 4.5 V.
Fast switching.
Low gate charge ( typical 9 nC)
.
SuperSOT
TM
-6 package: small footprint (72% smaller than
SO-8); low profile (1mm thick); pin compatible with
TSOP-6.
SOIC-16
SOT-23
SuperSOT
TM
-8
SO-8
SOT-223
SuperSOT
TM
-6
3
5
6
4
1
2
3
D
D
D
S
D
G
SuperSOT -6
TM
.55A
pin
1
1998 Fairchild Semiconductor Corporation
ELECTRICAL CHARACTERISTICS
(T
A
= 25C unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
OFF CHARACTERISTICS
BV
DSS
Drain-Source Breakdown Voltage
V
GS
= 0 V, I
D
= 250 A
30
V
BV
DSS
/
T
J
Breakdown Voltage Temp. Coefficient
I
D
= 250 A, Referenced to 25
o
C
23
mV /
o
C
I
DSS
Zero Gate Voltage Drain Current
V
DS
= 24 V, V
GS
= 0 V
1
A
T
J
= 55
o
C
10
A
I
GSSF
Gate - Body Leakage, Forward
V
GS
= 20 V, V
DS
= 0 V
100
nA
I
GSSR
Gate - Body Leakage, Reverse
V
GS
= -20 V, V
DS
= 0 V
-100
nA
ON CHARACTERISTICS
(Note 2)
V
GS(th)
Gate Threshold Voltage
V
DS
= V
GS
, I
D
= 250 A
1
1.6
3
V
V
GS(th)
/
T
J
Gate Threshold VoltageTemp.Coefficient
I
D
= 250 A, Referenced to 25
o
C
-4.2
mV /
o
C
R
DS(ON)
Static Drain-Source On-Resistance
V
GS
= 10 V, I
D
= 6.3 A
0.023
0.027
T
J
= 125
o
C
0.035
0.045
V
GS
= 4.5 V, I
D
= 5.5 A
0.029
0.035
I
D(on)
On-State Drain Current
V
GS
= 10 V, V
DS
= 5 V
20
A
g
FS
Forward Transconductance
V
DS
= 10 V, I
D
= 6.3 A
4.5
S
DYNAMIC CHARACTERISTICS
C
iss
Input Capacitance
V
DS
= 15 V, V
GS
= 0 V,
830
pF
C
oss
Output Capacitance
f = 1.0 MHz
185
pF
C
rss
Reverse Transfer Capacitance
80
pF
SWITCHING CHARACTERISTICS
(Note 2)
t
D(on)
Turn - On Delay Time
V
DD
= 15 V, I
D
= 1 A,
6
12
ns
t
r
Turn - On Rise Time
V
GS
= 10 V, R
GEN
= 6
10
18
ns
t
D(off)
Turn - Off Delay Time
18
29
ns
t
f
Turn - Off Fall Time
5
12
ns
Q
g
Total Gate Charge
V
DS
= 15 V, I
D
= 6.3 A,
9
13
nC
Q
gs
Gate-Source Charge
V
GS
= 5 V
2.8
nC
Q
gd
Gate-Drain Charge
3.1
nC
DRAIN-SOURCE DIODE CHARACTERISTICS
I
S
Continuous Source Diode Current
1.3
A
V
SD
Drain-Source Diode Forward Voltage
V
GS
= 0 V, I
S
= 1.3 A
(Note 2)
0.73
1.2
V
Notes:
1. R
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
JC
is guaranteed by
design while R
CA
is determined by the user's board design.
a. 78
o
C/W when mounted on a minimum on a 1 in
2
pad of 2oz Cu in FR-4 board.
b. 156
o
C/W when mounted on a minimum pad of 2oz Cu in FR-4 board.
2. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0%.
FDC655AN Rev.C
FDC655AN Rev.B
0
1
2
3
0
5
10
15
20
25
V , DRAIN-SOURCE VOLTAGE (V)
I , DRAIN-SOURCE CURRENT (A)
V = 10V
GS
3.5V
4.5V
2.5V
DS
D
6.0V
3.0V
0
5
10
15
20
25
0.5
1
1.5
2
I , DRAIN CURRENT (A)
DRAIN-SOURCE ON-RESISTANCE
V = 3.5V
GS
10V
4.0V
4.5V
D
7.0V
R , NORMALIZED
5.0V
DS(ON)
Typical Electrical Characteristics
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
Figure 3. On-Resistance Variation
with Temperature.
Figure 5. Transfer Characteristics.
0
0.2
0.4
0.6
0.8
1
1.2
1.4
0.0001
0.001
0.01
0.1
1
5
20
V , BODY DIODE FORWARD VOLTAGE (V)
I , REVERSE DRAIN CURRENT (A)
T = 125C
A
25C
-55C
V = 0V
GS
SD
S
Figure 6. Body Diode Forward Voltage
Variation with Source
Current
Figure 4. On-Resistance Variation with
Gate-To-Source Voltage.
-50
-25
0
25
50
75
100
125
150
0.6
0.8
1
1.2
1.4
1.6
T , JUNCTION TEMPERATURE (C)
DRAIN-SOURCE ON-RESISTANCE
J
V = 10 V
GS
I = 6.3 A
D
R , NORMALIZED
DS(ON)
2
4
6
8
10
0
0.02
0.04
0.06
0.08
0.1
V , GATE TO SOURCE VOLTAGE (V)
GS
R , ON-RESISTANCE (OHM)
DS(ON)
T = 25C
A
I = 3.2A
D
T = 125C
A
T = -55C
A
1
2
3
4
5
0
5
10
15
20
25
V , GATE TO SOURCE VOLTAGE (V)
I , DRAIN CURRENT (A)
GS
25C
125C
V = 5V
DS
D
FDC655AN Rev.B
Figure 10. Single Pulse Maximum Power
Dissipation.
0.1
0.5
1
2
5
10
30
50
100
200
500
1000
2000
V , DRAIN TO SOURCE VOLTAGE (V)
CAPACITANCE (pF)
DS
C iss
f = 1 MHz
V = 0V
GS
C oss
C rss
Figure 8. Capacitance Characteristics.
Figure 7. Gate Charge Characteristics.
Figure 9. Maximum Safe Operating Area.
Typical Electrical Characteristics
0.05
0.1
0.2
0.5
1
2
5
10
20 30
50
0.01
0.05
0.1
0.5
1
5
20
50
V , DRAIN-SOURCE VOLTAGE (V)
I , DRAIN CURRENT (A)
DS
D
RDS(ON) LIMIT
V = 10V
SINGLE PULSE
R =156C/W
T = 25C
GS
A
JA
DC
1s
10ms
100ms
1ms
100us
0.01
0.1
1
10
100
300
0
1
2
3
4
5
SINGLE PULSE TIME (SEC)
POWER (W)
SINGLE PULSE
R =156 C/W
T = 25C
JA
A
0.00001
0.0001
0.001
0.01
0.1
1
10
100
300
0.005
0.01
0.02
0.05
0.1
0.2
0.5
1
t , TIME (sec)
TRANSIENT THERMAL RESISTANCE
r(t), NORMALIZED EFFECTIVE
1
Single Pulse
D = 0.5
0.1
0.05
0.02
0.01
0.2
Duty Cycle, D = t / t
1
2
R (t) = r(t) * R
R = 156 C/W
T - T = P * R (t)
A
J
P(pk)
t
1
t
2
JA
JA
JA
JA
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in note 1b.
Transient thermal response will change depending on the circuit board design.
0
3
6
9
12
15
18
0
2
4
6
8
10
Q , GATE CHARGE (nC)
V , GATE-SOURCE VOLTAGE (V)
g
GS
I = 6.3A
D
10V
15V
V = 5V
DS
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