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Электронный компонент: FDV301N

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March 1999
FDV301N
Digital FET , N-Channel
General Description Features
Absolute Maximum Ratings
T
A
= 25
o
C unless other wise noted
Symbol
Parameter
FDV301N
Units
V
DSS
, V
CC
Drain-Source Voltage, Power Supply Voltage
25
V
V
GSS
, V
I
Gate-Source Voltage, V
IN
8
V
I
D
, I
O
Drain/Output Current
- Continuous
0.22
A
0.5
P
D
Maximum Power Dissipation
0.35
W
T
J
,T
STG
Operating and Storage Temperature Range
-55 to 150
C
ESD
Electrostatic Discharge Rating MIL-STD-883D
Human Body Model (100pf / 1500 Ohm)
6.0
kV
THERMAL CHARACTERISTICS
R
JA
Thermal Resistance, Junction-to-Ambient
357
C/W
FDV301N Rev.F
25 V, 0.22 A continuous, 0.5 A Peak.
R
DS(ON)
= 5
@ V
GS
= 2.7 V
R
DS(ON)
= 4
@ V
GS
= 4.5 V.
Very low level gate drive requirements allowing direct
operation in 3V circuits. V
GS(th)
< 1.5V.
Gate-Source Zener for ESD ruggedness.
>6kV Human Body Model
Replace multiple NPN digital transistors with one DMOS
FET.
This N-Channel logic level enhancement mode field effect
transistor is produced using Fairchild's proprietary, high cell
density, DMOS technology. This very high density process is
especially tailored to minimize on-state resistance. This
device has been designed especially for low voltage
applications as a replacement for digital transistors. Since
bias resistors are not required, this one N-channel FET can
replace several different digital transistors, with different bias
resistor values.
Mark:301
SOT-23
SuperSOT
TM
-8
SOIC-16
SO-8
SOT-223
SuperSOT
TM
-6
D
G
S
D
S
G
IN
GND
Vcc
I N V E R T E R A P P L I C A T I O N
OUT
1999 Fairchild Semiconductor Corporation
Inverter Electrical Characteristics
(T
A
= 25C unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
I
O (off)
Zero Input Voltage Output Current
V
CC
= 20 V, V
I
= 0 V
1
A
V
I
(off)
Input Voltage
V
CC
= 5 V, I
O
= 10 A
0.5
V
V
I
(on)
V
O
= 0.3 V, I
O
= 0.005 A
1
V
R
O (on)
Output to Ground Resistance
V
I
= 2.7 V, I
O
= 0.2 A
4
5
Electrical Characteristics
(T
A
= 25
O
C unless otherwise noted )
Symbol
Parameter
Conditions
Min
Typ
Max
Units
OFF CHARACTERISTICS
BV
DSS
Drain-Source Breakdown Voltage
V
GS
= 0 V, I
D
= 250 A
25
V
BV
DSS
/
T
J
Breakdown Voltage Temp. Coefficient
I
D
= 250 A, Referenced to 25
o
C
25
mV /
o
C
I
DSS
Zero Gate Voltage Drain Current
V
DS
= 20 V, V
GS
= 0 V
1
A
T
J
= 55C
10
A
I
GSS
Gate - Body Leakage Current
V
GS
= 8 V, V
DS
= 0 V
100
nA
ON CHARACTERISTICS
(Note)
V
GS(th)
/
T
J
Gate Threshold Voltage Temp. Coefficient
I
D
= 250 A, Referenced to 25
o
C
-2.1
mV /
o
C
V
GS(th)
Gate Threshold Voltage
V
DS
= V
GS
, I
D
= 250 A
0.65
0.85
1.5
V
R
DS(ON)
Static Drain-Source On-Resistance
V
GS
= 2.7 V, I
D
= 0.2 A
3.8
5
T
J
=125C
6.3
9
V
GS
= 4.5 V, I
D
= 0.4 A
3.1
4
I
D(ON)
On-State Drain Current
V
GS
= 2.7 V, V
DS
= 5 V
0.2
A
g
FS
Forward Transconductance
V
DS
= 5 V, I
D
= 0.4 A
0.2
S
DYNAMIC CHARACTERISTICS
C
iss
Input Capacitance
V
DS
= 10 V, V
GS
= 0 V,
f = 1.0 MHz
9.5
pF
C
oss
Output Capacitance
6
pF
C
rss
Reverse Transfer Capacitance
1.3
pF
SWITCHING CHARACTERISTICS
(Note)
t
D(on)
Turn - On Delay Time
V
DD
= 6 V, I
D
= 0.5 A,
V
GS
= 4.5 V, R
GEN
= 50
3.2
8
ns
t
r
Turn - On Rise Time
6
15
ns
t
D(off)
Turn - Off Delay Time
3.5
8
ns
t
f
Turn - Off Fall Time
3.5
8
ns
Q
g
Total Gate Charge
V
DS
= 5 V, I
D
= 0.2 A,
V
GS
= 4.5 V
0.49
0.7
nC
Q
gs
Gate-Source Charge
0.22
nC
Q
gd
Gate-Drain Charge
0.07
nC
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
I
S
Maximum Continuous Drain-Source Diode Forward Current
0.29
A
V
SD
Drain-Source Diode Forward Voltage
V
GS
= 0 V, I
S
= 0.29 A
(Note)
0.8
1.2
V
Note:
Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0%.
FDV301N Rev.F
FDV301N Rev.F
0
0 .5
1
1 .5
2
2 .5
3
0
0 .1
0 .2
0 .3
0 .4
0 .5
V , DRAIN-SOURCE VOLTAGE (V)
I , DRAI
N
-SOURCE C
U
RRE
NT (A)
3 .5
2 .7
2 .5
V = 4.5V
GS
4 .0
2 .0
1 .5
DS
D
3 .0
0
0 .1
0 .2
0 .3
0 .4
0 .5
0 .6
0 .8
1
1 .2
1 .4
I , DRAIN CURRENT (A)
DRAIN-SOURCE ON-RESISTANCE
V = 2 .0V
GS
2 .7
3 .0
4 .0
4 .5
D
3 .5
2 .5
R
DS(on
)
, NORMALIZED
Typical Electrical Characteristics
Figure 1. On-Region Characteristics
.
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage
.
-50
-25
0
25
50
75
100
125
150
0.6
0.8
1
1.2
1.4
1.6
1.8
T , JUNCTION TEMPERATURE (C)
DRAIN-SOURCE ON-RESISTANCE
J
V = 2.7 V
GS
I = 0.2A
D
R , NORMALIZED
DS(ON)
Figure 3.
On-Resistance Variation
with Temperature
.
0 .5
1
1 .5
2
2 .5
0
0 .0 5
0 .1
0 .1 5
0 .2
V , GATE TO SOURCE VOLTAGE (V)
I , DR
A
IN CURRENT (A)
25C
1 2 5 C
V = 5.0 V
DS
GS
D
T = -55C
J
Figure 5. Transfer Characteristics.
0.2
0.4
0.6
0.8
1
1.2
0.0001
0.001
0.01
0.1
0.2
0.5
V , BODY DIODE FORW A RD VOLTAGE (V)
I , REVERSE DR
A
IN CURRENT (A)
T = 125C
J
25C
-55C
V = 0V
GS
SD
S
Figure 6.
Body Diode Forward Voltage
Variation with Source Current and Temperature.
Figure 4.
On Resistance
Variation with
Gate-To-Source Voltage.
2
2.5
3
3.5
4
0
3
6
9
12
15
V , GATE TO SOURCE VOLTAGE (V)
GS
R , ON-RESISTANCE (OHM)
DS(on)
125C
25C
I = 0.2A
D
FDV301N Rev.F
0
0.1
0.2
0.3
0.4
0.5
0.6
0
1
2
3
4
5
Q , GATE CHARGE (nC)
V , GATE-SOURCE VOLTAGE (V)
g
GS
I = 0.2A
D
15V
V = 5V
DS
10V
0 .5
1
2
5
1 0
1 5
2 5
3 5
0 .0 1
0 .0 2
0 .0 5
0 .1
0 .2
0 .5
1
V , DRAI N -SOURCE VOLTAGE (V)
I , DR
A
I
N CURRENT (A)
DS
D
DC
1s
100
m s
10
s
1 m
s
RDS(ON) LI
M
IT
V = 2.7V
SINGLE PULSE
R = 357 C/ W
T = 25C
GS
A
J A
0.001
0.01
0.1
1
10
100
300
0
1
2
3
4
5
SINGLE PULSE TIME (SEC)
POWER (W)
SINGLE PULSE
R =357 C/W
T = 25C
JA
A
Figure 10. Single Pulse Maximum Power
Dissipation.
Figure 11. Transient Thermal Response Curve.
0 .1
0 .5
1
2
5
1 0
2 5
1
2
3
5
1 0
2 0
3 0
V , DRAIN TO SOURCE VOLTAGE (V)
CAPACITANCE (pF)
DS
C
iss
f = 1 M H z
V = 0V
GS
C
oss
C
rss
Figure 8. Capacitance Characteristics
.
Figure 7. Gate Charge Characteristics.
Figure 9. Maximum Safe Operating Area.
Typical Electrical And Thermal Characteristics
0 . 0 0 0 1
0 . 0 0 1
0 . 0 1
0.1
1
1 0
1 0 0
3 0 0
0 . 0 0 1
0 . 0 0 2
0 . 0 0 5
0 . 0 1
0 . 0 2
0 . 0 5
0.1
0.2
0.5
1
t , TIM E (sec)
TRANSIENT TH
ER
MA
L RESISTA
N
CE
Duty Cycle, D = t /t
1
2
R (t) = r(t) * R
R = 357 C/W
JA
JA
JA
T - T = P * R (t)
JA
A
J
P(pk)
t
1
t
2
r(t), NORMALIZED EFFECTIVE
1
Single Pulse
D = 0.5
0 .1
0 .05
0 .02
0.01
0 .2
TRADEMARKS
ACExTM
CoolFETTM
CROSSVOLTTM
E
2
CMOS
TM
FACTTM
FACT Quiet SeriesTM
FAST
FASTrTM
GTOTM
HiSeCTM
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
LIFE SUPPORT POLICY
FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
ISOPLANARTM
MICROWIRETM
POPTM
PowerTrenchTM
QSTM
Quiet SeriesTM
SuperSOTTM-3
SuperSOTTM-6
SuperSOTTM-8
TinyLogicTM
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Formative or
In Design
First Production
Full Production
Not In Production
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FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
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