www.docs.chipfind.ru
2002 Fairchild Semiconductor Corporation
Rev. A1, April 2002
FQAF10N80
QFET
TM
FQAF10N80
800V N-Channel MOSFET
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switch mode power supply.
Features
6.7A, 800V, R
DS(on)
= 1.05
@V
GS
= 10 V
Low gate charge ( typical 55 nC)
Low Crss ( typical 24 pF)
Fast switching
100% avalanche tested
Improved dv/dt capability
Absolute Maximum Ratings
T
C
= 25C unless otherwise noted
Thermal Characteristics
Symbol
Parameter
FQAF10N80
Units
V
DSS
Drain-Source Voltage
800
V
I
D
Drain Current
- Continuous (T
C
= 25C)
6.7
A
- Continuous (T
C
= 100C)
4.24
A
I
DM
Drain Current
- Pulsed
(Note 1)
26.8
A
V
GSS
Gate-Source Voltage
30
V
E
AS
Single Pulsed Avalanche Energy
(Note 2)
920
mJ
I
AR
Avalanche Current
(Note 1)
6.7
A
E
AR
Repetitive Avalanche Energy
(Note 1)
11.3
mJ
dv/dt
Peak Diode Recovery dv/dt
(Note 3)
4.0
V/ns
P
D
Power Dissipation (T
C
= 25C)
113
W
- Derate above 25C
0.91
W/C
T
J
, T
STG
Operating and Storage Temperature Range
-55 to +150
C
T
L
Maximum lead temperature for soldering purposes,
1/8
"
from case for 5 seconds
300
C
Symbol
Parameter
Typ
Max
Units
R
JC
Thermal Resistance, Junction-to-Case
--
1.1
C
/
W
R
JA
Thermal Resistance, Junction-to-Ambient
--
40
C
/
W
!
!
!
!
!
!
!
!
!
!
!
!
!
!
!
!
!
!
!
!
!
!
!
!
S
D
G
TO-3PF
FQAF Series
G
S
D
Rev. A1, April 2002
FQAF10N80
2002 Fairchild Semiconductor Corporation
Electrical Characteristics
T
C
= 25C unless otherwise noted
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 38.5mH, I
AS
= 6.7A, V
DD
= 50V, R
G
= 25
,
Starting T
J
= 25C
3. I
SD
9.8A, di/dt
200A/
s, V
DD
BV
DSS,
Starting T
J
= 25C
4. Pulse Test : Pulse width
300
s, Duty cycle
2%
5. Essentially independent of operating temperature
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV
DSS
Drain-Source Breakdown Voltage
V
GS
= 0 V, I
D
= 250
A
800
--
--
V
BV
DSS
/
T
J
Breakdown Voltage Temperature
Coefficient
I
D
= 250
A, Referenced to 25C
--
0.9
--
V/C
I
DSS
Zero Gate Voltage Drain Current
V
DS
= 800 V, V
GS
= 0 V
--
--
10
A
V
DS
= 640 V, T
C
= 125C
--
--
100
A
I
GSSF
Gate-Body Leakage Current, Forward
V
GS
= 30 V, V
DS
= 0 V
--
--
100
nA
I
GSSR
Gate-Body Leakage Current, Reverse
V
GS
= -30 V, V
DS
= 0 V
--
--
-100
nA
On Characteristics
V
GS(th)
Gate Threshold Voltage
V
DS
= V
GS
, I
D
= 250
A
3.0
--
5.0
V
R
DS(on)
Static Drain-Source
On-Resistance
V
GS
= 10 V, I
D
= 3.35 A
--
0.81
1.05
g
FS
Forward Transconductance
V
DS
= 50 V, I
D
= 3.35 A
--
8.5
--
S
Dynamic Characteristics
C
iss
Input Capacitance
V
DS
= 25 V, V
GS
= 0 V,
f = 1.0 MHz
--
2100
2700
pF
C
oss
Output Capacitance
--
215
280
pF
C
rss
Reverse Transfer Capacitance
--
24
30
pF
Switching Characteristics
t
d(on)
Turn-On Delay Time
V
DD
= 400 V, I
D
= 9.8 A,
R
G
= 25
--
45
100
ns
t
r
Turn-On Rise Time
--
115
240
ns
t
d(off)
Turn-Off Delay Time
--
125
260
ns
t
f
Turn-Off Fall Time
--
75
160
ns
Q
g
Total Gate Charge
V
DS
= 640 V, I
D
= 9.8 A,
V
GS
= 10 V
--
55
71
nC
Q
gs
Gate-Source Charge
--
12
--
nC
Q
gd
Gate-Drain Charge
--
26
--
nC
Drain-Source Diode Characteristics and Maximum Ratings
I
S
Maximum Continuous Drain-Source Diode Forward Current
--
--
6.7
A
I
SM
Maximum Pulsed Drain-Source Diode Forward Current
--
--
26.8
A
V
SD
Drain-Source Diode Forward Voltage
V
GS
= 0 V, I
S
= 6.7 A
--
--
1.4
V
t
rr
Reverse Recovery Time
V
GS
= 0 V, I
S
= 9.8 A,
dI
F
/ dt = 100 A/
s
--
780
--
ns
Q
rr
Reverse Recovery Charge
--
9.4
--
C
Rev. A1, April 2002
FQAF10N80
2002 Fairchild Semiconductor Corporation
0.2
0.4
0.6
0.8
1.0
1.2
10
-1
10
0
10
1
150
Notes :
1. V
GS
= 0V
2. 250
s Pulse Test
25
I
DR
,
R
e
ver
s
e
D
r
ai
n C
u
r
r
e
nt
[
A
]
V
SD
, Source-Drain voltage [V]
0
5
10
15
20
25
30
0.4
0.8
1.2
1.6
2.0
V
GS
= 20V
V
GS
= 10V
Note : T
J
= 25
R
DS
(
O
N)
[
],
D
r
ai
n-
S
o
ur
c
e
O
n
-
R
esi
s
t
a
nc
e
I
D
, Drain Current [A]
2
4
6
8
10
10
-1
10
0
10
1
150
o
C
25
o
C
-55
o
C
Notes :
1. V
DS
= 50V
2. 250
s Pulse Test
I
D
,
D
r
ai
n C
u
r
r
ent
[
A
]
V
GS
, Gate-Source Voltage [V]
10
-1
10
0
10
1
10
-1
10
0
10
1
V
GS
Top : 15.0 V
10.0 V
8.0 V
7.0 V
6.5 V
6.0 V
Bottom : 5.5 V
Notes :
1. 250
s Pulse Test
2. T
C
= 25
I
D
,
D
r
ai
n
C
u
r
r
e
nt
[
A
]
V
DS
, Drain-Source Voltage [V]
0
10
20
30
40
50
60
0
2
4
6
8
10
12
V
DS
= 400V
V
DS
= 160V
V
DS
= 640V
Note : I
D
= 9.8A
V
GS
,
G
a
t
e
-
S
our
c
e
V
o
l
t
ag
e [
V
]
Q
G
, Total Gate Charge [nC]
10
-1
10
0
10
1
0
400
800
1200
1600
2000
2400
2800
3200
3600
C
iss
= C
gs
+ C
gd
(C
ds
= shorted)
C
oss
= C
ds
+ C
gd
C
rss
= C
gd
Notes :
1. V
GS
= 0 V
2. f = 1 MHz
C
rss
C
oss
C
iss
C
apa
ci
t
anc
e [
p
F]
V
DS
, Drain-Source Voltage [V]
Typical Characteristics
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperature
Figure 2. Transfer Characteristics
Figure 1. On-Region Characteristics
2002 Fairchild Semiconductor Corporation
Rev. A1, April 2002
FQAF10N80
1 0
-5
1 0
-4
1 0
-3
1 0
-2
1 0
-1
1 0
0
1 0
1
1 0
-2
1 0
-1
1 0
0
N o te s :
1 . Z
J C
( t) = 1 .1
/W M a x .
2 . D u ty F a c to r , D = t
1
/t
2
3 . T
J M
- T
C
= P
D M
* Z
J C
( t)
s in g le p u ls e
D = 0 .5
0 .0 2
0 .2
0 .0 5
0 .1
0 .0 1
Z
JC
(
t
)
,
T
h
er
m
a
l
R
e
s
p
onse
t
1
, S q u a r e W a v e P u ls e D u r a t io n [ s e c ]
25
50
75
100
125
150
0
1
2
3
4
5
6
7
I
D
,
D
r
ai
n C
u
r
r
e
nt
[
A
]
T
C
, Case Temperature [
]
10
0
10
1
10
2
10
3
10
-2
10
-1
10
0
10
1
10
2
10
s
DC
10 ms
1 ms
100
s
Operation in This Area
is Limited by R
DS(on)
Notes :
1. T
C
= 25
o
C
2. T
J
= 150
o
C
3. Single Pulse
I
D
,
D
r
ai
n C
u
r
r
e
nt
[
A
]
V
DS
, Drain-Source Voltage [V]
-100
-50
0
50
100
150
200
0.0
0.5
1.0
1.5
2.0
2.5
3.0
Notes :
1. V
GS
= 10 V
2. I
D
= 4.9 A
R
DS
(
O
N)
,
(
N
or
m
a
l
i
z
e
d)
D
r
ai
n-
S
o
ur
c
e
O
n
-
R
es
i
s
t
a
nc
e
T
J
, Junction Temperature [
o
C]
-100
-50
0
50
100
150
200
0.8
0.9
1.0
1.1
1.2
Notes :
1. V
GS
= 0 V
2. I
D
= 250
A
BV
DSS
, (
N
o
r
m
a
liz
e
d
)
D
r
ai
n-
S
o
u
r
ce B
r
eak
d
o
w
n
V
o
l
t
age
T
J
, Junction Temperature [
o
C]
Typical Characteristics
(Continued)
Figure 9. Maximum Safe Operating Area
Figure 10. Maximum Drain Current
vs. Case Temperature
Figure 7. Breakdown Voltage Variation
vs. Temperature
Figure 8. On-Resistance Variation
vs. Temperature
Figure 11. Transient Thermal Response Curve
t
1
P
DM
t
2
Rev. A1, April 2002
FQAF10N80
2002 Fairchild Semiconductor Corporation
Charge
V
GS
10V
Q
g
Q
gs
Q
gd
3mA
V
GS
DUT
V
DS
300nF
50K
200nF
12V
Same Type
as DUT
Charge
V
GS
10V
Q
g
Q
gs
Q
gd
3mA
V
GS
DUT
V
DS
300nF
50K
200nF
12V
Same Type
as DUT
V
GS
V
DS
10%
90%
t
d(on)
t
r
t
on
t
off
t
d(off)
t
f
V
DD
10V
V
DS
R
L
DUT
R
G
V
GS
V
GS
V
DS
10%
90%
t
d(on)
t
r
t
on
t
off
t
d(off)
t
f
V
DD
10V
V
DS
R
L
DUT
R
G
V
GS
E
AS
=
L I
AS
2
----
2
1
--------------------
BV
DSS
- V
DD
BV
DSS
V
DD
V
DS
BV
DSS
t
p
V
DD
I
AS
V
DS
(t)
I
D
(t)
Time
10V
DUT
R
G
L
I
D
t
p
E
AS
=
L I
AS
2
----
2
1
E
AS
=
L I
AS
2
----
2
1
----
2
1
--------------------
BV
DSS
- V
DD
BV
DSS
V
DD
V
DS
BV
DSS
t
p
V
DD
I
AS
V
DS
(t)
I
D
(t)
Time
10V
DUT
R
G
L
L
I
D
I
D
t
p
Gate Charge Test Circuit & Waveform
Resistive Switching Test Circuit & Waveforms
Unclamped Inductive Switching Test Circuit & Waveforms
PDF 
ZIP