2000 Fairchild Semiconductor International
December 2000
Rev. A2, December 2000
FQP
44N10
QFET
QFET
QFET
QFET
TM
FQP44N10
100V N-Channel MOSFET
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary,
planar stripe, DMOS technology.
This advanced technology is especially tailored to minimize
on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation modes. These devices are
well suited for low voltage applications such as audio
amplifiers, high efficiency switching DC/DC converters, and
DC motor control.
Features
43.5A, 100V, R
DS(on)
= 0.039
@V
GS
= 10 V
Low gate charge ( typical 48 nC)
Low Crss ( typical 85 pF)
Fast switching
100% avalanche tested
Improved dv/dt capability
175
C maximum junction temperature rating
Absolute Maximum Ratings
T
C
= 25C unless otherwise noted
Thermal Characteristics
Symbol
Parameter
FQP44N10
Units
V
DSS
Drain-Source Voltage
100
V
I
D
Drain Current
- Continuous (T
C
= 25C)
43.5
A
- Continuous (T
C
= 100C)
30.8
A
I
DM
Drain Current
- Pulsed
(Note 1)
174
A
V
GSS
Gate-Source Voltage
25
V
E
AS
Single Pulsed Avalanche Energy
(Note 2)
530
mJ
I
AR
Avalanche Current
(Note 1)
43.5
A
E
AR
Repetitive Avalanche Energy
(Note 1)
14.6
mJ
dv/dt
Peak Diode Recovery dv/dt
(Note 3)
6.0
V/ns
P
D
Power Dissipation (T
C
= 25C)
146
W
- Derate above 25C
0.97
W/C
T
J
, T
STG
Operating and Storage Temperature Range
-55 to +175
C
T
L
Maximum lead temperature for soldering purposes,
1/8
"
from case for 5 seconds
300
C
Symbol
Parameter
Typ
Max
Units
R
JC
Thermal Resistance, Junction-to-Case
--
1.03
C
/
W
R
CS
Thermal Resistance, Case-to-Sink
0.5
--
C
/
W
R
JA
Thermal Resistance, Junction-to-Ambient
--
62.5
C
/
W
! "
!
!
!
"
"
"
! "
!
!
!
"
"
"
S
D
G
TO-220
FQP Series
G
S
D
Rev. A2, December 2000
FQP
44N10
(Note 4)
(Note 4, 5)
(Note 4, 5)
(Note 4)
2000 Fairchild Semiconductor International
Electrical Characteristics
T
C
= 25C unless otherwise noted
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 0.42mH, I
AS
= 43.5A, V
DD
= 25V, R
G
= 25
,
Starting T
J
= 25C
3. I
SD
43.5A, di/dt
300A/
s, V
DD
BV
DSS,
Starting T
J
= 25C
4. Pulse Test : Pulse width
300
s, Duty cycle
2%
5. Essentially independent of operating temperature
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV
DSS
Drain-Source Breakdown Voltage
V
GS
= 0 V, I
D
= 250
A
100
--
--
V
BV
DSS
/
T
J
Breakdown Voltage Temperature
Coefficient
I
D
= 250
A, Referenced to 25C
--
0.1
--
V/C
I
DSS
Zero Gate Voltage Drain Current
V
DS
= 100 V, V
GS
= 0 V
--
--
1
A
V
DS
= 80 V, T
C
= 150C
--
--
10
A
I
GSSF
Gate-Body Leakage Current, Forward
V
GS
= 25 V, V
DS
= 0 V
--
--
100
nA
I
GSSR
Gate-Body Leakage Current, Reverse
V
GS
= -25 V, V
DS
= 0 V
--
--
-100
nA
On Characteristics
V
GS(th)
Gate Threshold Voltage
V
DS
= V
GS
, I
D
= 250
A
2.0
--
4.0
V
R
DS(on)
Static Drain-Source
On-Resistance
V
GS
= 10 V, I
D
= 21.75 A
--
0.03
0.039
g
FS
Forward Transconductance
V
DS
= 40 V, I
D
= 21.75 A
--
30
--
S
Dynamic Characteristics
C
iss
Input Capacitance
V
DS
= 25 V, V
GS
= 0 V,
f = 1.0 MHz
--
1400
1800
pF
C
oss
Output Capacitance
--
425
550
pF
C
rss
Reverse Transfer Capacitance
--
85
110
pF
Switching Characteristics
t
d(on)
Turn-On Delay Time
V
DD
= 50 V, I
D
= 43.5 A,
R
G
= 25
--
19
45
ns
t
r
Turn-On Rise Time
--
190
390
ns
t
d(off)
Turn-Off Delay Time
--
90
190
ns
t
f
Turn-Off Fall Time
--
100
210
ns
Q
g
Total Gate Charge
V
DS
= 80 V, I
D
= 43.5 A,
V
GS
= 10 V
--
48
62
nC
Q
gs
Gate-Source Charge
--
9.0
--
nC
Q
gd
Gate-Drain Charge
--
24
--
nC
Drain-Source Diode Characteristics and Maximum Ratings
I
S
Maximum Continuous Drain-Source Diode Forward Current
--
--
43.5
A
I
SM
Maximum Pulsed Drain-Source Diode Forward Current
--
--
174
A
V
SD
Drain-Source Diode Forward Voltage
V
GS
= 0 V, I
S
= 43.5 A
--
--
1.5
V
t
rr
Reverse Recovery Time
V
GS
= 0 V, I
S
= 43.5 A,
dI
F
/ dt = 100 A/
s
--
98
--
ns
Q
rr
Reverse Recovery Charge
--
360
--
nC
FQP
44N10
Rev. A2, December 2000
2000 Fairchild Semiconductor International
0
10
20
30
40
50
0
2
4
6
8
10
12
V
DS
= 50V
V
DS
= 80V
Note : I
D
= 43.5A
V
GS
,
G
a
t
e
-
S
our
c
e
V
o
l
t
ag
e [
V
]
Q
G
, Total Gate Charge [nC]
10
-1
10
0
10
1
0
500
1000
1500
2000
2500
3000
3500
4000
C
iss
= C
gs
+ C
gd
(C
ds
= shorted)
C
oss
= C
ds
+ C
gd
C
rss
= C
gd
Notes :
1. V
GS
= 0 V
2. f = 1 MHz
C
rss
C
oss
C
iss
C
apa
ci
t
anc
e [
p
F]
V
DS
, Drain-Source Voltage [V]
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
10
-1
10
0
10
1
10
2
25
175
Notes :
1. V
GS
= 0V
2. 250
s Pulse Test
I
DR
,
R
e
ver
s
e D
r
ai
n C
u
r
r
ent
[
A
]
V
SD
, Source-Drain Voltage [V]
0
30
60
90
120
150
180
0.00
0.03
0.06
0.09
0.12
0.15
Note : T
J
= 25
V
GS
= 20V
V
GS
= 10V
R
DS
(
o
n
)
[
],
D
r
a
i
n-
S
o
ur
ce O
n
-
R
e
s
i
s
t
a
n
c
e
I
D
, Drain Current [A]
2
4
6
8
10
10
-1
10
0
10
1
10
2
Notes :
1. V
DS
= 40V
2. 250
s Pulse Test
-55
175
25
I
D
, D
r
a
i
n
C
u
rr
e
n
t
[A
]
V
GS
, Gate-Source Voltage [V]
10
-1
10
0
10
1
10
0
10
1
10
2
V
GS
Top : 15.0 V
10.0 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
Notes :
1. 250
s Pulse Test
2. T
C
= 25
I
D
,
D
r
ai
n
C
u
r
r
en
t
[
A
]
V
DS
, Drain-Source Voltage [V]
Typical Characteristics
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperature
Figure 2. Transfer Characteristics
Figure 1. On-Region Characteristics
2000 Fairchild Semiconductor International
FQP
44N10
Rev. A2, December 2000
1 0
-5
1 0
-4
1 0
-3
1 0
-2
1 0
-1
1 0
0
1 0
1
1 0
-2
1 0
-1
1 0
0
N o te s :
1 . Z
J C
( t) = 1 .0 3
/ W M a x .
2 . D u ty F a c to r , D = t
1
/t
2
3 . T
J M
- T
C
= P
D M
* Z
J C
( t)
s in g le p u ls e
D = 0 .5
0 .0 2
0 .2
0 .0 5
0 .1
0 .0 1
Z
JC
(
t
)
,
T
her
m
a
l
R
e
s
p
on
s
e
t
1
, S q u a r e W a v e P u ls e D u r a t io n [ s e c ]
25
50
75
100
125
150
175
0
10
20
30
40
50
I
D
,
D
r
ai
n
C
u
r
r
e
nt
[
A
]
T
C
, Case Temperature [
]
10
0
10
1
10
2
10
-1
10
0
10
1
10
2
10
3
DC
10 ms
1 ms
100
s
Operation in This Area
is Limited by R
DS(on)
Notes :
1. T
C
= 25
o
C
2. T
J
= 175
o
C
3. Single Pulse
I
D
,
D
r
ai
n
C
u
r
r
e
n
t
[
A
]
V
DS
, Drain-Source Voltage [V]
-100
-50
0
50
100
150
200
0.0
0.5
1.0
1.5
2.0
2.5
3.0
Notes :
1. V
GS
= 10 V
2. I
D
= 21.75 A
R
DS
(
O
N)
,
(
N
or
m
a
l
i
z
e
d)
D
r
ai
n-
S
o
ur
c
e
O
n
-
R
es
i
s
t
a
nc
e
T
J
, Junction Temperature [
o
C]
-100
-50
0
50
100
150
200
0.8
0.9
1.0
1.1
1.2
Notes :
1. V
GS
= 0 V
2. I
D
= 250
A
BV
DSS
, (
N
o
r
m
a
liz
e
d
)
D
r
ai
n-
S
o
u
r
ce B
r
eak
d
o
w
n
V
o
l
t
age
T
J
, Junction Temperature [
o
C]
Typical Characteristics
(Continued)
Figure 9. Maximum Safe Operating Area
Figure 10. Maximum Drain Current
vs. Case Temperature
Figure 7. Breakdown Voltage Variation
vs. Temperature
Figure 8. On-Resistance Variation
vs. Temperature
Figure 11. Transient Thermal Response Curve
t
1
P
DM
t
2
FQP
44N10
Rev. A2, December 2000
2000 Fairchild Semiconductor International
Charge
V
GS
10V
Q
g
Q
gs
Q
gd
3mA
V
GS
DUT
V
DS
300nF
50K
200nF
12V
Same Type
as DUT
Charge
V
GS
10V
Q
g
Q
gs
Q
gd
3mA
V
GS
DUT
V
DS
300nF
50K
200nF
12V
Same Type
as DUT
V
GS
V
DS
10%
90%
t
d(on)
t
r
t
on
t
off
t
d(off)
t
f
V
DD
10V
V
DS
R
L
DUT
R
G
V
GS
V
GS
V
DS
10%
90%
t
d(on)
t
r
t
on
t
off
t
d(off)
t
f
V
DD
10V
V
DS
R
L
DUT
R
G
V
GS
E
AS
=
L I
AS
2
----
2
1
--------------------
BV
DSS
- V
DD
BV
DSS
V
DD
V
DS
BV
DSS
t
p
V
DD
I
AS
V
DS
(t)
I
D
(t)
Time
10V
DUT
R
G
L
I
D
t
p
E
AS
=
L I
AS
2
----
2
1
E
AS
=
L I
AS
2
----
2
1
----
2
1
--------------------
BV
DSS
- V
DD
BV
DSS
V
DD
V
DS
BV
DSS
t
p
V
DD
I
AS
V
DS
(t)
I
D
(t)
Time
10V
DUT
R
G
L
L
I
D
I
D
t
p
Gate Charge Test Circuit & Waveform
Resistive Switching Test Circuit & Waveforms
Unclamped Inductive Switching Test Circuit & Waveforms
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