1999 Fairchild Semiconductor Corporation
DS500043
www.fairchildsemi.com
August 1997
Revised December 1999
FST3
125
Quad Bus S
w
i
t
ch
FST3125
Quad Bus Switch
General Description
The Fairchild Switch FST3125 provides four high-speed
CMOS TTL-compatible bus switches. The low on resis-
tance of the switch allows inputs to be connected to out-
puts without adding propagation delay or generating
additional ground bounce noise.
The device is organized as four 1-bit switches with sepa-
rate OE inputs. When OE is LOW, the switch is ON and
Port A is connected to Port B. When OE is HIGH, the
switch is OPEN and a high-impedance state exists
between the two ports.
Features
s
4
switch connection between two ports.
s
Minimal propagation delay through the switch.
s
Low l
CC
.
s
Zero bounce in flow-through mode.
s
Control inputs compatible with TTL level.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Logic Diagram
Pin Descriptions
Connection Diagrams
Pin Assignment for SOIC and TSSOP
Pin Assignment for QSOP
Truth Table
Order Number
Package Number
Package Description
FST3125M
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
FST3125QSC
MQA16
16-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide
FST3125MTC
MTC14
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pin Name
Description
OE
1
, OE
2
, OE
3
, OE
4
Bus Switch Enables
1A, 2A, 3A, 4A
Bus A
1B, 2B, 3B, 4B
Bus B
NC
Not Connected
Inputs
Inputs/Outputs
OE
A,B
L
A
=
B
H
Z
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2
FST3125
Absolute Maximum Ratings
(Note 1)
Recommended Operating
Conditions
(Note 3)
Note 1: The "Absolute Maximum Ratings" are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum rating.
The "Recommended Operating Conditions" table will define the conditions
for actual device operation.
Note 2: The input and output negative voltage ratings may be exceeded if
the input and output diode current ratings are observed.
Note 3: Unused control inputs must be held high or low. They may not float.
DC Electrical Characteristics
Note 4: Typical values are at V
CC
=
5.0V and T
A
=
+
25
C
Note 5: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the
voltages on the two (A or B) pins.
Supply Voltage (V
CC
)
-
0.5V to
+
7.0V
DC Switch Voltage (V
S
)
-
0.5V to
+
7.0V
DC Input Voltage (V
IN
)(Note 2)
-
0.5V to
+
7.0V
DC Input Diode Current (l
IK
) V
IN
<
0V
-
50mA
DC Output (I
OUT
) Sink Current
128mA
DC V
CC
/GND Current (I
CC
/I
GND
)
+
/
-
100mA
Storage Temperature Range (T
STG
)
-
65
C to
+
150
C
Power Supply Operating (V
CC
)
4.0V to 5.5V
Input Voltage (V
IN
)
0V to 5.5V
Output Voltage (V
OUT
)
0V to 5.5V
Input Rise and Fall Time (t
r
, t
f
)
Switch Control Input
0ns/V to 5ns/V
Switch I/O
0ns/V to DC
Free Air Operating Temperature (T
A
)
-
40
C to
+
85
C
Symbol
Parameter
V
CC
(V)
T
A
=
-
40
C to
+
85
C
Units
Conditions
Min
Typ
(Note 4)
Max
V
IK
Clamp Diode Voltage
4.5
-
1.2
V
I
IN
=
-
18mA
V
IH
High Level Input Voltage
4.05.5
2.0
V
V
IL
Low Level Input Voltage
4.05.5
0.8
V
I
I
Input Leakage Current
5.5
1.0
A
0
V
IN
5.5V
I
OZ
OFF-STATE Leakage Current
5.5
1.0
A
0
A, B
V
CC
R
ON
Switch On Resistance
4.5
4
7
V
IN
=
0V, I
IN
=
64mA
(Note 5)
4.5
4
7
V
IN
=
0V, I
IN
=
30mA
4.5
8
15
V
IN
=
2.4V, I
IN
=
15mA
4.0
11
20
V
IN
=
2.4V, I
IN
=
15mA
I
CC
Quiescent Supply Current
5.5
3
A
V
IN
=
V
CC
or GND,
I
OUT
=
0
I
CC
Increase in I
CC
per Input
5.5
2.5
mA
One input at 3.4V.
Other inputs at V
CC
or GND
3
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FST3
125
AC Electrical Characteristics
Note 6: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On
resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance).
Capacitance
(Note 7)
Note 7: T
A
=
+
25
C, f
=
1 MHz, Capacitance is characterized but not tested.
AC Loading and Waveforms
Note: Input driven by 50
source terminated in 50
Note: C
L
includes load and stray capacitance
Note: Input PRR
=
1.0 MHz, t
W
=
500ns
FIGURE 1. AC Test Circuit
FIGURE 2. AC Waveforms
Symbol
Parameter
T
A
=
-
40
C to
+
85
C,
C
L
=
50pF, RU
=
RD
=
500
Units
Conditions
Figure No.
V
CC
=
4.5 5.5V
V
CC
=
4.0V
Min
Max
Min
Max
t
PHL
,t
PLH
Prop Delay Bus to Bus (Note 6)
0.25
0.25
ns
V
I
=
OPEN
Figure 1
Figure 2
t
PZH
, t
PZL
Output Enable Time
1.0
5.0
5.5
ns
V
I
=
7V for t
PZL
Figure 1
Figure 2
V
I
=
OPEN for t
PZH
t
PHZ
, t
PLZ
Output Disable Time
1.5
5.3
5.6
ns
V
I
=
7V for t
PLZ
Figure 1
Figure 2
V
I
=
OPEN for t
PHZ
Symbol
Parameter
Typ
Max
Units
Conditions
C
IN
Control Pin Input Capacitance
3
pF
V
CC
=
5.0V
C
I/O
Input/Output Capacitance
5
pF
V
CC
, OE
=
5.0V
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4
FST3125
Physical Dimensions
inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
Package Number M14A
16-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide
Package Number MQA16
5
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FST3
125
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC14
Technology Description
The Fairchild Switch family derives from and embodies Fairchild's proven switch technology used for several years in its
74LVX3L384 (FST3384) bus switch product.
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