2005 Fairchild Semiconductor Corporation
1
www.fairchildsemi.com
July 2005
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
HCPL0600,
HCPL0601,
HCPL0611,
HCPL0630,
HCPL0631,
HCPL0661 High Speed-10 MBit/s Logic Gate Optocoupler
s
HCPL0600, HCPL0601, HCPL0611,
HCPL0630, HCPL0631, HCPL0661
High Speed-10 MBit/s Logic Gate Optocouplers
Single Channel: HCPL0600, HCPL0601, HCPL0611
Dual Channel: HCPL0630, HCPL0631, HCPL0661
Features
Compact SO8 package
Very high speed-10 MBit/s
Superior CMR
Fan-out of 8 over -40C to +85C
Logic gate output
Strobable output (single channel devices)
Wired OR-open collector
U.L. recognized (File # E90700)
VDE approval pending
Applications
Ground loop elimination
LSTTL to TTL, LSTTL or 5-volt CMOS
Line receiver, data transmission
Data multiplexing
Switching power supplies
Pulse transformer replacement
Computer-peripheral interface
Description
The HCPL06XX optocouplers consist of an AlGaAS LED, opti-
cally coupled to a very high speed integrated photo-detector
logic gate with a strobable output (single channel devices). The
devices are housed in a compact small-outline package. This
output features an open collector, thereby permitting wired OR
outputs. The HCPL0600 and HCPL0601 output consists of
bipolar transistors on a bipolar process while the HCPL0611,
HCPL0630 and HCPL0631 output consists of bipolar transistors
on a CMOS process for reduced power consumption. The cou-
pled parameters are guaranteed over the temperature range of -
40C to +85C. A maximum input signal of 5 mA will provide a
minimum output sink current of 13 mA (fan out of 8). An internal
noise shield provides superior common mode rejection.
Package Dimensions
Lead Coplanarity : 0.004 (0.10) MAX
0.202 (5.13)
Pin 1
0.019 (0.48)
0.182 (4.63)
0.021 (0.53)
0.011 (0.28)
0.050 (1.27)
TYP
0.244 (6.19)
0.224 (5.69)
0.143 (3.63)
0.123 (3.13)
0.008 (0.20)
0.003 (0.08)
0.010 (0.25)
0.006 (0.16)
SEA
TI
NG PLANE
0.164 (4.16)
0.144 (3.66)
NOTE
All dimensions are in inches (millimeters)
2
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HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
HCPL0600,
HCPL0601,
HCPL0611,
HCPL0630,
HCPL0631,
HCPL0661 High Speed-10 MBit/s Logic Gate Optocoupler
s
TRUTH TABLE (Positive Logic)
*Dual channel devices or single channel devices with pin 7 not connected.
A 0.1 F bypass capacitor must be connected between pins 8 and 5. (See note 1)
Input
Enable
Output
H
H
L
L
H
H
H
L
H
L
L
H
H*
NC*
L*
L*
NC*
H*
Single-channel circuit
drawing (HCPL0600 and
HCPL0601)
Single-channel circuit
drawing (HCPL0611)
1
2
3
4
5
6
7
8
N/C
_
V
CC
V
E
V
O
GND
+
N/C
V
F
Dual-channel circuit
drawing (HCPL0630, HCPL0631
and HCPL0661)
1
2
3
4
5
6
7
8
N/C
_
V
CC
V
E
V
O
GND
+
N/C
V
F
1
2
3
4
5
6
7
8
+
_
V
F1
V
CC
V
01
V
02
GND
V
F2
_
+
3
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HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
HCPL0600,
HCPL0601,
HCPL0611,
HCPL0630,
HCPL0631,
HCPL0661 High Speed-10 MBit/s Logic Gate Optocoupler
s
Absolute Maximum Ratings
(No derating required up to 85C)
Recommended Operating Conditions
*6.3 mA is a guard banded value which allows for at least 20% CTR degradation. Initial input current threshold value is 5.0 mA or less
Parameter
Symbol
Value
Units
Storage Temperature
T
STG
-40 to +125
C
Operating Temperature
T
OPR
-40 to +85
C
EMITTER
Single Channel
I
F
50
mA
DC/Average Forward Input Current (each channel)
Dual Channel
Enable Input Voltage
Not to exceed VCC by more than 500 mV
Single Channel
V
E
5.5
V
Reverse Input Voltage (each channel)
V
R
5.0
V
Power Dissipation
Single Channel
P
I
45
mW
Dual Channel
DETECTOR
Supply Voltage
V
CC
(1 minute max)
7.0 V
Output Current (each channel)
I
O
50
mA
Output Voltage (each channel)
V
O
7.0
V
Collector Output Power Dissipation
Single Channel
P
O
85
mW
Dual Channel
Parameter
Symbol
Min
Max
Units
Input Current, Low Level
I
FL
0
250
A
Input Current, High Level
I
FH
*6.3
15
mA
Supply Voltage, Output
V
CC
4.5
5.5
V
Enable Voltage, Low Level
V
EL
0
0.8
V
Enable Voltage, High Level
V
EH
2.0
V
CC
V
Operating Temperature
T
A
-40
+85
C
Fan Out (TTL load)
N
8
TTL Loads
Output Pull-up
R
L
330
4K
4
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HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
HCPL0600,
HCPL0601,
HCPL0611,
HCPL0630,
HCPL0631,
HCPL0661 High Speed-10 MBit/s Logic Gate Optocoupler
s
Electrical Characteristics
(T
A
= -40C to +85C Unless otherwise specified.)
Individual Component Characteristics
Switching Characteristics
(T
A
= -40C to +85C, V
CC
= 5 V, I
F
= 7.5 mA Unless otherwise specified.)
Parameter
Test Conditions Symbol Min Typ** Max
Unit
EMITTER
(I
F
= 10 mA)
V
F
1.8
V
Input Forward Voltage
T
A
=25C
1.75
Input Reverse Breakdown Voltage
(I
R
= 10 A)
B
VR
5.0
V
Input Capacitance
(V
F
= 0, f = 1 MHz)
C
IN
pF
Input Diode Temperature Coefficient
(I
F
= 10 mA)
VF/
TA
mV/C
DETECTOR
(V
E
= 0.5 V)
Single Channel
I
CCH
10
mA
High Level Supply Current
(I
F
= 0 mA, V
CC
= 5.5 V)
Dual Channel
15
Low Level Supply Current
(V
E
= 0.5 V)
Single Channel
I
CCL
13
mA
(I
F
= 10 mA, V
CC
= 5.5V)
Dual Channel
21
Low Level Enable Current
(V
CC
= 5.5 V, V
E
= 0.5 V)
Single Channel
I
EL
-1.6
mA
High Level Enable Current
(V
CC
= 5.5 V, V
E
= 2.0 V)
Single Channel
I
EH
-1.6
mA
High Level Enable Voltage
(V
CC
= 5.5 V, I
F
= 10 mA)
Single Channel
V
EH
2.0
V
Low Level Enable Voltage
(V
CC
= 5.5 V, I
F
= 10 mA)(Note 2)
Single Channel
V
EL
0.8
V
AC Characteristics
Test Conditions
Device
Symbol
Min
Typ Max Unit
Propagation Delay Time
to Output High Level
(Note 3)
(T
A
=25C)
All
T
PLH
20
75
ns
(R
L
= 350
, C
L
= 15 pF) (Fig. 12)
100
Propagation Delay Time
to Output Low Level
(Note 4)
(T
A
=25C)
All
T
PHL
25
75
ns
(R
L
= 350
, C
L
= 15 pF) (Fig. 12)
100
Pulse Width Distortion
(R
L
= 350
, C
L
= 15 pF) (Fig. 12)
All
|T
PHL
-T
PLH
|
35
ns
Output Rise Time (10-90%)
(R
L
= 350
, C
L
= 15 pF)(Note 5) (Fig. 12)
All
t
r
50
ns
Output Fall Time (90-10%)
(R
L
= 350
, C
L
= 15 pF)(Note 6) (Fig. 12)
All
t
f
12
ns
Enable Propagation Delay
Time to Output High Level
(I
F
= 7.5 mA, V
EH
= 3.5 V)
(R
L
= 350
, C
L
= 15 pF) (Note 7) (Fig. 13)
HCPL0600
HCPL0601
HCPL0611
t
ELH
20
ns
Enable Propagation Delay
Time to Output Low Level
(I
F
= 7.5 mA, V
EH
= 3.5 V)
(R
L
= 350
, C
L
= 15 pF) (Note 8) (Fig. 13)
HCPL0600
HCPL0601
HCPL0611
t
EHL
20
ns
Common Mode
Transient Immunity
(at Output High Level)
(R
L
= 350
) (T
A
=25C)
(I
F
= 0 mA, V
OH
(Min.) =
2.0 V) (Note 9)(Fig. 14)
|V
CM
| = 10 V HCPL0600
HCPL0630
|CM
H
|
V/s
|V
CM
| = 50 V HCPL0601
HCPL0631
5000
|V
CM
| = 1,000 V HCPL0611
HCPL0661
25,000
Common Mode
Transient Immunity
(at Output Low Level)
(R
L
= 350
) (T
A
=25C)
(I
F
= 7.5 mA, V
OL
(Max.) =
0.8 V) (Note 10)(Fig. 14)
|V
CM
| = 10 V HCPL0600
HCPL0630
|CM
H
|
V/s
|V
CM
| = 50 V HCPL0601
HCPL0631
5000
|V
CM
| = 1,000 V HCPL0611
HCPL0661
25,000
5
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HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
HCPL0600,
HCPL0601,
HCPL0611,
HCPL0630,
HCPL0631,
HCPL0661 High Speed-10 MBit/s Logic Gate Optocoupler
s
Transfer Characteristics
(T
A
= -40C to +85C Unless otherwise specified.)
Isolation Characteristics
(T
A
= -40C to +85C Unless otherwise specified.)
** All typical values are at V
CC
= 5 V, T
A
= 25C
NOTES
1.
The V
CC
supply to each optoisolator must be bypassed by a 0.1F capacitor or larger. This can be either a ceramic or solid
tantalum capacitor with good high frequency characteristic and should be connected as close as possible to the package V
CC
and
GND pins of each device.
2.
Enable Input - No pull up resistor required as the device has an internal pull up resistor.
3.
t
PLH
- Propagation delay is measured from the 3.75 mA level on the HIGH to LOW transition of the input current pulse to the 1.5V
level on the LOW to HIGH transition of the output voltage pulse.
4.
t
PHL
- Propagation delay is measured from the 3.75 mA level on the LOW to HIGH transition of the input current pulse to the 1.5V
level on the HIGH to LOW transition of the output voltage pulse.
5. t
r
- Rise time is measured from the 90% to the 10% levels on the LOW to HIGH transition of the output pulse.
6.
t
f
- Fall time is measured from the 10% to the 90% levels on the HIGH to LOW transition of the output pulse.
7.
t
ELH
- Enable input propagation delay is measured from the 1.5V level on the HIGH to LOW transition of the input voltage pulse to
the 1.5V level on the LOW to HIGH transition of the output voltage pulse.
8.
t
EHL
- Enable input propagation delay is measured from the 1.5V level on the LOW to HIGH transition of the input voltage pulse to
the 1.5V level on the HIGH to LOW transition of the output voltage pulse.
9.
CM
H
- The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the high state (i.e., V
OUT
> 2.0 V). Measured in volts per microsecond (V/s).
10. CM
L
- The maximum tolerable rate of fall of the common mode voltage to ensure the output will remain in the low output state (i.e.,
V
OUT
< 0.8 V). Measured in volts per microsecond (V/s).
11. Device considered a two-terminal device: Pins 1,2,3 and 4 shorted together, and Pins 5,6,7 and 8 shorted together.
DC Characteristics
Test Conditions Symbol
Min
Typ**
Max
Unit
High Level Output Current
(V
CC
= 5.5 V, V
O
= 5.5 V)
(I
F
= 250 A, V
E
= 2.0 V) (Note 2)
I
OH
100
A
Low Level Output Voltage
(V
CC
= 5.5 V, I
F
= 5 mA)
(V
E
= 2.0 V, I
OL
= 13 mA) (Note 2)
V
OL
0.6
V
Input Threshold Current
(V
CC
= 5.5 V, V
O
= 0.6 V,
V
E
= 2.0 V, I
OL
= 13 mA)
I
FT
5
mA
Characteristics
Test Conditions
Symbol
Min
Typ**
Max
Unit
Input-Output
Insulation Leakage Current
(Relative humidity = 45%)
(T
A
= 25C, t = 5 s)
(V
I-O
= 3000 VDC)
(Note 11)
I
I-O
1.0*
A
Withstand Insulation Test Voltage
(R
H
< 50%, T
A
= 25C)
(Note 11) ( t = 1 min.)
V
ISO
2500
V
RMS
Resistance (Input to Output)
(V
I-O
= 500 V) (Note 11)
R
I-O
10
12
Capacitance (Input to Output)
(f = 1 MHz) (Note 11)
C
I-O
0.6
pF
6
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HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
HCPL0600,
HCPL0601,
HCPL0611,
HCPL0630,
HCPL0631,
HCPL0661 High Speed-10 MBit/s Logic Gate Optocoupler
s
Typical Performance Curves (HCPL0600 and HCPL0601 only)
Fig. 1 Forward Current vs. Input Forward Voltage
V
F
- FORWARD VOLTAGE (V)
I
F
- FOR
W
ARD CURRENT (mA)
Fig. 2 Output Voltage vs. Forward Current
I
OH
- HIGH LEVEL OUTPUT CURRENT (
A)
I
TH
- INPUT
THRESHOLD CURRENT (mA)
Fig. 3 Input Threshold Current vs. Temperature
T
A
- TEMPERATURE (C)
T
A
- TEMPERATURE (C)
Fig. 4 High Level Output Current vs. Temperature
I
F
- FORWARD INPUT CURRENT (mA)
V
o
- OUTPUT
V
O
L
T
A
GE (V)
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
0.001
0.01
0.1
1
10
100
T
A
= 85
C
T
A
= 70
C
T
A
= 25
C
T
A
= 0
C
T
A
= -40
C
0
1
2
3
4
5
0
1
2
3
4
5
6
T
A
= 25
C
V
CC
= 5V
R
L
= 350
R
L
= 1k
-40
-20
0
20
40
60
80
100
0
1
2
3
4
5
V
CC
= 5V
V
O
= 0.6V
R
L
= 350
R
L
= 1K
-40
-20
0
20
40
60
80
100
0
2
4
6
8
10
12
14
16
V
O
= V
CC
= 5.5V
V
E
= 2V
I
F
= 250
A
7
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HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
HCPL0600,
HCPL0601,
HCPL0611,
HCPL0630,
HCPL0631,
HCPL0661 High Speed-10 MBit/s Logic Gate Optocoupler
s
Typical Performance Curves (HCPL0600 and HCPL0601 only)
Fig. 5 Low Level Output Voltage vs. Temperature
T
A
- TEMPERATURE (C)
T
A
- TEMPERATURE (C)
T
A
- TEMPERATURE (C)
V
OL
- LO
W LEVEL OUTPUT
V
O
L
T
A
GE (V)
T
P
- PR
OP
A
G
A
TION DELA
Y (ns)
Fig. 6 Low Level Output Current vs. Temperature
I
OL
- LO
W LEVEL OUTPUT CURRENT (mA)
T
P
- PR
OP
A
G
A
TION DELA
Y (ns)
Fig. 7 Propagation Delay vs. Temperature
Fig. 8 Propagation Delay vs. Pulse Input Current
I
F
- PULSE INPUT CURRENT (mA)
-40
-20
0
20
40
60
80
100
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
V
CC
= 5.5V
V
E
= 2V
I
F
= 5mA
I
O
= 12.8mA
I
O
= 9.6mA
I
O
= 6.4mA
I
O
= 16mA
-40
-20
0
20
40
60
80
100
20
25
30
35
40
45
50
55
60
V
CC
= 5V
V
E
= 2V
V
OL
= 0.6V
I
F
= 10-15mA
I
F
= 5mA
-40
-20
0
20
40
60
80
100
20
30
40
50
60
70
80
90
100
V
CC
= 5V
I
F
= 7.5mA
t
PLH
R
L
= 1k
t
PLH
R
L
= 350
t
PHL
RL = 350
& 1k
5
7
9
11
13
15
20
30
40
50
60
70
80
90
V
CC
= 5V
T
A
= 25
C
t
PLH
R
L
= 1k
t
PLH
R
L
= 350
t
PHL
RL = 350
& 1k
8
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HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
HCPL0600,
HCPL0601,
HCPL0611,
HCPL0630,
HCPL0631,
HCPL0661 High Speed-10 MBit/s Logic Gate Optocoupler
s
Typical Performance Curves (HCPL0600 and HCPL0601 only)
Fig. 9 Typical Enable Propagation Delay vs. Temparature
T
A
- TEMPERATURE (C)
T
A
- TEMPERATURE (C)
T
A
- TEMPERATURE (C)
t
E
- ENABLE PR
OP
A
G
A
TION DELA
Y (ns)
Fig. 10 Typical Rise and Fall Time vs. Temperature
t
f -
F
ALL TIME
(ns)
Fig. 11 Typical Pulse Width Distortion vs. Temperature
PWD - PULSE
WIDTH DIST
OR
TION (ns)
-40
-20
0
20
40
60
80
100
0
10
20
30
40
50
60
70
80
90
V
CC
= 5V
V
EH
= 3V
V
EL
= 0V
I
F
= 7.5mA
t
ELH
R
L
= 1k
t
ELH
R
L
= 350
t
EHL
RL = 350
& 1k
-40
-20
0
20
40
60
80
100
0
40
80
120
160
200
240
V
CC
= 5V
I
F
= 7.5mA
t
r
R
L
= 1k
t
r
R
L
= 350
t
f
R
L
= 350
& 1k
-40
-20
0
20
40
60
80
100
0
5
10
15
20
25
30
35
40
V
CC
= 5V
I
F
= 7.5mA
R
L
= 1k
R
L
= 350
9
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HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
HCPL0600,
HCPL0601,
HCPL0611,
HCPL0630,
HCPL0631,
HCPL0661 High Speed-10 MBit/s Logic Gate Optocoupler
s
Typical Performance Curves (HCPL0611, HCPL0630, HCPL0631 and HCPL0661 only)
Fig. 12 Input Forward Current vs. Forward Voltage
Fig. 13 Input Threshold Current vs.
Ambient Temperature (HCPL0611 only)
Fig. 14 Input Threshold Current vs. Ambient Temperature
(HCPL0630, HCPL0631 and HCPL0661 only)
Fig. 15 High Level Output Current vs.
Ambient Temperature
Fig. 16 Low Level Output Current vs.
Ambient Temperature
Fig. 17 Low Level Output Voltage vs.
Ambient Temperature
V
F
- FORWARD VOLTAGE (V)
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
I
F
- FORWARD CURRENT (mA)
T
A
= 85
C
T
A
= 100
C
T
A
= 25
C
T
A
= 0
C
T
A
= -40
C
0.8
0.001
0.01
0.1
1
10
100
T
A
- AMBIENT TEMPERATURE (
C)
-40
-20
0
20
40
60
80
100
I
TH
- INPUT THRESHOLD CURRENT (mA)
I
TH
- INPUT THRESHOLD CURRENT (mA)
0.0
0.5
1.0
1.5
2.0
2.5
V
CC
= 5.5V
V
O
= 0.6V
V
E
= 2V
R
L
= 1k
R
L
= 350
R
L
= 4k
T
A
- AMBIENT TEMPERATURE (
C)
T
A
- AMBIENT TEMPERATURE (
C)
T
A
- AMBIENT TEMPERATURE (
C)
T
A
- AMBIENT TEMPERATURE (
C)
-40
-20
0
20
40
60
80
100
0.0
0.5
1.0
1.5
2.0
2.5
V
CC
= 5.5V
V
O
= 0.6V
R
L
= 1k
R
L
= 350
R
L
= 4k
-40
-20
0
20
40
60
80
100
I
OH
-
HIGH LEVEL OUTPUT CURRENT (nA)
0
4
8
12
16
20
V
O
= V
CC
= 5.5V
V
E
= 2V (Single Channel Only)
I
F
= 250
A
-40
-20
0
20
40
60
80
100
I
OL
- LOW LEVEL OUTPUT CURRENT (mA)
10
15
20
25
30
35
40
V
CC
= 5.5V
V
E
= 2V (Single Channel Only)
V
OL
= 0.6V
I
F
= 5 - 15mA
-40
-20
0
20
40
60
80
100
V
OL
- LOW LEVEL OUTPUT VOLTAGE (V)
0.0
0.1
0.2
0.3
0.4
0.5
0.6
V
CC
= 5.5V
V
E
= 2V (Single Channel Only)
I
F
= 5mA
I
O
= 6.4mA
I
O
= 9.6mA
I
O
= 12.8mA
I
O
= 16mA
10
www.fairchildsemi.com
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
HCPL0600,
HCPL0601,
HCPL0611,
HCPL0630,
HCPL0631,
HCPL0661 High Speed-10 MBit/s Logic Gate Optocoupler
s
Typical Performance Curves (HCPL0611, HCPL0630, HCPL0631 and HCPL0661 only)
Fig. 18 Pulse Width Distortion vs.
Ambient Temperature
Fig. 19 Propagation Delay vs.
Ambient Temperature
Fig. 20 Rise and Fall Times vs.
Ambient Temperature
-40
-20
0
20
40
60
80
100
PWD - PULSE WIDTH DISTORTION (ns)
0
10
20
30
40
50
60
70
V
CC
= 5V
I
F
= 7.5mA
RL = 1k
RL = 350
RL = 4k
T
A
- AMBIENT TEMPERATURE (
C)
T
A
- AMBIENT TEMPERATURE (
C)
T
A
- AMBIENT TEMPERATURE (
C)
-40
-20
0
20
40
60
80
100
0
20
40
60
80
100
120
V
CC
= 5V
I
F
= 7.5mA
t
PHL
RL = 350
, 1k, 4k
t
PLH
RL = 350
t
PLH
RL = 1k
t
PLH
RL = 4k
T
P
- PROPAGATION DELAY (ns)
-40
-20
0
20
40
60
80
100
t
r
- RISE TIME (ns)
0
50
100
150
200
250
300
350
t
f
- FALL TIME (ns)
0
1
2
3
4
5
6
7
V
CC
= 5V
I
F
= 7.5mA
t
f
- RL = 350
, 1k, 4k
t
r
- RL = 350
t
r
- RL = 1k
t
r
- RL = 4k
11
www.fairchildsemi.com
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
HCPL0600,
HCPL0601,
HCPL0611,
HCPL0630,
HCPL0631,
HCPL0661 High Speed-10 MBit/s Logic Gate Optocoupler
s
PHL
t
F
I = 7.5 mA
1.5 V
90%
10%
7.5 mA
+5V
1.5 V
3.0 V
1.5 V
3
2
1
4
8
7
6
5
PLH
t
I = 3.75 mA
F
Output
O
(V )
Input
(I )
F
Output
(V )
O
f
t
r
t
O
Z = 50
Pulse
Generator
tr = 5ns
(V )
E
Input
Monitor
GND
V
CC
O
(V )
Output
L
R
L
C
(V )
Output
O
Input
(V )
E
EHL
t
ELH
bypass
.1
f
Fig. 21 Test Circuit and Waveforms for t
PLH
, t
PHL,
t
r
and t
f
.
Fig. 22 Test Circuit t
EHL
and t
ELH
.
t
1
2
3
4
1
2
3
4
8
7
6
5
GND
V
CC
8
7
6
5
Dual Channel
Pulse Gen.
Z
O
= 50
t
f
= t
r
= 5 ns
Pulse Gen.
t
f
= t
r
= 5 ns
Z
O
= 50
+5 V
I
F
V
CC
R
M
R
L
.1
f
Bypass
C
L
+5V
47
R
L
Input
Monitoring
Node
Input
Monitor
(I
F
)
Output
(V
O
)
Output V
O
Monitoring
Node
0.1
F
Bypass
C
L
*
GND
Test Circuit for HCPL0600,
HCPL0601 and HCPL0611
Test Circuit for HCPL0630,
HCPL0631 and HCPL0661
12
www.fairchildsemi.com
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
HCPL0600,
HCPL0601,
HCPL0611,
HCPL0630,
HCPL0631,
HCPL0661 High Speed-10 MBit/s Logic Gate Optocoupler
s
+5V
Peak
3
2
1
4
8
7
6
5
GND
V
CC
O
(V )
Output
350
V
CM
FF
V
A
B
Pulse Gen
I
F
CM
V
0V
O
V
5V
Switching Pos. (A), I = 0
F
O
V (Max)
CM
0.5 V
O
V
Switching Pos. (B), I = 7.5 mA
F
H
CM
L
V (Min)
O
bypass
0.1
f
Fig. 23 Test Circuit Common Mode Transient Immunity
Test Circuit for HCPL0600, and HCPL0601
(HCPL0600 and HCPL0601)
13
www.fairchildsemi.com
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
HCPL0600,
HCPL0601,
HCPL0611,
HCPL0630,
HCPL0631,
HCPL0661 High Speed-10 MBit/s Logic Gate Optocoupler
s
+3.3V
Peak
3
2
1
4
8
7
6
5
GND
V
CC
O
(V )
Output
350
V
CM
FF
V
A
B
Pulse Gen
I
F
CM
V
0V
O
V
3.3V
Switching Pos. (A), I = 0
F
O
V (Max)
CM
0.5 V
O
V
Switching Pos. (B), I = 7.5 mA
F
H
CM
L
V (Min)
O
bypass
0.1
f
Fig. 24 T
(HCPL0611, HCPL0630, HCPL0631 and HCPL0661)
est Circuit Common Mode Transient Immunity
1
2
3
4
8
B
A
7
6
5
Dual Channel
+3.3V
I
F
V
CC
V
CM
Pulse
Generator
Z
O
= 50
+
R
L
V
FF
Output V
O
Monitoring
Node
0.1
F
Bypass
GND
Test Circuit for HCPL0630, HCPL0631 and HCPL0661
Test Circuit for HCPL0611
14
www.fairchildsemi.com
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
HCPL0600,
HCPL0601,
HCPL0611,
HCPL0630,
HCPL0631,
HCPL0661 High Speed-10 MBit/s Logic Gate Optocoupler
s
8-Pin Small Outline
0.024 (0.61)
0.050 (1.27)
0.155 (3.94)
0.275 (6.99)
0.060 (1.52)
15
www.fairchildsemi.com
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
HCPL0600,
HCPL0601,
HCPL0611,
HCPL0630,
HCPL0631,
HCPL0661 High Speed-10 MBit/s Logic Gate Optocoupler
s
Ordering Information
Marking Information
Option
Order Entry Identifier
Description
No Suffix
HCPL0600
Shipped in tubes (50 units per tube)
V
HCPL0600V
VDE0884 (pending approval)
R1
HCPL0600R1
Tape and Reel (500 units per reel)
R1V
HCPL0600R1V
VDE0884 (pending approval), Tape and Reel (500 units per reel)
R2
HCPL0600R2
Tape and Reel (2500 units per reel)
R2V
HCPL0600R2V
VDE0884 (pending approval), Tape and Reel (2500 units per reel)
1
2
6
4
3
5
Definitions
1
Fairchild logo
2
Device number
3
VDE mark (Note: Only appears on parts ordered with VDE option
See order entry table)
4
One digit year code, e.g., `3'
5
Two digit work week ranging from `01' to `53'
6
Assembly package code
0600
S
YY
X
V
16
www.fairchildsemi.com
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
HCPL0600,
HCPL0601,
HCPL0611,
HCPL0630,
HCPL0631,
HCPL0661 High Speed-10 MBit/s Logic Gate Optocoupler
s
Carrier Tape Specifications
Reflow Profile
4.0
0.10
1.5 MIN
User Direction of Feed
2.0
0.05
1.75
0.10
5.5
0.05
12.0
0.3
8.0
0.10
0.30 MAX
8.3
0.10
3.50
0.20
0.1 MAX
6.40
0.20
5.20
0.20
1.5
0.1/-0
300
280
260
240
220
200
180
160
140
120
100
80
60
40
20
0
C
Time (s)
0
60
180
120
270
260
C
>245
C = 42 Sec
Time above
183
C = 90 Sec
360
1.822
C/Sec Ramp up rate
33 Sec
17
www.fairchildsemi.com
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
HCPL0600,
HCPL0601,
HCPL0611,
HCPL0630,
HCPL0631,
HCPL0661 High Speed-10 MBit/s Logic Gate Optocoupler
s
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY
ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT
CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
LIFE SUPPORT POLICY
FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Formative or
In Design
First Production
Full Production
Not In Production
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HiSeCTM
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2
CTM
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Rev. I16
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2
CMOSTM
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QFET
QSTM
QT OptoelectronicsTM
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Across the board. Around the world.TM
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