2005 Fairchild Semiconductor Corporation
HUF75345G3, HUF75345P3, HUF75345S3S Rev. B1
HUF75345G3, HUF75345P3, HUF75345S3S
75A, 55V, 0.007 Ohm, N-Channel UltraFET
Power MOSFETs
These N-Channel power MOSFETs
are manufactured using the
innovative UltraFET process. This
advanced process technology
achieves the lowest possible on-resistance per silicon area,
resulting in outstanding performance. This device is capable
of withstanding high energy in the avalanche mode and the
diode exhibits very low reverse recovery time and stored
charge. It was designed for use in applications where power
efficiency is important, such as switching regulators,
switching converters, motor drivers, relay drivers, low-
voltage bus switches, and power management in portable
and battery-operated products.
Formerly developmental type TA75345.
Features
75A, 55V
Simulation Models
- Temperature Compensated PSPICE and SABERTM
Models
- Thermal Impedance SPICE and SABER Models
Available on the WEB at: www.fairchildsemi.com
Peak Current vs Pulse Width Curve
UIS Rating Curve
Related Literature
- TB334, "Guidelines for Soldering Surface Mount
Components to PC Boards"
Symbol
Packaging
Product reliability information can be found at http://www.fairchildsemi.com/products/discrete/reliability/index.html
For severe environments, see our Automotive HUFA series.
All Fairchild semiconductor products are manufactured, assembled and tested under ISO9000 and QS9000 quality systems certification.
Ordering Information
PART NUMBER
PACKAGE
BRAND
HUF75345G3
TO-247
75345G
HUF75345P3
TO-220AB
75345P
HUF75345S3S
TO-263AB
75345S
NOTE: When ordering, use the entire part number. Add the suffix T to
obtain the TO-263AB variant in tape and reel, e.g., HUF75345S3ST.
D
G
S
JEDEC STYLE TO-247
JEDEC TO-220AB
JEDEC TO-263AB
SOURCE
DRAIN
GATE
DRAIN
(TAB)
DRAIN
SOURCE
GATE
DRAIN
(FLANGE)
GATE
SOURCE
DRAIN
(FLANGE)
Data Sheet
March 2005
2005 Fairchild Semiconductor Corporation
HUF75345G3, HUF75345P3, HUF75345S3S Rev. B1
Absolute Maximum Ratings
T
C
= 25
o
C, Unless Otherwise Specified
UNITS
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DSS
55
V
Drain to Gate Voltage (R
GS
= 20k
) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DGR
55
V
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
GS
20
V
Drain Current
Continuous (Figure 2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I
DM
75
Figure 4
A
Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E
AS
Figure 6
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
D
Derate Above 25
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
325
2.17
W
W/
o
C
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
J
, T
STG
-55 to 175
o
C
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T
L
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
pkg
300
260
o
C
o
C
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. T
J
= 25
o
C to 150
o
C.
Electrical Specifications
T
C
= 25
o
C, Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
OFF STATE SPECIFICATIONS
Drain to Source Breakdown Voltage
BV
DSS
I
D
= 250
A, V
GS
= 0V (Figure 11)
55
-
-
V
Zero Gate Voltage Drain Current
I
DSS
V
DS
= 50V, V
GS
= 0V
-
-
1
A
V
DS
= 45V, V
GS
= 0V, T
C
= 150
o
C
-
-
250
A
Gate to Source Leakage Current
I
GSS
V
GS
=
20V
-
-
100
nA
ON STATE SPECIFICATIONS
Gate to Source Threshold Voltage
V
GS(TH)
V
GS
= V
DS
, I
D
= 250
A (Figure 10)
2
-
4
V
Drain to Source On Resistance
r
DS(ON)
I
D
= 75A, V
GS
= 10V (Figure 9)
-
0.006
0.007
W
THERMAL SPECIFICATIONS
Thermal Resistance Junction to Case
R
JC
(Figure 3)
-
-
0.46
o
C/W
Thermal Resistance Junction to Ambient
R
JA
TO-247
-
-
30
o
C/W
TO-220, TO-263
-
-
62
o
C/W
SWITCHING SPECIFICATIONS (V
GS
= 10V)
Turn-On Time
t
ON
V
DD
= 30V, I
D
75A,
R
L
= 0.4
, V
GS
=
10V,
R
GS
= 2.5
-
-
195
ns
Turn-On Delay Time
t
d(ON)
-
14
-
ns
Rise Time
t
r
-
118
-
ns
Turn-Off Delay Time
t
d(OFF)
-
42
-
ns
Fall Time
t
f
-
26
-
ns
Turn-Off Time
t
OFF
-
-
98
ns
GATE CHARGE SPECIFICATIONS
Total Gate Charge
Q
g(TOT)
V
GS
= 0V to 20V
V
DD
= 30V,
I
D
75A,
R
L
= 0.4
I
g(REF)
= 1.0mA
(Figure 13)
-
220
275
nC
Gate Charge at 10V
Q
g(10)
V
GS
= 0V to 10V
-
125
165
nC
Threshold Gate Charge
Q
g(TH)
V
GS
= 0V to 2V
-
6.8
10
nC
Gate to Source Gate Charge
Q
gs
-
14
-
nC
Gate to Drain "Miller" Charge
Q
gd
-
58
-
nC
HUF75345G3, HUF75345P3, HUF75345S3S
2005 Fairchild Semiconductor Corporation
HUF75345G3, HUF75345P3, HUF75345S3S Rev. B1
CAPACITANCE SPECIFICATIONS
Input Capacitance
C
ISS
V
DS
= 25V, V
GS
= 0V,
f = 1MHz
(Figure 12)
-
4000
-
pF
Output Capacitance
C
OSS
-
1450
-
pF
Reverse Transfer Capacitance
C
RSS
-
450
-
pF
Electrical Specifications
T
C
= 25
o
C, Unless Otherwise Specified (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Source to Drain Diode Specifications
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Source to Drain Diode Voltage
V
SD
I
SD
= 75A
-
-
1.25
V
Reverse Recovery Time
t
rr
I
SD
= 75A, dI
SD
/dt = 100A/
s
-
-
55
ns
Reverse Recovered Charge
Q
RR
I
SD
= 75A, dI
SD
/dt = 100A/
s
-
-
80
nC
Typical Performance Curves
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
T
C
, CASE TEMPERATURE (
o
C)
P
O
W
E
R DI
S
S
IP
A
T
ION
MUL
T
IP
L
I
E
R
0
0
25
50
75
100
150
0.2
0.4
0.6
0.8
1.0
1.2
125
175
I
D
, DRA
IN CURRENT
(
A
)
T
C
, CASE TEMPERATURE (
o
C)
20
40
60
80
50
75
100
125
150
175
0
25
t, RECTANGULAR PULSE DURATION (s)
SINGLE PULSE
NOTES:
DUTY FACTOR: D = t
1
/t
2
PEAK T
J
= P
DM
x Z
JC
x R
JC
+ T
C
P
DM
t
1
t
2
DUTY CYCLE - DESCENDING ORDER
0.5
0.2
0.1
0.05
0.01
0.02
10
-4
10
-3
10
-2
10
-1
10
0
10
1
10
-5
0.1
1
2
0.01
Z
JC
, NORM
AL
IZ
ED
T
H
ERM
A
L
IM
PED
ANCE
HUF75345G3, HUF75345P3, HUF75345S3S
2005 Fairchild Semiconductor Corporation
HUF75345G3, HUF75345P3, HUF75345S3S Rev. B1
FIGURE 4. PEAK CURRENT CAPABILITY
FIGURE 5. FORWARD BIAS SAFE OPERATING AREA
NOTE: Refer to Fairchild Application Notes AN9321 and AN9322.
FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING CAPABILITY
FIGURE 7. SATURATION CHARACTERISTICS
FIGURE 8. TRANSFER CHARACTERISTICS
Typical Performance Curves
(Continued)
10
1
10
0
10
-1
10
-2
10
-3
10
-4
10
-5
50
100
2000
T
C
= 25
o
C
I = I
25
175 - T
C
150
FOR TEMPERATURES
ABOVE 25
o
C DERATE PEAK
CURRENT AS FOLLOWS:
V
GS
= 10V
I
DM
, P
E
AK CURRENT
(
A
)
t, PULSE WIDTH (s)
TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION
1000
V
GS
= 20V
10
100
1000
10
100
1
1
200
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
I
D
,
DRAIN CURR
E
N
T
(
A
)
T
J
= MAX RATED
T
C
= 25
o
C
100
s
10ms
1ms
V
DSS(MAX)
= 55V
LIMITED BY r
DS(ON)
AREA MAY BE
OPERATION IN THIS
1
10
100
100
0.01
1000
10
I
AS
, A
V
AL
ANCHE C
URRENT
(
A
)
t
AV
, TIME IN AVALANCHE (ms)
t
AV
= (L)(I
AS
)/(1.3*RATED BV
DSS
- V
DD
)
If R = 0
If R
0
t
AV
= (L/R)ln[(I
AS
*R)/(1.3*RATED BV
DSS
- V
DD
) +1]
STARTING T
J
= 25
o
C
STARTING T
J
= 150
o
C
0.1
0
30
60
0
1
2
3
4
90
120
I
D
,
DRAIN CURRENT
(
A
)
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
V
GS
= 6V
V
GS
= 10V
V
GS
= 20V
PULSE DURATION = 80
s
T
C
= 25
o
C
V
GS
= 5V
150
V
GS
= 7V
DUTY CYCLE = 0.5% MAX
175
o
C
0
3.0
4.5
6.0
7.5
1.5
0
30
60
90
120
I
D
, D
RAIN CURRENT
(
A
)
V
GS
, GATE TO SOURCE VOLTAGE (V)
-55
o
C
25
o
C
V
DD
= 15V
150
PULSE DURATION = 80
s
DUTY CYCLE = 0.5% MAX
HUF75345G3, HUF75345P3, HUF75345S3S
2005 Fairchild Semiconductor Corporation
HUF75345G3, HUF75345P3, HUF75345S3S Rev. B1
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
FIGURE 10. NORMALIZED GATE THRESHOLD VOLTAGE vs
JUNCTION TEMPERATURE
FIGURE 11. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
NOTE: Refer to Fairchild Application Notes AN7254 and AN7260.
FIGURE 13. GATE CHARGE WAVEFORMS FOR CONSTANT GATE CURRENT
Typical Performance Curves
(Continued)
0.5
1.0
1.5
2.0
2.5
-80
-40
0
40
80
120
160
NO
RM
AL
IZ
ED
DRAIN T
O
SOURCE
T
J
, JUNCTION TEMPERATURE (
o
C)
ON
RES
I
ST
ANCE
PULSE DURATION = 80
s, V
GS
= 10V, I
D
= 75A
200
DUTY CYCLE = 0.5% MAX
-80
-40
0
40
80
120
160
0.4
0.6
0.8
1.0
1.2
NORMA
L
IZ
E
D
GA
T
E
T
J
, JUNCTION TEMPERATURE (
o
C)
T
HRESHOL
D V
O
L
T
A
G
E
V
GS
= V
DS
, I
D
= 250
A
200
1.2
1.1
1.0
0.9
0.8
-80
-40
0
40
80
120
160
T
J
, JUNCTION TEMPERATURE (
o
C)
NORM
AL
IZ
ED DRAIN
T
O
SO
URCE
BREAKDO
WN V
O
L
T
A
G
E
I
D
= 250
A
200
1.3
4000
2000
0
0
10
20
30
40
50
C, CAP
A
C
I
T
ANCE
(
p
F
)
3000
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
1000
C
ISS
C
OSS
C
RSS
60
5000
6000
7000
V
GS
= 0V, f = 1MHz
C
ISS
= C
GS
+ C
GD
C
RSS
= C
GD
C
OSS
C
DS
+ C
GD
10
8
6
4
0
V
GS
, G
A
T
E
T
O
SOURCE V
O
L
T
A
G
E
(
V
)
V
DD
= 30V
2
75
100
125
0
Q
g
, GATE CHARGE (nC)
25
50
I
D
= 75A
I
D
= 55A
I
D
= 35A
I
D
= 20A
WAVEFORMS IN
DESCENDING ORDER:
HUF75345G3, HUF75345P3, HUF75345S3S
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