September 1983
Revised February 1999
MM74HC174
Hex D-
T
ype Fl
i
p
-Fl
ops wi
th
Clea
r
1999 Fairchild Semiconductor Corporation
DS005318.prf
www.fairchildsemi.com
MM74HC174
Hex D-Type Flip-Flops with Clear
General Description
The MM74HC174 edge triggered flip-flops utilize advanced
silicon-gate CMOS technology to implement D-type flip-
flops. They possess high noise immunity, low power, and
speeds comparable to low power Schottky TTL circuits.
This device contains 6 master-slave flip-flops with a com-
mon clock and common clear. Data on the D input having
the specified setup and hold times is transferred to the Q
output on the LOW-to-HIGH transition of the CLOCK input.
The CLEAR input when LOW, sets all outputs to a low
state.
Each output can drive 10 low power Schottky TTL equiva-
lent loads. The MM74HC174 is functionally as well as pin
compatible to the 74LS174. All inputs are protected from
damage due to static discharge by diodes to V
CC
and
ground.
Features
s
Typical propagation delay: 16 ns
s
Wide operating voltage range: 26V
s
Low input current: 1
A maximum
s
Low quiescent current: 80
A (74HC Series)
s
Output drive: 10 LSTTL loads
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Connection Diagram
Pin Assignments for DIP, SOIC, SOP and TSSOP
Truth Table
(Each Flip-Flop)
H
=
HIGH Level (steady state)
L
=
LOW Level (steady state)
X
=
Don't Care
=
Transition from LOW-to-HIGH level
Q
0
=
The level of Q before the indicated steady state input conditions were
established.
Order Number
Package Number
Package Description
MM74HC174M
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
MM74HC174SJ
M16D
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MM74HC174MTC
MTC16
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
MM74HC174N
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Inputs
Outputs
Clear
Clock
D
Q
L
X
X
L
H
H
H
H
L
L
H
L
X
Q
0
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2
MM
74HC174
Logic Diagram
3
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MM74HC174
Absolute Maximum Ratings
(Note 1)
(Note 2)
Recommended Operating
Conditions
Note 1: Absolute Maximum Ratings are those values beyond which dam-
age to the device may occur.
Note 2: Unless otherwise specified all voltages are referenced to ground.
Note 3: Power Dissipation temperature derating -- plastic "N" package:
-
12 mW/
C from 65
C to 85
C.
DC Electrical Characteristics
(Note 4)
Note 4: For a power supply of 5V
10% the worst case output voltages (V
OH
, and V
OL
) occur for HC at 4.5V. Thus the 4.5V values should be used when
designing with this supply. Worst case V
IH
and V
IL
occur at V
CC
=
5.5V and 4.5V respectively. (The V
IH
value at 5.5V is 3.85V.) The worst case leakage cur-
rent (I
IN
, I
CC
, and I
OZ
) occur for CMOS at the higher voltage and so the 6.0V values should be used.
Supply Voltage (V
CC
)
-
0.5 to
+
7.0V
DC Input Voltage (V
IN
)
-
1.5 to V
CC
+
1.5V
DC Output Voltage (V
OUT
)
-
0.5 to V
CC
+
0.5V
Clamp Diode Current (I
IK
, I
OK
)
20 mA
DC Output Current, per pin (I
OUT
)
25 mA
DC V
CC
or GND Current, per pin (I
CC
)
50 mA
Storage Temperature Range (T
STG
)
-
65
C to
+
150
C
Power Dissipation (P
D
)
(Note 3)
600 mW
S.O. Package only
500 mW
Lead Temperature (T
L
)
(Soldering 10 seconds)
260
C
Min
Max
Units
Supply Voltage (V
CC
)
2
6
V
DC Input or Output Voltage
(V
IN
, V
OUT
)
0
V
CC
V
Operating Temperature Range (T
A
)
-
40
+
85
C
Input Rise or Fall Times
(t
r
, t
f
) V
CC
=
2.0V
1000
ns
V
CC
=
4.5V
500
ns
V
CC
=
6.0V
400
ns
Symbol
Parameter
Conditions
V
CC
T
A
=
25
C
T
A
=
-
40 to 85
C T
A
=
-
55 to 125
C
Units
Typ
Guaranteed Limits
V
IH
Minimum HIGH Level
2.0V
1.5
1.5
1.5
V
Input Voltage
4.5V
3.15
3.15
3.15
V
6.0V
4.2
4.2
4.2
V
V
IL
Maximum LOW Level
2.0V
0.5
0.5
0.5
V
Input Voltage
4.5V
1.35
1.35
1.35
V
6.0V
1.8
1.8
1.8
V
V
OH
Minimum HIGH Level
V
IN
=
V
IH
or V
IL
Output Voltage
|I
OUT
|
20
A
2.0V
2.0
1.9
1.9
1.9
V
4.5V
4.5
4.4
4.4
4.4
V
6.0V
6.0
5.9
5.9
5.9
V
V
IN
=
V
IH
or V
IL
|I
OUT
|
4.0 mA
4.5V
4.2
3.98
3.84
3.7
V
|I
OUT
|
5.2 mA
6.0V
5.7
5.48
5.34
5.2
V
V
OL
Maximum LOW Level
V
IN
=
V
IH
or V
IL
Output Voltage
|I
OUT
|
20
A
2.0V
0
0.1
0.1
0.1
V
4.5V
0
0.1
0.1
0.1
V
6.0V
0
0.1
0.1
0.1
V
V
IN
=
V
IH
or V
IL
|I
OUT
|
4.0 mA
4.5V
0.2
0.26
0.33
0.4
V
|I
OUT
|
5.2 mA
6.0V
0.2
0.26
0.33
0.4
V
I
IN
Maximum Input
V
IN
=
V
CC
or GND
6.0V
0.1
1.0
1.0
A
Current
I
CC
Maximum Quiescent
V
IN
=
V
CC
or GND
6.0V
8.0
80
160
A
Supply Current
I
OUT
=
0
A
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4
MM
74HC174
AC Electrical Characteristics
V
CC
= 5V, T
A
= 25
C, C
L
= 15pF, t
r
= t
f
= 6 ns
AC Electrical Characteristics
C
L
=
50 pF, t
r
=
t
f
=
6 ns (unless otherwise specified)
Note 5: C
PD
determines the no load dynamic power consumption, P
D
=
C
PD
V
CC
2
f
+
I
CC
V
CC
, and the no load dynamic current consumption,
I
S
=
C
PD
V
CC
f
+
I
CC
.
Symbol
Parameter
Conditions
Typ
Guaranteed
Units
Limit
f
MAX
Maximum Operating
50
30
MHz
Frequency
t
PHL
, t
PLH
Maximum Propagation
16
30
ns
Delay, Clock or Clear to Output
t
REM
Minimum Removal Time,
-
2
5
ns
Clear to Clock
t
S
Minimum Setup Time
10
20
ns
Data to Clock
t
H
Minimum Hold Time
0
5
ns
Clock to Data
t
W
Minimum Pulse Width
10
16
ns
Clock or Clear
Symbol
Parameter
Conditions
V
CC
T
A
=
25
C
T
A
=
-
40 to 85
C T
A
=
-
55 to 125
C
Units
Typ
Guaranteed Limits
f
MAX
Maximum Operating
2.0V
5
4
3
MHz
Frequency
4.5V
27
21
18
MHz
6.0V
31
24
20
MHz
t
PHL
, t
PLH
Maximum Propagation
2.0V
55
165
206
248
ns
Delay Clock or Clear to Output
4.5V
18
33
41
49
ns
6.0V
16
28
35
42
ns
t
REM
Minimum Removal Time
2.0V
1
5
5
5
ns
Clear to Clock
4.5V
1
5
5
5
ns
6.0V
1
5
5
5
ns
t
S
Minimum Setup Time
2.0V
42
100
125
150
ns
Data to Clock
4.5V
12
20
25
30
ns
6.0V
10
17
21
25
ns
t
H
Minimum Hold Time
2.0V
1
5
5
5
ns
Clock to Data
4.5V
1
5
5
5
ns
6.0V
1
5
5
5
ns
t
W
Minimum Pulse Width
2.0V
35
80
106
120
ns
Clock or Clear
4.5V
10
16
20
24
ns
6.0V
8
14
18
20
ns
t
TLH
, t
THL
Maximum Output Rise
2.0V
30
75
95
110
ns
and Fall Time
4.5V
8
15
19
22
ns
6.0V
7
13
16
19
ns
t
r
, t
f
Maximum Input Rise and
2.0V
1000
1000
1000
ns
Fall Time
4.5V
500
500
500
ns
6.0V
400
400
400
ns
C
PD
Power Dissipation
(per package)
136
pF
Capacitance (Note 5)
C
IN
Maximum Input
5
10
10
10
pF
Capacitance
5
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MM74HC174
Physical Dimensions
inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC)JEDEC MS-012, 0.150" Narrow
Package Number M16A
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M16D
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