February 1984
Revised February 1999
MM74HCT00 Q
u
ad
2 Inp
u
t NA
ND Gate
1999 Fairchild Semiconductor Corporation
DS005356.prf
www.fairchildsemi.com
MM74HCT00
Quad 2 Input NAND Gate
General Description
The MM74HCT00 is a NAND gates fabricated using
advanced silicon-gate CMOS technology which provides
the inherent benefits of CMOS--low quiescent power and
wide power supply range. This device is input and output
characteristic and pin-out compatible with standard 74LS
logic families. All inputs are protected from static discharge
damage by internal diodes to V
CC
and ground.
MM74HCT devices are intended to interface between TTL
and NMOS components and standard CMOS devices.
These parts are also plug-in replacements for LS-TTL
devices and can be used to reduce power consumption in
existing designs.
Features
s
TTL, LS pin-out and threshold compatible
s
Fast switching: t
PLH
, t
PHL
=
14 ns (typ)
s
Low power: 10
W at DC
s
High fan out, 10 LS-TTL loads
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Connection Diagram
Pin Assignments for DIP, SOIC, SOP and TSSOP
Top View
Logic Diagram
(1 of 4 gates)
Order Number
Package Number
Package Description
MM74HCT00M
M14A
14-Lead Small Outline Integrate Circuit (SOIC), JEDEC MS-120, 0.150" Narrow
MM74HCT00SJ
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MM74HCT00MTC
MTC14
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
MM74HCT00N
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
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2
MM
74
H
C
T00
Absolute Maximum Ratings
(Note 1)
(Note 2)
Recommended Operating
Conditions
Note 1: Absolute Maximum Ratings are those values beyond which dam-
age to the device may occur.
Note 2: Unless otherwise specified all voltages are referenced to ground.
Note 3: Power Dissipation temperature derating -- plastic "N" package:
-
12 mW/
C from 65
C to 85
C.
DC Electrical Characteristics
V
CC
=
5V
10% (unless otherwise specified)
Note 4: This is measured per input with all other inputs held at V
CC
or ground.
Supply Voltage (V
CC
)
-
0.5 to
+
7.0V
DC Input Voltage (V
IN
)
-
1.5 to V
CC
+
1.5V
DC Output Voltage (V
OUT
)
-
0.5 to V
CC
+
0.5V
Clamp Diode Current (I
IK
, I
OK
)
20 mA
DC Output Current, per pin (I
OUT
)
25 mA
DC V
CC
or GND Current, per pin (I
CC
)
50 mA
Storage Temperature Range (T
STG
)
-
65
C to
+
150
C
Power Dissipation (P
D
)
(Note 3)
600 mW
S.O. Package only
500 mW
Lead Temperature (T
L
)
(Soldering 10 seconds)
260
C
Min
Max
Units
Supply Voltage (V
CC
)
4.5
5.5
V
DC Input or Output Voltage
0
V
CC
V
(V
IN
, V
OUT
)
Operating Temperature Range (T
A
)
-
40
+
85
C
Input Rise or Fall Times
(t
r
, t
f
)
500
ns
Symbol
Parameter
Conditions
T
A
=
25
C
T
A
=
-
40 to 85
C T
A
=
-55 to 125
C
Units
Typ
Guaranteed Limits
V
IH
Minimum HIGH Level
2.0
2.0
2.0
V
Input Voltage
V
IL
Maximum LOW Level
0.8
0.8
0.8
V
Input Voltage
V
OH
Minimum HIGH Level
V
IN
=
V
IH
or V
IL
Output Voltage
|I
OUT
|
=
20
A
V
CC
V
CC
-
0.1
V
CC
-
0.1
V
CC
-
0.1
V
|I
OUT
|
=
4.0 mA, V
CC
=
4.5V
4.2
3.98
3.84
3.7
V
|I
OUT
|
=
4.8 mA, V
CC
=
5.5V
5.2
4.98
4.84
4.7
V
V
OL
Maximum LOW Level
V
IN
=
V
IH
Voltage
|I
OUT
|
=
20
A
0
0.1
0.1
0.1
V
|I
OUT
|
=
4.0 mA, V
CC
=
4.5V
0.2
0.26
0.33
0.4
V
|I
OUT
|
=
4.8 mA, V
CC
=
5.5V
0.2
0.26
0.33
0.4
V
I
IN
Maximum Input
V
IN
=
V
CC
or GND,
0.05
0.5
1.0
A
Current
V
IH
or V
IL
I
CC
Maximum Quiescent
V
IN
=
V
CC
or GND,
1.0
10
40
A
Supply Current
I
OUT
=
0
A
V
IN
=
2.4V or 0.5V (Note 4)
0.18
0.3
0.4
0.5
mA
3
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MM74HCT00
AC Electrical Characteristics
V
CC
= 5.0V, t
r
= t
r
= 6 ns, C
L
= 15 pF, T
A
= 25
C (unless otherwise noted)
AC Electrical Characteristics
V
CC
= 5.0V
10%, t
r
= t
f
= 6 ns, C
L
= 50 pF (unless otherwise noted)
Note 5: C
PD
determines the no load dynamic power consumption, P
D
=
C
PD
V
CC
2
f
+
I
CC
V
CC
, and the no load dynamic current consumption,
I
S
=
C
PD
V
CC
f
+
I
CC
.
Symbol
Parameter
Conditions
Typ
Guaranteed
Limit
Units
t
PLH
, t
PHL
Maximum Propagation Delay
14
18
ns
Symbol
Parameter
Conditions
T
A
=
25
C
T
A
=
-
40 to 85
C T
A
=
-
55 to 125
C
Units
Typ
Guaranteed Limits
t
PLH
, t
PHL
Maximum Propagation Delay
18
23
29
35
ns
t
THL
, t
TLH
Maximum Output Rise & Fall
Time
8
15
19
22
ns
C
PD
Power Dissipation Capacitance
(Note 5)
30
pF
C
IN
Input Capacitance
5
10
10
10
pF
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4
MM
74
H
C
T00
Physical Dimensions
inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150" Narrow
Package Number M14A
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M14D
5
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MM74HCT00
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC14
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