September 1983
Revised February 1999
MM74HCU04 H
e
x
I
nvert
e
r
1999 Fairchild Semiconductor Corporation
DS005296.prf
www.fairchildsemi.com
MM74HCU04
Hex Inverter
General Description
The MM74HCU04 inverters utilize advanced silicon-gate
CMOS technology to achieve operating speeds similar to
LS-TTL gates with the low power consumption of standard
CMOS integrated circuits.
The MM74HCU04 is an unbuffered inverter. It has high
noise immunity and the ability to drive 15 LS-TTL loads.
The 74HCU logic family is functionally as well as pin-out
compatible with the standard 74LS logic family. All inputs
are protected from damage due to static discharge by inter-
nal diode clamps to V
CC
and ground.
Features
s
Typical propagation delay: 7 ns
s
Fanout of 15 LS-TTL loads
s
Quiescent power consumption: 10
A maximum at room
temperature
s
Low input current: 1
A maximum
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Connection Diagram
Pin Assignments for DIP, SOIC, SOP and TSSOP
Top View
Schematic Diagram
Order Number
Package Number
Package Description
MM74HCU04M
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150" Narrow
MM74HCU04SJ
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MM74HCU04MTC
MTC14
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
MM74HCU04N
N14A
14-Lead Plastic Dual-In-Lead Package (PDIP), JEDEC MS-001, 0.300" Wide
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2
MM
7
4
HC
U04
Absolute Maximum Ratings
(Note 1)
(Note 2)
Recommended Operating
Conditions
Note 1: Absolute Maximum Ratings are those values beyond which dam-
age to the device may occur.
Note 2: Unless otherwise specified all voltages are referenced to ground.
Note 3: Power Dissipation temperature derating -- plastic "N" package:
-
12 mW/
C from 65
C to 85
C.
DC Electrical Characteristics
(Note 4)
Note 4: For a power supply of 5V
10% the worst case output voltages (V
OH
, and V
OL
) occur for HC at 4.5V. Thus the 4.5V values should be used when
designing with this supply. Worst case V
IH
and V
IL
occur at V
CC
=
5.5V and 4.5V respectively. (The V
IH
value at 5.5V is 3.85V.) The worst case leakage cur-
rent (I
IN
, I
CC
, and I
OZ
) occur for CMOS at the higher voltage and so the 6.0V values should be used.
Supply Voltage (V
CC
)
-
0.5 to
+
7.0V
DC Input Voltage (V
IN
)
-
1.5 to V
CC
+
1.5V
DC Output Voltage (V
OUT
)
-
0.5 to V
CC
+
0.5V
Clamp Diode Current (I
IK
, I
OK
)
20 mA
DC Output Current, per pin (I
OUT
)
25 mA
DC V
CC
or GND Current, per pin (I
CC
)
50 mA
Storage Temperature Range (T
STG
)
-
65
C to
+
150
C
Power Dissipation (P
D
)
(Note 3)
600 mW
S.O. Package only
500 mW
Lead Temperature (T
L
)
(Soldering 10 seconds)
260
C
Min
Max
Units
Supply Voltage (V
CC
)
2
6
V
DC Input or Output Voltage
0
V
CC
V
(V
IN
, V
OUT
)
Operating Temperature Range (T
A
)
-
40
+
85
C
Symbol
Parameter
Conditions
V
CC
T
A
=
25
C
T
A
=
-
40 to 85
C T
A
=
-
55 to 125
C
Units
Typ
Guaranteed Limits
V
IH
Minimum HIGH Level
2.0V
1.7
1.7
1.7
V
Input Voltage
4.5V
3.6
3.6
3.6
V
6.0V
4.8
4.8
4.8
V
V
IL
Maximum LOW Level
2.0V
0.3
0.3
0.3
V
Input Voltage
4.5V
0.8
0.8
0.8
V
6.0V
1.1
1.1
1.1
V
V
OH
Minimum HIGH Level
V
IN
=
V
IL
Output Voltage
|I
OUT
|
20
A
2.0V
2.0
1.8
1.8
1.8
V
4.5V
4.5
4.0
4.0
4.0
V
6.0V
6.0
5.5
5.5
5.5
V
V
IN
=
GND
|I
OUT
|
4.0 mA
4.5V
4.2
3.98
3.84
3.7
V
|I
OUT
|
5.2 mA
6.0V
5.7
5.48
5.34
5.2
V
V
OL
Maximum LOW Level
V
IN
=
V
IH
Output Voltage
|I
OUT
|
20
A
2.0V
0
0.2
0.2
0.2
V
4.5V
0
0.5
0.5
0.5
V
6.0V
0
0.5
0.5
0.5
V
V
IN
=
V
CC
|I
OUT
|
6.0 mA
4.5V
0.2
0.26
0.33
0.4
V
|I
OUT
|
7.8 mA
6.0V
0.2
0.26
0.33
0.4
V
I
IN
Maximum Input
V
IN
=
V
CC
or GND
6.0V
0.1
1.0
1.0
A
Current
I
CC
Maximum Quiescent
V
IN
=
V
CC
or GND
6.0V
2.0
20
40
A
Supply Current
I
OUT
=
0
A
3
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MM74HCU04
AC Electrical Characteristics
V
CC
=
5V, T
A
=
25
C, C
L
=
15 pF, t
r
=
t
f
=
6 ns
AC Electrical Characteristics
V
CC
=
2.0V to 6.0V, C
L
=
50 pF, t
r
=
t
f
=
6 ns (unless otherwise specified)
Note 5: C
PD
determines the no load dynamic power consumption, P
D
=
C
PD
V
CC
2
f
+
I
CC
V
CC
, and the no load dynamic current consumption,
I
S
=
C
PD
V
CC
f
+
I
CC
.
Typical Applications
FIGURE 1. Crystal Oscillator
FIGURE 2. Stable RC Oscillator
FIGURE 3. Schmitt Trigger
Symbol
Parameter
Conditions
Typ
Guaranteed
Units
Limit
t
PHL
, t
PLH
Maximum Propagation
7
13
ns
Delay
Symbol
Parameter
Conditions
V
CC
T
A
=
25
C
T
A
=-
40 to 85
C T
A
=-
55 to 125
C
Units
Typ
Guaranteed Limits
t
PHL
, t
PLH
Maximum Propagation
2.0V
49
82
103
120
ns
Delay
4.5V
9.9
16
21
24
ns
6.0V
8.4
14
18
20
ns
t
TLH
, t
THL
Maximum Output Rise
2.0V
30
75
95
110
ns
and Fall Time
4.5V
8
15
19
22
ns
6.0V
7
13
16
19
ns
C
PD
Power Dissipation
(per gate)
90
pF
Capacitance (Note 5)
C
IN
Maximum Input
8
15
15
15
pF
Capacitance
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4
MM
7
4
HC
U04
Physical Dimensions
inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150" Narrow
Package Number M14A
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M14D
5
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MM74HCU04
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC14
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