January 1999
NDH8321C
Dual N & P-Channel Enhancement Mode Field Effect Transistor
General Description
Features
_______________________________________________________________________________
Absolute Maximum Ratings
T
A
= 25C unless otherwise noted
Symbol
Parameter
N-Channel
P-Channel
Units
V
DSS
Drain-Source Voltage
20
-20
V
V
GSS
Gate-Source Voltage
8
8
V
I
D
Drain Current - Continuous
(Note 1)
3.8
-2.7
A
- Pulsed
15
-10
P
D
Power Dissipation for Single Operation
(Note 1)
0.8
W
T
J
,T
STG
Operating and Storage Temperature Range
-55 to 150
C
THERMAL CHARACTERISTICS
R
JA
Thermal Resistance, Junction-to-Ambient
(Note 1)
156
C/W
R
JC
Thermal Resistance, Junction-to-Case
(Note 1)
40
C/W
NDH8321C Rev.C1
These dual N- and P -Channel enhancement mode power
field effect transistors are produced using Fairchild's
proprietary, high cell density, DMOS technology. This very
high density process is especially tailored to minimize
on-state resistance and provide superior switching
performance. These devices are particularly suited for low
voltage applications such as notebook computer power
management and other battery powered circuits where fast
switching, low in-line power loss, and resistance to
transients are needed.
N-Ch 3.8 A, 20 V, R
DS(ON)
=0.035
@ V
GS
= 4.5 V
R
DS(ON)
=0.045
@ V
GS
=2.7 V
P-Ch -2.7 A, -20V, R
DS(ON)
=0.07
@ V
GS
= -4.5 V
R
DS(ON)
=0.095
@ V
GS
= -2.7 V.
Proprietary SuperSOT
TM
-8 package design using copper
lead frame for superior thermal and electrical capabilities.
High density cell design for extremely low R
DS(ON)
.
Exceptional on-resistance and maximum DC current
capability.
1
5
7
8
6
4
3
2
D1
D2
D2
D1
G1
G2
S1
S2
SuperSOT -8
TM
Mark: .8321C
1999 Fairchild Semiconductor Corporation
Electrical Characteristics
(T
A
= 25C unless otherwise noted)
Symbol
Parameter
Conditions
Type
Min
Typ
Max
Units
OFF CHARACTERISTICS
BV
DSS
Drain-Source Breakdown Voltage
V
GS
= 0 V, I
D
= 250 A
N-Ch
20
V
V
GS
= 0 V, I
D
= -250 A
P-Ch
-20
V
I
DSS
Zero Gate Voltage Drain Current
V
DS
= 16 V, V
GS
= 0 V
N-Ch
1
A
T
J
= 55
o
C
10
A
V
DS
= -16 V, V
GS
= 0 V
P-Ch
-1
A
T
J
= 55
o
C
-10
A
I
GSSF
Gate - Body Leakage, Forward
V
GS
= 8 V, V
DS
= 0 V
All
100
nA
I
GSSR
Gate - Body Leakage, Reverse
V
GS
= -8 V, V
DS
= 0 V
All
-100
nA
ON CHARACTERISTICS
(Note 2)
V
GS(th)
Gate Threshold Voltage
V
DS
= V
GS
, I
D
= 250 A
N-Ch
0.4
0.7
1
V
T
J
= 125
o
C
0.3
0.45
0.8
V
DS
= V
GS
, I
D
= -250 A
P-Ch
-0.4
-0.7
-1
T
J
= 125
o
C
-0.3
-0.5
-0.8
R
DS(ON)
Static Drain-Source On-Resistance
V
GS
= 4.5 V, I
D
= 3.8 A
N-Ch
0.029
0.035
T
J
= 125
o
C
0.043
0.063
V
GS
= 2.7 V, I
D
= 3.3 A
0.036
0.045
V
GS
= -4.5 V, I
D
= -2.7 A
P-Ch
0.061
0.07
T
J
= 125
o
C
0.087
0.125
V
GS
= -2.7 V, I
D
= -2.3A
0.082
0.095
I
D(on)
On-State Drain Current
V
GS
= 4.5 V, V
DS
= 5 V
N-Ch
15
A
V
GS
= 2.7 V, V
DS
= 5 V
5
V
GS
= -4.5 V, V
DS
= -5 V
P-Ch
-10
V
GS
= -2.7 V, V
DS
= -5 V
-3
g
FS
Forward Transconductance
V
DS
= 5 V, I
D
= 3.8 A
N-Ch
15
S
V
DS
= -5 V, I
D
= -2.7 A
P-Ch
8
DYNAMIC CHARACTERISTICS
C
iss
Input Capacitance
N-Channel
V
DS
= 10 V, V
GS
= 0 V,
f = 1.0 MHz
P-Channel
V
DS
= -10 V, V
GS
= 0 V,
f = 1.0 MHz
N-Ch
700
pF
P-Ch
865
C
oss
Output Capacitance
N-Ch
370
pF
P-Ch
415
C
rss
Reverse Transfer Capacitance
N-Ch
145
pF
P-Ch
150
NDH8321C Rev.C1
Electrical Characteristics
(T
A
= 25C unless otherwise noted)
Symbol
Parameter
Conditions
Type
Min
Typ
Max
Units
SWITCHING CHARACTERISTICS
(Note 2)
t
D(on)
Turn - On Delay Time
N-Channel
V
DD
= 5 V, I
D
= 1 A,
V
GEN
= 4.5 V, R
GEN
= 6
P-Channel
V
DD
= -5 V, I
D
= -1 A,
V
GEN
= -4.5 V, R
GEN
= 6
N-Ch
8
15
ns
P-Ch
11
22
t
r
Turn - On Rise Time
N-Ch
22
40
ns
P-Ch
25
50
t
D(off)
Turn - Off Delay Time
N-Ch
48
90
ns
P-Ch
78
150
t
f
Turn - Off Fall Time
N-Ch
23
40
ns
P-Ch
55
100
Q
g
Total Gate Charge
N-Channel
V
DS
= 10 V,
I
D
= 3.8 A, V
GS
= 4.5 V
P-Channel
V
DS
= -10 V,
I
D
= -2.7 A, V
GS
= -4.5 V
N-Ch
19.6
28
nC
P-Ch
16
23
Q
gs
Gate-Source Charge
N-Ch
2.5
nC
P-Ch
2.4
Q
gd
Gate-Drain Charge
N-Ch
6.5
nC
P-Ch
5.1
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
I
S
Maximum Continuous Drain-Source Diode Forward Current
N-Ch
0.67
A
P-Ch
-0.67
V
SD
Drain-Source Diode Forward Voltage
V
GS
= 0 V, I
S
= 0.67 A
(Note2)
N-Ch
0.65
1.2
V
V
GS
= 0 V, I
S
= -0.67 A
(Note2)
P-Ch
-0.7
-1.2
Notes:
1. R
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
JC
is guaranteed
by design while R
CA
is determined by the user's board design.
Typical R
JA
for single device operation using the board layout shown below on 4.5"x5" FR-4 PCB in a still air environment:
156
o
C/W when mounted on a 0.0025 in
2
pad of 2oz copper.
Scale 1 : 1 on letter size paper.
2. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0%.
NDH8321C Rev.C1
P
D
(
t
) =
T
J
-
T
A
R
J A
(
t
)
=
T
J
-
T
A
R
J C
+
R
CA
(
t
)
=
I
D
2
(
t
)
R
DS
(
ON
)
@T
J
NDH8321C Rev.C1
Typical Electrical Characteristics: N-Channel
Figure 1. N-Channel On-Region Characteristics.
Figure 2. N-Channel On-Resistance Variation
with Gate Voltage and Drain Current.
Figure 3. N-Channel On-Resistance Variation
with Temperature.
Figure 4. N-Channel On-Resistance Variation with Drain
Current and Temperature.
Figure 5. N-Channel Transfer
Characteristics.
Figure 6. N-Channel Gate Threshold Variation
with Temperature.
0
0 .5
1
1 .5
2
2 .5
3
0
4
8
1 2
1 6
2 0
V , DRAIN-SOURCE VOLTAGE (V)
I , DRAIN-SOURCE CURRE
NT (A)
DS
D
1 .5
2 .0
2.7
2 .5
3 .0
V = 4.5V
GS
0
4
8
1 2
1 6
2 0
0 .8
1
1 .2
1 .4
1 .6
1 .8
2
I , DRAIN CURRENT (A)
DRAIN-SOURC
E O
N
-RESIST
AN
CE
V = 2 .0V
GS
D
R ,
NO
RMALIZED
DS(on)
4 .5
3 .5
2 .5
3.0
2.7
4 .0
-50
-25
0
2 5
5 0
7 5
1 0 0
1 2 5
1 5 0
0 .6
0 .8
1
1 .2
1 .4
1 .6
1 .8
T , JUNCTION TEM PERATURE (C)
DRAIN-SOURCE ON-RESISTA
N
CE
J
R ,
NORMALIZ
ED
DS(ON)
V = 4.5V
GS
I = 3.8A
D
0
4
8
1 2
1 6
2 0
0
0 .5
1
1 .5
2
I , DRAIN CURRENT (A)
DRAIN-SOURC
E ON-RESISTANCE
V = 4.5 V
GS
T = 125C
J
25C
-5 5 C
D
R ,
NO
RMALIZED
DS(on)
0
0 .5
1
1 .5
2
2 .5
0
3
6
9
1 2
1 5
V , GATE TO SOU RCE VOLTAGE (V)
I , DRAIN C
U
RRE
NT (A)
2 5 C
1 2 5 C
V = 5V
DS
GS
D
T = -55C
J
-50
-25
0
2 5
5 0
7 5
1 0 0
1 2 5
1 5 0
0 .5
0 .6
0 .7
0 .8
0 .9
1
1 .1
1 .2
1 .3
T , JUNCTION TEM PERATURE (C)
GAT
E-SO
URCE THRESHOLD VOLTAG
E
J
V ,
NO
RMALIZED
th
I = 2 5 0 A
D
V = V
GS
DS
NDH8321C Rev.C1
Figure 7. N-Channel Breakdown Voltage
Variation with Temperature.
Figure 8. N-Channel Body Diode Forward
Voltage Variation with Current and
Temperature
.
Figure 9. N-Channel Capacitance
Characteristics.
Figure 10. N-Channel Gate Charge
Characteristics.
Typical Electrical Characteristics: N-Channel
(continued)
Figure 11. N-Channel Transconductance Variation
with Drain Current and Temperature.
-5 0
-2 5
0
2 5
5 0
7 5
1 0 0
1 2 5
1 5 0
0 .9
0 .9 5
1
1 .0 5
1 .1
1 .1 5
T , JUNCTION TEMPERATURE (C)
DRAIN-SOURCE BREAKDO
WN VOLTAG
E
BV , NORMALIZED
DSS
J
I = 250A
D
-5 0
-2 5
0
2 5
5 0
7 5
1 0 0
1 2 5
1 5 0
0 .9
0 .9 5
1
1 .0 5
1 .1
1 .1 5
T , JUNCTION TEMPERATURE (C)
DRAIN-SOURCE BREAKDO
WN VOLTAG
E
BV , NORMALIZED
DSS
J
I = 250A
D
0
5
1 0
1 5
2 0
2 5
0
1
2
3
4
5
Q , GATE CHARGE (nC)
V , GATE-SOURCE VOLTAGE (V)
g
GS
I = 3.8A
D
V = 5V
DS
10V
15V
0 .1
0 .2
0 .5
1
3
5
1 0
2 0
1 0 0
2 0 0
3 0 0
5 0 0
1 0 0 0
1 5 0 0
2 0 0 0
2 5 0 0
V , DRAIN TO SOURCE VOLTAGE (V)
CAPACITANCE (pF)
DS
f = 1 MHz
V = 0V
GS
C
oss
C
iss
C
rss
0
4
8
1 2
1 6
2 0
0
5
1 0
1 5
2 0
2 5
3 0
I , DRAIN CURRENT (A)
g , TRANSCONDUCTANC
E (SIE
M
E
NS)
T = -55C
J
D
FS
V = 5V
DS
125C
2 5 C
NDH8321C Rev.C1
-4
-3
-2
-1
0
-15
-12
-9
-6
-3
0
V , DRAIN-SOURCE VOLTAGE (V)
I , DRAIN-SOURCE CURRENT (A)
DS
D
-3 .5
-2 .0
-3 .0
-2 .5
-1 .5
V =-4.5V
GS
-2 .7
-50
-25
0
2 5
5 0
7 5
1 0 0
1 2 5
1 5 0
0 .6
0 .8
1
1 .2
1 .4
1 .6
T , JUNCTION TEM PERATURE (C)
DR
A
IN-SOURCE O
N
-RESISTANCE
J
R ,
NO
RMALIZED
DS(ON)
V = -4.5V
GS
I = -2.7A
D
-50
-25
0
2 5
5 0
7 5
1 0 0
1 2 5
1 5 0
0 .5
0 .6
0 .7
0 .8
0 .9
1
1 .1
1 .2
T , JUNCTION TEMPERATURE (C)
GATE-SOURCE THRESHOLD VOLTAGE
J
V ,
NO
RMALIZED
GS(th)
I = -250A
D
V = V
GS
DS
-15
-12
-9
-6
-3
0
0 .5
1
1 .5
2
2 .5
I , DRA IN CURRENT (A)
DRAIN-SOURCE ON-RESISTANCE
D
R ,
NO
RMALIZED
DS(on)
-2.7
-4.5
-2.5
-3.0
-3.5
V = -2.0V
GS
-15
-12
-9
-6
-3
0
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
I , DRAIN CURRENT (A)
DRAIN-SOURCE ON-RESIS
TANCE
D
R , NORMALIZED
DS(on)
V = -4.5V
GS
T = 125C
J
25C
-5 5 C
Typical Electrical Characteristics: P-Channel (continued)
Figure 12. P-Channel On-Region Characteristics.
Figure 13. P-Channel On-Resistance Variation
with Gate Voltage and Drain Current.
Figure 14. P-Channel On-Resistance Variation
with Temperature.
Figure 15. P-Channel On-Resistance Variation
with Drain Current and Temperature.
Figure 16. P-Channel Transfer Characteristics.
Figure 17. P-Channel Gate Threshold Variation
with Temperature.
-2.5
-2
-1.5
-1
-0.5
-8
-6
-4
-2
0
V , GATE TO SOURCE VOLTAGE (V)
I , DRAIN CURRENT (A)
V = -5V
DS
GS
D
T = -5 5 C
J
1 2 5 C
2 5 C
NDH8321C Rev.C1
-50
-25
0
2 5
5 0
7 5
1 0 0
1 2 5
1 5 0
0 .9 4
0 .9 6
0 .9 8
1
1 .0 2
1 .0 4
1 .0 6
1 .0 8
1 .1
T , JUNCTION TEMPERATURE (C)
DRAIN-SOURCE BREAKDO
WN VOLTAGE
I = -250A
D
J
BV , NOR
MA
LIZED
DSS
0
0 .2
0 .4
0 .6
0 .8
1
1 .2
0 .0001
0 .001
0 .01
0 .1
0 .5
1
3
1 0
-V , BODY DIODE FORW A RD VOLTAGE (V)
-I , REVERSE DR
AIN CURRENT (A)
T = 125C
J
2 5 C
-55C
V = 0V
GS
SD
S
0 .1
0 .2
0 .5
1
2
5
1 0
2 0
1 0 0
2 0 0
3 0 0
5 0 0
1 0 0 0
1 5 0 0
2 5 0 0
-V , DRAIN TO SOURCE VOLTAGE (V)
CAPACITANCE (pF)
DS
C
iss
f = 1 MHz
V = 0 V
GS
C
oss
C
rss
Figure 18. P-Channel Breakdown Voltage
Variation with Temperature.
Figure 19. P-Channel Body Diode Forward
Voltage Variation with Current and
Temperature
.
Figure 20. P-Channel Capacitance Characteristics.
Figure 21. P-Channel Gate Charge Characteristics.
Typical Electrical Characteristics: P-Channel
(continued)
-20
-16
-12
-8
-4
0
0
4
8
1 2
1 6
2 0
I , DRAIN CURRENT (A)
g , TRANSCONDUCTANC
E (SIE
M
E
NS
)
V = -4.5V
DS
T = -55C
J
2 5 C
D
FS
1 2 5 C
Figure 22. P-Channel Transconductance Variation
with Drain Current and Temperature.
0
5
1 0
1 5
2 0
0
1
2
3
4
5
Q , GATE CHARGE (nC)
-V , GATE-SOURCE VOLTAGE (V)
V = -5V
DS
I = -2.7A
-1 5 V
g
GS
-1 0 V
D
NDH8321C Rev.C1
Typical Thermal Characteristics:
N & P-Channel
Figure 23. N-Channel Maximum Safe Operating
Area.
0 .1
0 .2
0 .5
1
2
5
1 0
3 0
0 .01
0 .03
0 .1
0 .3
1
3
1 0
3 0
V , DRAIN-SOURCE VOLTAGE (V)
I , DRAIN CURRENT (A)
DS
D
RDS(ON) LIMIT
V = 4.5V
SINGLE PULSE
R = See Note 1c
T = 25C
GS
A
J A
10s
100
m s
100us
DC
1 0m
s
1 m
s
1s
0 .1
0 .2
0 .5
1
2
5
1 0
2 0
3 0
0 .0 1
0 .0 5
0 .1
0 .5
1
2
5
1 0
1 5
- V , DRAIN-SOURCE VOLTAGE (V)
-I , DRAIN CURRENT (A)
RDS(ON) LIMIT
D
A
DC
DS
1s
100
m
s
10
m s
1ms
10s
V = -4.5V
SINGLE PULSE
R = See Note 1
T = 25C
JA
GS
A
0 .0 0 0 1
0 .0 0 1
0 .0 1
0.1
1
1 0
1 0 0
3 0 0
0 .0 0 1
0 .0 1
0 .1
1
t , TIM E (sec)
TRANSIENT TH
ER
MAL RESISTANCE
r(t), NOR
MALIZED EFFECTIVE
1
Single Pulse
D = 0.5
0 .1
0 .05
0 .02
0 .0 1
0 .2
Duty Cycle, D = t / t
1
2
R (t) = r(t) * R
R = See Note 1
JA
JA
JA
T - T = P * R (t)
JA
A
J
P(pk)
t
1
t
2
r(t), NOR
MALIZED EFFECTIVE
1
Single Pulse
D = 0.5
0 .1
0 .05
0 .02
0 .0 1
0 .2
Duty Cycle, D = t / t
1
2
R (t) = r(t) * R
R = See Note 1
JA
JA
JA
T - T = P * R (t)
JA
A
J
P(pk)
t
1
t
2
Figure 24. P-Channel Maximum Safe Operating
Area.
G
D
S
V
DD
R
L
V
V
IN
OUT
V
GS
DUT
R
GEN
Figure 26. N or P-Channel Switching Test Circuit
.
Figure 27. N or P-Channel Switching Waveforms
.
Figure 25. Transient Thermal Response Curve
.
Note: Thermal characterization performed using the conditions described in note1 .
Transient thermal response will change depending on the circuit board design.
10%
50%
90%
10%
90%
90%
50%
V
IN
V
OUT
o n
off
d (off)
f
r
d (on)
t
t
t
t
t
t
10%
PULSE W IDTH
SSOT-8 Packaging
Configuration: Figure 1.0
Components
Lead er Tape
500mm mi nimum or
62 empty poc kets
Traile r Tape
300mm mi nimum or
38 empty pockets
SSOT-8 Tape Leader and Trailer
Configuration: Figur e 2.0
Cover Tape
Carrier Tape
Note/Comments
Packaging Option
SSOT-8 Packaging Information
Standard
(no
f l ow c ode )
D84Z
Packaging type
Reel Size
TNR
13" D ia
TNR
7" Dia
Qty per Reel/Tube/Bag
3,000
500
Box Dimension (mm)
343x64x343
184x187x47
Max qty per Box
6,000
1,000
Weight per unit (gm)
0.0416
0.0416
Weight per Reel (kg)
0.5615
0.0980
184mm x 187mm x 47mm
Pizza Box fo r D84Z Option
F63TNR
Label
F63TNR Labe l
F63TNR Labe l sa mpl e
343mm x 342mm x 64mm
Intermediate bo x fo r Standar d
and L 99Z Opti ons
F63TNR
Label
LOT: CBVK741B019
FSID: FDR835N
D/C1: D9842 QTY1:
SPEC REV:
SPEC:
QTY: 3000
D/C2:
QTY2:
CPN:
N/F: F (F63TNR)3
SSOT-8 Unit Orientation
F852
831N
F852
831N
F852
831N
F852
831N
F852
831N
Pin 1
F63TNR Labe l
Anti static Cover Tape
Customized La bel
Static Dissi pat ive
Emboss ed Carrier Tape
Packaging Description:
SSOT-8 parts are shipped in tape. The carrier tape is
made from a di ssipat ive (carbo n filled) po ly carbon ate
resin. The cover tape is a multilayer film (Heat Activated
Adhesive in nature) primarily composed of polyester film ,
adhesive layer, sealant, and anti-static sprayed agent.
These reeled parts in standard option are shipped w ith
3,000 units per 13" or 330cm diameter reel. The reels are
dark blue in color and is made of polystyrene plastic (anti-
static coated). Other option comes in 500 unit s per 7" or
177cm diameter reel. This and some other options are
further described in the Packagin g Information table.
These full reels are in di vidu ally barcod e labeled and
placed inside a standard intermediate box (ill ustrated in
figure 1.0) made of recyclable corrugated brow n paper.
One box contains two reels maximum. And t hese boxes
are placed ins ide a barcode labeled shipp ing bo x whic h
comes in di fferent sizes depend in g on t he nu mber of parts
shippe d.
SuperSOT
TM
-8 Tape and Reel Data and Package Dimensions
August 1999, Rev. C
1998 Fairchild Semiconductor Corporation
Dimensions are in millimeter
Pkg type
A0
B0
W
D0
D1
E1
E2
F
P1
P0
K0
T
Wc
Tc
SSOT-8
(12mm)
4.47
+/-0.10
5.00
+/-0.10
12.0
+/-0.3
1.55
+/-0.05
1.50
+/-0.10
1.75
+/-0.10
10.25
mi n
5.50
+/-0.05
8.0
+/-0.1
4.0
+/-0.1
1.37
+/-0.10
0.280
+/-0.150
9.5
+/-0.025
0.06
+/-0.02
P1
A0
D1
P0
F
W
E1
D0
E2
B0
Tc
Wc
K0
T
Dimensions are in inches and millimeters
Tape Size
Reel
Option
Dim A
Dim B
Dim C
Dim D
Dim N
Dim W1
Dim W2
Dim W3 (LSL-USL)
12mm
7" Dia
7.00
177.8
0.059
1.5
512 +0.020/-0.008
13 +0.5/-0.2
0.795
20.2
5.906
150
0.488 +0.078/-0.000
12.4 +2/0
0.724
18.4
0.469 0.606
11.9 15.4
12mm
13" Dia
13.00
330
0.059
1.5
512 +0.020/-0.008
13 +0.5/-0.2
0.795
20.2
7.00
178
0.488 +0.078/-0.000
12.4 +2/0
0.724
18.4
0.469 0.606
11.9 15.4
See detail AA
Dim A
max
13" Diameter Option
7" Diameter Option
Dim A
Max
See detail AA
W3
W2 max Measured at Hub
W1 Measured at Hub
Dim N
Dim D
min
Dim C
B Min
DETAIL AA
Notes : A0, B0, and K0 di mens ions are deter mined with r espec t to t he EIA/Jedec RS-481
rotati ona l and lateral movement requi remen ts (see sketches A, B, and C).
20 deg maximum component rotation
0.5mm
maximum
0.5mm
maximum
Sketch C (Top View)
Component lateral movement
Typical
component
cavity
center line
20 deg maximum
Typical
component
center line
B0
A0
Sketch B (Top View)
Component Rotation
Sketch A (Si de or Front Sectional View)
Component Rotation
User Direction of Feed
SSOT-8 Embossed Carrier Tape
Configuration: Figur e 3.0
SSOT-8 Reel Configuration: Figur e 4.0
SuperSOT
TM
-8 Tape and Reel Data and Package Dimensions, continued
July 1999, Rev. C
SuperSOT
TM
-8 (FS PKG Code 34, 35)
1 : 1
Scale 1:1 on letter size paper
Di mensions shown below are in:
inches [millimeters]
Part Weight per unit (gram): 0.0416
SuperSOT
TM
-8 Tape and Reel Data and Package Dimensions, continued
September 1998, Rev. A
TRADEMARKS
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CROSSVOLTTM
E
2
CMOS
TM
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HiSeCTM
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failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
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Definition of Terms
Datasheet Identification
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Definition
Advance Information
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No Identification Needed
Obsolete
This datasheet contains the design specifications for
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any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
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changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
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Rev. D
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