June 1996
NDT454P
P-Channel Enhancement Mode Field Effect Transistor
General Description
Features
____________________________________________________________________________________________
Absolute Maximum Ratings
T
A
= 25C unless otherwise noted
Symbol
Parameter
NDT454P
Units
V
DSS
Drain-Source Voltage
-30
V
V
GSS
Gate-Source Voltage
20
V
I
D
Drain Current - Continuous
(Note 1a)
5.9
A
- Pulsed
15
P
D
Maximum Power Dissipation
(Note 1a)
3
W
(Note 1b)
1.3
(Note 1c)
1.1
T
J
,T
STG
Operating and Storage Temperature Range
-65 to 150
C
THERMAL CHARACTERISTICS
R
JA
Thermal Resistance, Junction-to-Ambient
(Note 1a)
42
C/W
R
JC
Thermal Resistance, Junction-to-Case
(Note 1)
12
C/W
* Order option J23Z for cropped center drain lead.
NDT454P Rev. D2
Power SOT P-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary, high cell
density, DMOS technology. This very high density process is
especially tailored to minimize on-state resistance and provide
superior switching performance. These devices are particularly
suited for low voltage applications such as notebook computer
power management and other battery powered circuits where
fast switching, low in-line power loss, and resistance to
transients are needed.
-5.9A, -30V. R
DS(ON)
= 0.05
@ V
GS
= -10V
R
DS(ON)
= 0.07
@ V
GS
= -6V
R
DS(ON)
= 0.09
@ V
GS
= -4.5V.
High density cell design for extremely low R
DS(ON).
High power and current handling capability in a widely used
surface mount package.
D
D
S
G
D
S
G
1997 Fairchild Semiconductor Corporation
Electrical Characteristics
(T
A
= 25C unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
OFF CHARACTERISTICS
BV
DSS
Drain-Source Breakdown Voltage
V
GS
= 0 V, I
D
= -250 A
-30
V
I
DSS
Zero Gate Voltage Drain Current
V
DS
= -24 V, V
GS
= 0 V
-1
A
V
DS
= -15 V, V
GS
= 0 V
T
J
= 70C
-5
A
I
GSSF
Gate - Body Leakage, Forward
V
GS
= 20 V, V
DS
= 0 V
100
nA
I
GSSR
Gate - Body Leakage, Reverse
V
GS
= -20 V, V
DS
= 0 V
-100
nA
ON CHARACTERISTICS
(Note 2)
V
GS(th)
Gate Threshold Voltage
V
DS
= V
GS
, I
D
= -250 A
-1
-2.7
V
R
DS(ON)
Static Drain-Source On-Resistance
V
GS
= -10 V, I
D
= -5.9 A
0.038
0.05
V
GS
= -6 V, I
D
= -5.2 A
0.046
0.07
V
GS
= -4.5 V, I
D
= -4.6 A
0.064
0.09
I
D(on)
On-State Drain Current
V
GS
= -10 V, V
DS
= -5 V
-15
A
V
GS
= -4.5, V
DS
= -5V
-5
g
FS
Forward Transconductance
V
DS
= 15 V, I
D
= 5.9 A
10
S
DYNAMIC CHARACTERISTICS
C
iss
Input Capacitance
V
DS
= 15 V, V
GS
= 0 V,
f = 1.0 MHz
950
pF
C
oss
Output Capacitance
610
pF
C
rss
Reverse Transfer Capacitance
220
pF
SWITCHING CHARACTERISTICS
(Note 2)
t
D(on)
Turn - On Delay Time
V
DD
= -15 V, I
D
= -1 A,
V
GEN
= -10 V, R
GEN
= 6
10
30
ns
t
r
Turn - On Rise Time
18
60
ns
t
D(off)
Turn - Off Delay Time
80
120
ns
t
f
Turn - Off Fall Time
45
100
ns
Q
g
Total Gate Charge
V
DS
= -15 V,
I
D
= -5.9 A, V
GS
= -10 V
29
40
nC
Q
gs
Gate-Source Charge
3
Q
gd
Gate-Drain Charge
11
NDT454P Rev. D2
Electrical Characteristics
(T
A
= 25C unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
I
S
Maximum Continuous Drain-Source Diode Forward Current
-1.9
A
V
SD
Drain-Source Diode Forward Voltage
V
GS
= 0 V, I
S
= -5.9 A
(Note 2)
-0.85
-1.3
V
t
rr
Reverse Recovery Time
V
GS
= 0V, I
F
= -5.9 A, dI
F
/dt = 100 A/s
100
ns
Notes:
1. R
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
JC
is guaranteed by
design while R
CA
is determined by the user's board design.
P
D
(
t
) =
T
J
-
T
A
R
JA
(
t
)
=
T
J
-
T
A
R
JC
+
R
CA
(
t
)
=
I
D
2
(
t
)
R
DS
(
ON
)
T
J
Typical R
JA
using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment:
a. 42
o
C/W when mounted on a 1 in
2
pad of 2oz copper.
b. 95
o
C/W when mounted on a 0.066 in
2
pad of 2oz copper.
c. 110
o
C/W when mounted on a 0.0123 in
2
pad of 2oz copper.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0%.
NDT454P Rev. D2
1a
1b
1c
NDT454P Rev. D2
-5
-4
-3
-2
-1
0
-30
-25
-20
-15
-10
-5
0
V , DRAIN-SOURCE VOLTAGE (V)
I , DRAIN-SOURCE CURRENT (A)
-6.0
-4.0
V =-10V
GS
DS
D
-3.0
-4.5
-3.5
-5.0
-20
-16
-12
-8
-4
0
0.5
1
1.5
2
2.5
3
I , DRAIN CURRENT (A)
DRAIN-SOURCE ON-RESISTANCE
V = -3.5V
GS
D
R , NORMALIZED
DS(on)
-6.0V
-10V
-6.0V
-5.0V
-4.0V
-4.5V
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation
with Drain Current and Gate Voltage.
Typical Electrical Characteristics
-50
-25
0
2 5
5 0
7 5
100
125
150
0.6
0.8
1
1.2
1.4
1.6
T , JUNCTION TEMPERATURE (C)
DRAIN-SOURCE ON-RESISTANCE
J
V = -10V
GS
I = -5.9A
D
R
,
N
O
R
M
A
L
I
Z
E
D
D
S
(
O
N
)
-20
-15
-10
-5
0
0.5
1
1.5
2
I , DRAIN CURRENT (A)
DRAIN-SOURCE ON-RESISTANCE
D
R , NORMALIZED
DS(on)
25C
-55C
V = -10V
GS
T = 125C
J
Figure 3. On-Resistance Variation
with Temperature.
Figure 4. On-Resistance Variation
with Drain Current and Temperature.
-5
-4
-3
-2
-1
-20
-16
-12
-8
-4
0
-V , GATE TO SOURCE VOLTAGE (V)
-I , DRAIN CURRENT (A)
25
125
V = -10V
DS
GS
D
T = -55C
J
-50
-25
0
25
50
75
100
125
150
0.6
0.7
0.8
0.9
1
1.1
1.2
T , JUNCTION TEMPERATURE (C)
GATE-SOURCE THRESHOLD VOLTAGE
I = -250A
D
V = V
DS
GS
J
V , NORMALIZED
th
Figure 5. Transfer Characteristics.
Figure 6. Gate Threshold Variation
with Temperature.
NDT454P Rev. D2
-50
-25
0
25
50
75
100
125
150
0.94
0.96
0.98
1
1.02
1.04
1.06
1.08
1.1
T , JUNCTION TEMPERATURE (C)
DRAIN-SOURCE BREAKDOWN VOLTAGE
I = -250A
D
BV , NORMALIZED
DSS
J
0
0.3
0.6
0.9
1.2
1.5
0.001
0.01
0.1
1
5
10
20
-V , BODY DIODE FORWARD VOLTAGE (V)
-I , REVERSE DRAIN CURRENT (A)
T = 125C
J
25C
-55C
V = 0V
GS
SD
S
Figure 7. Breakdown Voltage
Variation with Temperature.
Figure 8. Body Diode Forward Voltage Variation
with Source Current and
Temperature.
Typical Electrical Characteristics
(continued)
0
10
20
30
40
0
2
4
6
8
10
Q , GATE CHARGE (nC)
-V , GATE-SOURCE VOLTAGE (V)
g
GS
I = -5.9A
D
V = -10V
DS
-15V
-20V
0.1
0.3
1
3
10
30
1 0 0
2 0 0
3 0 0
5 0 0
1 0 0 0
2 0 0 0
3 0 0 0
-V , DRAIN TO SOURCE VOLTAGE (V)
CAPACITANCE (pF)
DS
C iss
f = 1 MHz
V = 0V
GS
C oss
C rss
D
S
-V
DD
R
L
V
OUT
V
GS
DUT
V
IN
R
GEN
G
Figure 9. Capacitance Characteristics.
Figure 10. Gate Charge Characteristics.
Figure 11. Switching Test Circuit.
Figure 12. Switching Waveforms.
10%
50%
90%
10%
90%
90%
50%
V
IN
V
OUT
o n
off
d(off)
f
r
d(on)
t
t
t
t
t
t
INVERTED
10%
PULSE WIDTH
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